alex/esp-idf
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495 Commits

Author SHA1 Message Date
Alex Lisitsyn
51e9cf6848 driver: add rs485 half duplex interface support to uart driver (update after review) 
An existing UART driver does not support RS485 half duplex mode.
This task adds this functionality to ESP_IDF UART driver.
driver/uart.c/h: updated to add support of RS485 half duplex mode
examples/peripherals/uart_echo_rs485/main/rs485_example.c: added test example
components/driver/test/test_uart.c: added test of RS485 half duplex mode
docs/en/api-reference/peripherals/uart.rst: updated documentation
test_uart.c: suppress GCC warnings about discarded const qualifiers
uart.rst: remove sphinx warning - "Duplicate explicit target name"
simple change in uart.h file
update (test_uart.c) after rebase from master
update uart.rst, uart.c, rs485_example.c
Update example description in file Readme.md
update uart.c/h, uart.rst, test_uart.c according to review results

The tests are completed using RS485 adapters hardware connected to two ESP32 WROVER KITs.

TW#13812
Closes https://github.com/espressif/esp-idf/pull/667
Closes https://github.com/espressif/esp-idf/pull/1006
 2018-07-02 15:24:58 +02:00
houchenyao
1878109a7f bugfix: fix pcnt case "PCNT interrupt method test(control IO is high)" 2018-06-26 13:35:14 +08:00
Konstantin Kondrashov
32da455384 soc: Fix check_long_hold_gpio and move def to soc 
Fix factory_reset_pin init as input
Move definition a structure rtc_gpio_desc to soc

Closes https://github.com/espressif/esp-idf/issues/2030
 2018-06-22 09:20:27 +05:00
houchenyao
3238c6f968 test: components/driver: pcnt case 2018-06-20 06:00:26 +00:00
houchenyao
339d381019 test: components/driver: ledc case 2018-06-19 02:00:42 +08:00
Ivan Grokhotkov
589e8db4dd Merge branch 'bugfix/spi_gpio_deinit' into 'master' 
fix(spi): Fix several init/deinit issues of spi pins

See merge request idf/esp-idf!2522
 2018-06-14 19:21:34 +08:00
Michael (XIAO Xufeng)
ebfda40b7c refactor(spi): move pin information into soc folder 2018-06-14 11:29:15 +08:00
He Yin Ling
e1a6e71486 Merge branch 'test/driver_rmt' into 'master' 
test: add rmt test cases

See merge request idf/esp-idf!1797
 2018-06-13 22:31:11 +08:00
He Yin Ling
a4581ff404 Merge branch 'test/driver_timer' into 'master' 
test: add driver timer test cases

See merge request idf/esp-idf!1785
 2018-06-13 22:28:17 +08:00
houchenyao
5c6473245f test: add driver/rmt test case 2018-06-13 18:10:09 +08:00
He Yin Ling
17200f484e Merge branch 'test/driver_sigmadelta' into 'master' 
test: add sigmadelta test

See merge request idf/esp-idf!1780
 2018-06-13 15:19:35 +08:00
houchenyao
de848a5150 test: driver/sigmadelta test case 2018-06-13 10:15:06 +08:00
houchenyao
0837eb4c2e test: components/driver: timer case 2018-06-13 01:39:07 +00:00
houchenyao
e5717e365f test: add driver/gpio test case 2018-06-12 19:04:30 +08:00
Angus Gratton
87077a5478 test: Tweaks to reduce variation in CI unit tests 
spi test: Prime the flash cache before each test to minimise flash cache misses.

VFS performance test: Increase the number of runs to minimise influence of an isolated bad run.
 2018-06-08 14:42:44 +10:00
Michael (XIAO Xufeng)
939e5693a5 chore(spi): fix the terms of native to iomux 2018-06-06 06:08:39 +00:00
michael
75cdbcefc7 test(spi): add test for SPI timing 2018-06-06 06:08:39 +00:00
michael
208d993de1 test(spi_master): slightly modify the test 2018-06-06 06:08:39 +00:00
kooho
0dca2d4c68 driver(uart): Fix uart_get_baudrate incorrect return value when using ref_tick 2018-05-04 09:41:41 +08:00
Ivan Grokhotkov
52f9a5ca16 Merge branch 'bugfix/sdspi_wp_cd_pins' into 'master' 
sdmmc, sdspi: fix handling of CD and WP

See merge request idf/esp-idf!2285
 2018-04-24 20:53:47 +08:00
Ivan Grokhotkov
2a7d85cfa4 sdmmc, sdspi: fix initializers to be C++-compatible, add test 
Closes https://github.com/espressif/esp-idf/issues/1861
Closes https://github.com/espressif/arduino-esp32/issues/1312
 2018-04-23 14:35:13 +08:00
Michael (Xiao Xufeng)
45f8bcf3f8 fix(spi): allow using MISO on GPIO34-39 
Breaking Changes: arguments of ``spicommon_bus_initialize_io`` are changed.

Closes https://github.com/espressif/esp-idf/issues/1736.
 2018-04-12 17:01:38 +08:00
Michael (Xiao Xufeng)
15be0829fa test(spi_master): test spi master speed performance by median value. 
also increase the boundary of SPI limit by a little.
 2018-03-16 16:37:19 +08:00
Ivan Grokhotkov
363c096f2b Merge branch 'test/adc2_with_wifi_reopen' into 'master' 
test(adc2): re-enable the adc2 test.

See merge request idf/esp-idf!1926
 2018-02-11 22:32:18 +08:00
michael
687d6aa2cd test(adc2): re-enable the adc2 test. 2018-02-08 13:48:25 +08:00
Michael (Xiao Xufeng)
a151767426 test(spi_master): add performance display for spi master. 2018-02-07 17:50:13 +08:00
Michael (Xiao Xufeng)
5214a0600c test(adc2): temporary ignore adc2 unit test (with WiFi) to pass the CI. 
the issue is introduced in commit 17f01eb718.
 2018-02-06 11:59:40 +08:00
michael
13d38f10ee test(spi): internal connection test master with slave for address and command field. 2017-11-17 12:15:19 +08:00
michael
d30f3e7aa8 example(adc2): add example and test case for adc2. 
closes #461
 2017-10-26 14:35:30 +08:00
Gabriel Carstoiu
8128bb95ef fix(spi_slave): enable DMA clock when initialization. 
merging in the code updates to the SPI master code done in commit b834fcf78a.

TW#15670, Closes #1027
 2017-10-17 12:20:40 +08:00
michael
fcd0f52e21 test(spi_master): add test case for 3 DMA issues with internal connection by gpio mux. 
3 issues are:
1. RX buffer not aligned (start and end)
2. not setting rx_buffer
3. setting rx_length != length

also add spi release code here.
 2017-09-27 10:44:28 +08:00
michael
4c9754726f fix(spi_master): fix the command field to make it more intuitive to use. 2017-08-21 20:37:57 +08:00
Ivan Grokhotkov
159a2d01d1 Merge branch 'bugfix/spi_dma' into 'master' 
bugfix(spi_master): fix several issues when using RX DMA

See merge request !1006
 2017-08-16 18:55:25 +08:00
michael
ed1d084aea fix(spi_master): make the address field more intuitive to use. 
The address field should be placed at the highest bits of address and slv_wr_status registers. Instead of breaking the address into two parts and fill in each register, move the address to the highest bits and write to the registers respectively.

Breaking change: if you fill-in the SPI address filed in a previous version in some way and it works correctly, you still have to rewrite the address, in a more intuitive way.
 2017-08-15 14:49:31 +08:00
michael
227b011f6a fix(spi_master): fix SPI master, now able to transfer more than 32 bytes in non-DMA-accessable area. 
apply for internal space to hold these data.
use DMA when it's enabled, no matter long or short.

TW#12226, github#551
 2017-08-14 17:19:57 +08:00
michael
99769f0b00 fix(spi_master): fix the bug that VSPI no respond when host changed 
from HSPI to VSPI, and vice versa.

fix the SPI control bits written wrong in the headers.

TW#12123, Github#477
 2017-07-21 14:50:17 +08:00
Angus Gratton
71c70cb15c heap: Refactor heap regions/capabilities out of FreeRTOS 
Remove tagged heap API, rename caps_xxx to heap_caps_xxx

Also includes additional heap_caps_xxx inspection functions.
 2017-07-10 17:46:03 +08:00
Jeroen Domburg
9134c13c73 Fix SPI master CI test 2017-04-27 14:50:02 +08:00
Jeroen Domburg
4c06dca15c SPI: Small fixes according to MR comments 2017-04-27 11:49:04 +08:00
Jeroen Domburg
e9c372bc2d SPI: Split common SPI stuff out of master driver; add slave driver; add workaround for DMA issue. 2017-04-27 11:49:04 +08:00
Jeroen Domburg
76295c7a13 Fix timing adjustment needed for higher speeds of SPI master bus. 2017-03-28 11:31:59 +08:00
antti
f8b5c29346 esp32: add [ignore] tag to some unit test cases for CI 
Add ignore tag on unit test cases that are not supported in CI yet
 2017-01-18 17:08:20 +08:00
Jeroen Domburg
356e01545c Add test for spi clock, fix corner cases) 2017-01-11 16:13:33 +08:00
Jeroen Domburg
ee59fa75f4 Rename SPI Master IO pins to more common terminology, add better explanation to queue_length initialization value 2017-01-11 11:25:56 +08:00
Jeroen Domburg
23455de4c2 Add SPI Master driver, example, test and docs 2017-01-06 14:20:32 +08:00