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20,464 Commits 20 Branches 148 Tags 384 MiB
0a15a3fa96
Commit Graph

403 Commits

Author SHA1 Message Date
Gustavo Henrique Nihei
0a15a3fa96 Merge branch 'bugfix/bootloader_debug_buffers' into 'master' 
bootloader_support: Fix and re-enable bootloader_debug_buffer function

See merge request espressif/esp-idf!15998
 2021-11-23 11:54:42 +00:00
Gustavo Henrique Nihei
f75f74ac40 bootloader_support: Fix and re-enable bootloader_debug_buffer function 
The body of the bootloader_debug_buffer function was conditioned to
macros that were never defined, resulting in deactivated code.

Signed-off-by: Gustavo Henrique Nihei <gustavo.nihei@espressif.com>
 2021-11-22 12:13:58 -03:00
Aditya Patwardhan
be65338212 secure_boot: Fix warning when UART ROM DL mode is disabled 
*Additionally use updated calls to enable rom secure download mode
 2021-11-22 12:01:15 +05:30
Cao Sen Miao
981abed2b2 spi_flash: refact that flash qio can be overidable 2021-11-11 12:28:21 +08:00
morris
16677b0d3c global: make periph enable/disable APIs private 
peripheral enable/disable usually should be managed by driver itself,
so make it as espressif private APIs, not recommended for user to use it
in application code.
However, if user want to re-write the driver or ports to other platform,
this is still possible by including the header in this way:
"esp_private/peripheral_ctrl.h"
 2021-11-08 10:37:47 +08:00
Cao Sen Miao
bf6fa70812 ESP8684: update bootloader, bootloader_support, esp_rom 2021-11-06 17:33:44 +08:00
Ivan Grokhotkov
0b376251df Merge branch 'feature/kconfig_for_reproducible_build' into 'master' 
Feature: kconfig for reproducible build

See merge request espressif/esp-idf!15100
 2021-11-04 22:07:29 +00:00
Mahavir Jain
2a885ae694 secure_boot_v2: fix issue in pre-flashed digest (manual) workflow 
This commit fixes issue where empty (unprogrammed) digest slot out of
multiple supported (e.g. 3 for ESP32-C3) could cause issue in
workflow enablement process.

Notes:

1. This issue was applicable for chips supporting "secure-boot-v2"
scheme with multiple digests slots
2. This issue was affecting only manual workflow, where digest of
public was pre-flashed in efuse
3. Change in "flash_encrypt.c" is only for additional safety purpose
 2021-11-02 15:26:24 +08:00
Fu Hanxi
9919b75ec1 build: add CONFIG_APP_REPRODUCIBLE_BUILD menuconfig option to produce reproducible binaries 2021-10-26 10:43:15 +08:00
Sachin Parekh
724fdbc9f1 secure_boot: Do not allow key revocation in bootloader 2021-10-22 12:20:14 +05:30
Wu Zheng Hui
001c29b077 bootloader: Simplify multi-chip control logic of the cache 2021-10-21 18:09:37 +08:00
Wu Zheng Hui
1080e4f6a2 rename APB_CTRL ro SYS_CON 
save
 2021-09-16 20:57:57 +08:00
chenjianqiang
9b53e18c44 add flash and PSRAM CS IO acquire function 2021-09-15 20:34:17 +08:00
Sachin Parekh
bf1dde7233 bootloader: Enable clock glitch detection 
Reset the device when clock glitch detected. Clock glitch detection is
only active in bootloader
 2021-09-02 12:25:12 +05:30
Yuriy Shestakov
87b958c814 Fixed GLITCH_RTC_RST for esp32-c3 revision 3 
* Issue: https://github.com/espressif/esp-idf/issues/7082

Signed-off-by: Yuriy Shestakov <yshestakov@gmail.com>

Closes https://github.com/espressif/esp-idf/issues/7082
Closes https://github.com/espressif/esp-idf/pull/7441
 2021-09-02 12:25:12 +05:30
Armando
a3dc625da6 mspi: support 120MHz Quad Flash and PSRAM on ESP32S3 2021-08-31 16:06:44 +08:00
wuzhenghui
6ab495b4dc esp32h2: chip env support 
brownout init fixed
 2021-08-25 11:02:47 +08:00
Armando (Dou Yiwen)
3e172289b0 Merge branch 'feature/support_octal_flash_120m_str_mode_on_esp32s3' into 'master' 
mspi: support octal flash 120MHz STR mode on esp32s3

Closes IDF-3146

See merge request espressif/esp-idf!14668
 2021-08-20 08:40:02 +00:00
Mahavir Jain
85e1258178 Merge branch 'esp32s3/secure_boot' into 'master' 
bootloader: Enable Secure boot V2 for ESP32-S3

Closes IDF-1787

See merge request espressif/esp-idf!14873
 2021-08-20 06:44:19 +00:00
Michael (XIAO Xufeng)
7649db9712 draft: another patch.. 2021-08-19 17:02:58 +08:00
Sachin Parekh
2d82560ed5 bootloader: Enable Secure boot V2 for ESP32-S3 2021-08-19 14:08:12 +05:30
Armando
d325f4d557 mspi: support octal flash 120M STR mode on esp32s3 2021-08-19 10:44:30 +08:00
Michael (XIAO Xufeng)
8dcfa1b384 spi_flash: fix the corruption of ROM after calling bootloader_execute_flash_command 
The user register, especially dummy related ones, needs to be restored, otherwise the ROM function will not work.

Introduced in dd40123129.
 2021-08-18 23:55:39 +08:00
Mahavir Jain
012c9e26a4 Merge branch 'fixes/secure_boot' into 'master' 
secure_boot/esp32(s2,c3): Disable read protecting of efuses

See merge request espressif/esp-idf!14769
 2021-08-17 05:05:00 +00:00
Michael (XIAO Xufeng)
a0d2efe1be Merge branch 'bugfix/xmc_overerase' into 'master' 
bootloader: add xmc spi_flash startup flow to improve reliability

See merge request espressif/esp-idf!13895
 2021-08-13 15:27:48 +00:00
Sachin Parekh
f430e86c0f secure_boot/esp32(s2,c3): Disable read protecting of efuses 
When secure boot is enabled, disable the ability to read protect
efuses that contain the digest.
 2021-08-13 13:41:59 +05:30
Michael (XIAO Xufeng)
dd40123129 bootloader: add xmc spi_flash startup flow to improve reliability 2021-08-12 17:22:42 +08:00
KonstantinKondrashov
3cf4fbc150 efuse(esp32s2): Added flash_ver, psram_ver, pkg_ver efuses 2021-08-06 13:14:54 +08:00
Omar Chebib
779e7400b0 uart: uart_set_pin function will now use IOMUX whenever possible 
By using IOMUX instead of GPIO Matrix for UART, it is now possible
on ESP32 boards to use the UART as a wake up source even if it is
not used as a console.
For other boards where this issue was not present, using IOMUX has
the advantage to be faster than using GPIO matrix, so a highest
baudrate can be used
 2021-08-04 12:48:30 +08:00
Cao Sen Miao
c29b3e2e36 spi_flash: move the unlock patch to bootloader and add support for GD 2021-07-29 10:46:33 +08:00
KonstantinKondrashov
92448e7bd7 secure_boot: Whole 3 bits are set for SOFT_DIS_JTAG eFuse 2021-07-21 17:19:01 +05:00
Marius Vikhammer
03545feaea Merge branch 'feature/s3_flash_enc' into 'master' 
S3 Flash encryption bringup

Closes IDF-1786 and IDF-2576

See merge request espressif/esp-idf!14259
 2021-07-19 08:56:50 +00:00
Omar Chebib
a7b6ec85b8 Merge branch 'feature/move_memory_layout_to_heap' into 'master' 
G0: Memory layouts are now part of heap components

Closes IDF-1264

See merge request espressif/esp-idf!14028
 2021-07-19 06:23:19 +00:00
morris
2058e89448 Merge branch 'feature/fpga_bootloader' into 'master' 
Boot ESP32 & ESP32-S2 apps on FPGA

See merge request espressif/esp-idf!8270
 2021-07-18 08:06:38 +00:00
Angus Gratton
1a626ef6ca esp32: App can boot on FPGA image 
Includes fix for detecting ESP32 ECO3 on FPGA
 2021-07-16 10:50:06 +10:00
Angus Gratton
192b5925da bootloader: Can boot to IDF scheduler start on internal-use FPGA 
On ESP32 & ESP32-S2. Patch doesn't include changes to make the app run fully.
 2021-07-16 10:50:06 +10:00
Omar Chebib
c4f57af6c9 G0: Memory layouts are now part of heap components 2021-07-15 11:38:23 +10:00
Marius Vikhammer
b8a322195e flash encryption: add flash encryption support for ESP32-S3 2021-07-14 18:46:17 +08:00
Omar Chebib
b967dc0dbf espsystem: add support for RISC-V panic backtrace 
Add .eh_frame and .eh_frame_hdr sections to the binary (can be
enabled/disabled within menuconfig). These sections are parsed
when a panic occurs. Their DWARF instructions are decoded and
executed at runtime, to retrieve the whole backtrace. This
parser has been tested on both RISC-V and x86 architectures.

This feature needs esptool's merge adjacent ELF sections feature.
 2021-07-13 15:42:40 +08:00
morris
3e2d98500f Merge branch 'refactor/common_rom_rtc_apis' into 'master' 
soc: define reset reasons in soc component

Closes IDF-1993

See merge request espressif/esp-idf!9829
 2021-07-13 07:05:25 +00:00
Angus Gratton
d7d28786b2 Merge branch 'bugfix/secure_boot_sig_verify' into 'master' 
secure boot: Fix incorrect handling of mbedtls_ctr_drbg_seed() failure in signature verification

See merge request espressif/esp-idf!14300
 2021-07-13 06:48:25 +00:00
Angus Gratton
4fe4df8770 Merge branch 'feature/bootloader_pin_level_pr7089' into 'master' 
bootloader: Add configurable pin level for factory reset (PR)

Closes IDFGH-5337

See merge request espressif/esp-idf!13956
 2021-07-13 05:39:25 +00:00
morris
1560d6f1ba soc: add reset reasons in soc component 2021-07-13 10:45:38 +08:00
Angus Gratton
e3ca61a200 secure boot: Fix incorrect handling of mbedtls_ctr_drbg_seed() failure in signature verification 
Increase the test app optimization level to one that would find this issue.
 2021-07-08 19:17:04 +10:00
Marius Vikhammer
71c1da8952 timer group: add timer group and WDT support for ESP32S3 
Regenerate timer group header files and update LL, check examples
and update docs.
 2021-07-06 16:21:43 +08:00
Angus Gratton
6bbb58c8c2 bootloader: Small cleanup and docs for factory reset level config 
- Add to docs & config descriptions
- Change to a "choice" to become self-documenting
- Keep the bootloader_common_check_long_hold_gpio() function for compatibility
 2021-07-05 12:08:36 +08:00
chegewara
fb7234a13d bootloader: Add selectable level for factory reset pin 
Closes https://github.com/espressif/esp-idf/pull/7089
 2021-07-05 12:08:36 +08:00
Shu Chen
2df4ddf998 esp32h2: fixes after rebase 2021-07-01 19:53:50 +08:00
Shu Chen
c0056813f2 esp32h2: add bootloader support 2021-07-01 19:53:11 +08:00
Michael (XIAO Xufeng)
afc2bc94b3 Merge branch 'feature/add_opi_flash_psram_support' into 'master' 
spi flash: opi flash psram support and spi timing tuning  support on 727

Closes IDF-3097

See merge request espressif/esp-idf!12946
 2021-06-28 01:59:19 +00:00