Marius Vikhammer
79b59947d8
aes: fix potential unaligned access of buffers
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https://github.com/espressif/esp-idf/issues/7236
2021-11-04 10:35:55 +08:00
SalimTerryLi
29accf2533
soc/ll: workaround compiler bug that generate 8/16 bits inst instead of 32 bits one
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Note: on ESP32 UART rxfifo seems to be read as u8 instead of u32 to make it work
2021-10-12 10:42:04 +08:00
SalimTerryLi
f23acef8eb
MCPWM/deadtime: fix and sync preset deadtime modes with well-known definition
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Closes https://github.com/espressif/esp-idf/issues/7321
2021-08-03 14:27:34 +08:00
Cao Sen Miao
9c7d2c7595
spi_flash: fix cs line setup to make the flash driver more stable
2021-06-15 15:27:51 +08:00
Michael (XIAO Xufeng)
9da031e0c3
Merge branch 'bugfix/twai_caps_naming_and_tidy_up_v4.3' into 'release/v4.3'
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Fix TWAI caps (backport v4.3)
See merge request espressif/esp-idf!13304
2021-04-28 17:47:35 +00:00
Darian Leung
07291fdd27
TWAI: FIFO overrun handling and errata workarounds
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This commit adds handling for FIFO overruns and
adds workarounds for HW errats on the ESP32.
Closes https://github.com/espressif/esp-idf/issues/2519
Closes https://github.com/espressif/esp-idf/issues/4276
2021-04-26 19:35:13 +08:00
Darian Leung
b8e31efcac
TWAI: Fix incorrect CAP name
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Fixes a bug where SOC_TWAI_BRP_DIV_SUPPORTED was mistyped preventing
slower bit rates from being enabled on ESP32 revision 2 and 3 chips
2021-04-26 19:34:30 +08:00
Omar Chebib
84dc42c4b0
gpio: Disable USB JTAG when setting pins 18 and 19 as GPIOs on ESP32C3
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When `DIS_USB_JTAG` eFuse is NOT burned (`False`), it is not possible
to set pins 18 and 19 as GPIOs. This commit solves this by manually
disabling USB JTAG when using pins 18 or 19.
The functions shall use `gpio_hal_iomux_func_sel` instead of
`PIN_FUNC_SELELECT`.
2021-04-12 17:45:06 +08:00
aleks
d761226f36
driver: fix uart handler in iram calls inline uart_ll_is_tx_idle
2021-04-01 09:56:56 +02:00
Michael (XIAO Xufeng)
b75a5fd03a
Merge branch 'bugfix/adc_power_issue_4.3' into 'release/v4.3'
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adc: fix adc power issue (v4.3)
See merge request espressif/esp-idf!12921
2021-03-30 17:15:09 +00:00
Armando
f48346f22f
adc: apply adc power API to adc driver
2021-03-26 17:41:20 +08:00
fuzhibo
918875424e
fix: clear interrupt in touch sensor initialization
2021-03-16 11:37:41 +08:00
Armando
66d10f0eec
spi: refactor spi_common dma allocator
2021-02-25 11:01:33 +08:00
Armando
ffc4ff5a8c
spi: apply gdma allocator to SPI
2021-02-25 11:01:16 +08:00
Michael (XIAO Xufeng)
da4b4fc565
Merge branch 'bugfix/mcpwm_can_set_two_falut_signal' into 'master'
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mcpwm: fix second fault line broken issue
Closes IDFGH-4194
See merge request espressif/esp-idf!12119
2021-01-27 11:36:30 +08:00
Michael (XIAO Xufeng)
3d7da2c8ff
adc: simplify LL on C3
2021-01-25 15:08:55 +08:00
morris
ceab7daea8
mcpwm: fix wrong capture edge
2021-01-22 16:17:59 +08:00
Li Shuai
a43de3a44b
fix set UART_FORCE_XOFF
can't stop new Tx request issue
2021-01-19 14:51:22 +08:00
Li Shuai
355dd10257
light sleep: dfs support for esp32c3
2021-01-19 14:50:58 +08:00
ninh
659d805411
esp_wifi: light sleep optimization
2021-01-18 15:31:03 +08:00
ninh
27aa6c289f
components/pm: Add slp gpio configure workaround
2021-01-15 15:34:45 +08:00
Renz Bagaporo
ff2d9fd96c
[freertos] Silence sign-conversion warning
2021-01-14 10:54:15 +11:00
Angus Gratton
f683db7aea
Merge branch 'feature/c3_IDF-2554' into 'master'
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global: Uses CCOUNT API instead of XTHAL macro
Closes IDF-2554
See merge request espressif/esp-idf!11954
2021-01-13 12:55:21 +08:00
KonstantinKondrashov
dada7cd035
global: Uses CCOUNT API instead of XTHAL macro
2021-01-12 16:24:23 +08:00
morris
753a929525
global: fix sign-compare warnings
2021-01-12 14:05:08 +08:00
morris
9e7d2c0065
esp32c3: format and clean up interrupt and os port code
2021-01-05 15:39:46 +08:00
Felipe Neves
5d316ac142
interrupt: added INTC FLEXIBLE capabillity to esp32c3 CPU caps
2021-01-05 15:39:46 +08:00
Felipe Neves
09bc1580be
intr_allocator: add abstractions for priority, type and edge-ack interrupt controller functions
2021-01-05 15:39:46 +08:00
Angus Gratton
f09b8ae7a4
driver: Add esp32c3 ADC driver
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Based on internal commit 3ef01301fffa552d4be6d81bc9d199c223224305
2020-12-23 09:53:24 +11:00
Angus Gratton
27a9cf861e
driver: Add esp32c3 drivers (except ADC/DAC) and update tests
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Some ESP32-C3 drivers are still pending.
Based on internal commit 3ef01301fffa552d4be6d81bc9d199c223224305
2020-12-23 09:53:24 +11:00
Marius Vikhammer
457ce080ae
AES: refactor and add HAL layer
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Refactor the AES driver and add HAL, LL and caps.
Add better support for running AES-GCM fully in hardware.
2020-12-10 09:04:47 +00:00
Angus Gratton
7c08be5771
hal: Add initial ESP32-C3 support
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From internal commit 7761d6e8
2020-11-30 15:23:15 +11:00
Armando
05a4a8d864
uart: seperate sclk and baudrate setting
2020-11-24 19:12:52 +08:00
Armando
fb8b905539
uart: add uart support on esp32s3
2020-11-24 19:12:51 +08:00
Michael (XIAO Xufeng)
af992c26bc
Merge branch 'bugfix/fix_x32k_startup_slow_bug' into 'master'
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bugfix: Fix xtal 32k not oscillate or oscillate too slowly issue for esp32
See merge request espressif/esp-idf!10519
2020-11-24 17:37:29 +08:00
chaijie
a48b5246cc
ESP32: Fix xtal 32k not oscillate or oscillate too slowly issue
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ESP32 in revision0 and revision1 uses touchpad to provide
current to oscillate xtal 32k. But revision2 and revision3
do not need to do that.
Note: touchpad can not work and toupad/ULP wakeup sources
are not available when toupad provides current to xtal 32k
2020-11-23 19:38:11 +08:00
Armando
9c507982aa
spi: fix spi_ll.h func name
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On esp32 and esp32s2:
``spi_ll_dma_set_out_eof_generation`` is modified to
``spi_ll_dma_set_rx_eof_generation``.
``spi_dma_ll_set_rx_eof_generation`` is modified to
``spi_dma_ll_set_out_eof_generation``.
Because on ESP32S3, this bit ``out_eof_mode`` is moved to DMA related
registers.
2020-11-19 19:33:02 +08:00
Michael (XIAO Xufeng)
caf83b88ba
Merge branch 'feature/bringup_i2c_for_s3' into 'master'
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I2C: Add support for esp32s3 and add source clock allocator
Closes IDF-2011
See merge request espressif/esp-idf!10923
2020-11-12 22:12:58 +08:00
Cao Sen Miao
6eee601cf6
i2c: Add supports on esp32s3
2020-11-12 11:32:45 +08:00
morris
deea402cf4
timer: pooling update bit before reading count value
2020-11-12 10:31:38 +08:00
Angus Gratton
66fb5a29bb
Whitespace: Automated whitespace fixes (large commit)
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Apply the pre-commit hook whitespace fixes to all files in the repo.
(Line endings, blank lines at end of file, trailing whitespace)
2020-11-11 07:36:35 +00:00
morris
ff976867b3
rmt: split TX and RX in LL driver
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Split TX and RX function in LL driver.
Channel number is encoded in driver layer.
Added channel signal list in periph.c
2020-11-05 19:00:55 +08:00
chenjianqiang
9465af0066
rmt: support esp32s3
2020-11-05 19:00:55 +08:00
morris
e4c8ec6174
timergroup: move interrupt index into peripheral description file
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1. Added timer_group_periph.c file, describing module global signals
(e.g. interrupt index)
2. Added more caps in soc_caps.h
2020-11-03 18:16:50 +08:00
Michael (XIAO Xufeng)
3bacf35310
esp_flash: support high capacity flash chips (32-bit address)
2020-10-29 18:20:11 +08:00
Armando
f7e91ef6c1
spi: esp32s3 bringup for spi
2020-10-26 11:28:34 +08:00
Renz Bagaporo
e7460c1f00
soc: remove unecessary headers in dport_access.h
2020-10-22 19:42:34 +08:00
morris
74d78148bc
pcnt: add pcnt peripheral signal connections
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pcnt: fix bug in clear interrupt status
2020-10-19 11:56:18 +08:00
Michael (XIAO Xufeng)
647dea9395
soc: combine xxx_caps.h into one soc_caps.h
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During HAL layer refactoring and new chip bringup, we have several
caps.h for each part, to reduce the conflicts to minimum. But this is
The capabilities headers will be relataive stable once completely
written (maybe after the featues are supported by drivers).
Now ESP32 and ESP32-S2 drivers are relative stable, making it a good
time to combine all these caps.h into one soc_caps.h
This cleanup also move HAL config and pin config into separated files,
to make the responsibilities of these headers more clear. This is
helpful for the stabilities of soc_caps.h because we want to make it
public some day.
2020-10-17 16:10:15 +08:00
Marius Vikhammer
949fb8e63a
SHA: add HAL layer and refactor driver
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Add a LL and HAL layer for SHA.
2020-10-09 08:24:08 +00:00