- Support SOC ROOT clock source switch
- Support CPU frequency change
- Support RTC SLOW clock source switch
- Support RTC SLOW clock + RC FAST calibration
- Remove FPGA build
- Support SOC ROOT clock source switch
- Support CPU frequency change
- Support RTC SLOW clock source switch
- Support RTC SLOW clock + RC FAST calibration
- Remove FPGA build
- Support SOC ROOT clock source switch
- Support CPU frequency change
- Support RTC SLOW clock source switch
- Support RTC SLOW clock + RC FAST calibration
Remove FPGA build for esp32c6
9c46c98b4c have changed the default value
of ESPTOOLPY_FLASHSIZE_DETECT. As the side effect, existing
projects (having the option still enabled) started to discard the SHA256 digest.
Rename the ESPTOOLPY_FLASHSIZE_DETECT option so existing projects would
have the value disabled by default.
Closes https://github.com/espressif/esp-idf/issues/9148
ESP32-S2 and ESP32-S3
supports up to 1 GB of external flash and RAM
add support for
- 32MB
- 64MB
- 128MB ( example NOR spiFLASH 1G-BIT W25Q01JVZEIQ Winbond 0xEF 0x40 0x21 )
Merges https://github.com/espressif/esp-idf/pull/7688
Signed-off-by: Ivan Grokhotkov <ivan@espressif.com>
IDF Monitor follows the console baud rate by default. Other baud rate
can be set from command line by "idf.py monitor -B <baud>" or through
environment variables. Run "idf.py monitor --help" for more information.
Currently USB CDC Download requires the `--no-stub` option of `esptool`. This change inverts the Kconfig option to negative, so that it can be `selected` by other options or enabled in applications through `sdkconfig.defaults`.
Most ESP32 devices will also work at 80MHz, but third party boards/modules
may not have been tested at this speed so the default is kept at 40MHz for safety.
Originally marked "Reset with ESP32R0 Windows workaround", but proven to be
necessary on some other platforms as well. This is now integrated into the
default esptool.py reset behaviour.
Closes#305https://github.com/espressif/esp-idf/issues/305