jingli
04530d7112
esp_hw_support/esp32c2/rtc: take a safer xtal buf wait
2022-09-21 12:27:26 +00:00
jingli
05a2fbe810
esp_hw_support/clk_cali: fix xtal32k error detect
2022-09-21 03:03:25 +00:00
wangjialiang
6e79d05814
ble_mesh: docs: Remove BLE Mesh related reference for C2
2022-09-16 19:39:51 +08:00
Omar Chebib
53c7dd4efc
WDT: implement interrupt wdt and task wdt for ESP32-C2
...
ESP32-C2 has a single group timer, thus it will use it for the interrupt watchdog,
which is more critical than the task watchdog. The latter is implement in
software thanks to the `esp_timer`component.
2022-09-15 14:37:59 +08:00
wanlei
96aa2792f8
spi_master:fix error when use spi_bus_add_device
more than 3 device
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update gpio_sig at `spics_out` array in each spi_periph.c of chips later than s2
then `spi_bus_add_device` can correctly distribute gpio_signals for cs_signal
Closes https://github.com/espressif/esp-idf/issues/8876
2022-09-05 12:10:22 +08:00
Simon
e923c15859
Merge branch 'refactor/i2c_hal' into 'master'
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I2C: Refactor i2c hal and ll(pre-MR of I2C driver-NG)
See merge request espressif/esp-idf!19750
2022-09-02 10:47:35 +08:00
Cao Sen Miao
31b88a4c88
I2C: Refactor i2c hal and ll
2022-09-01 15:53:59 +08:00
songruojing
9d515185d0
esp32c6: clean up existing soc files and header file inclusion in IDF to be compatible with the new chip
2022-09-01 12:28:06 +08:00
Song Ruo Jing
6a60ecf780
soc_caps: Introduce SOC_LEDC_SUPPORTED and SOC_I2C_SUPPORTED caps to IDF
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Wrap the ledc, i2c source files with the new caps in CMakeLists and linker.lf.
This could avoid potential source file not found warning during linking time.
2022-08-31 20:43:22 +08:00
Michael (XIAO Xufeng)
746f4b814c
uart: move frequency of clock sources out of HAL
2022-08-15 18:55:43 +00:00
Michael (XIAO Xufeng)
f11de46bfc
Merge branch 'bugfix/fix_c2_rtc_ldo_too_low_bug' into 'master'
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ESP32C2: Fix system not stable bug when rtc voltage too low
Closes IDF-5539
See merge request espressif/esp-idf!19217
2022-08-15 17:34:36 +08:00
chaijie@espressif.com
b250589f2f
set fosc div to 1 to make chip run stablly for C2
2022-08-11 14:28:11 +08:00
Geng Yuchao
0a1d8c1e09
Fix soc caps define for all chips
2022-08-08 20:50:28 +08:00
Jing Li
c25c254666
Merge branch 'feature/further_support_esp32c2_sleep' into 'master'
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esp32c2/sleep: further support sleep for esp32c2 with 26MHz XTAL
Closes IDF-5544
See merge request espressif/esp-idf!19017
2022-08-08 13:26:15 +08:00
jingli
ee3423834e
kconfig: refactor xtal freq kconfig to common configuration item
2022-08-05 19:12:29 +08:00
zlq
7d8f10423e
1.add ldo parameters in efuse table; 2.set ldo dbias based on pvt-efuse; 3.add pll cali stop function; 4. add efuse_ocode
2022-08-05 14:24:51 +08:00
Wan Lei
1265a2db9d
Merge branch 'refactor/add_missing_include_path_for_soc_struct_files' into 'master'
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Fix check_public_headers violations for soc component
Closes IDF-5397
See merge request espressif/esp-idf!19158
2022-08-01 10:14:04 +08:00
wuzhenghui
7cb9304b65
Clean IRAM and DRAM address space conversion macros
2022-07-29 17:07:39 +08:00
wanlei
bb5a95f1aa
soc: fix register header files not self-contain
2022-07-29 11:18:06 +08:00
wuzhenghui
31183270fb
bugfix: fix SOC_ROM_STACK_START defines
2022-07-29 10:51:47 +08:00
wuzhenghui
21a4eda4d4
Use the entire sharedbuffer space as the heap of the D/IRAM attribute
2022-07-29 10:51:47 +08:00
morris
d94432fea8
systimer: refactor hal to accomodate more xtal choices
2022-07-25 16:08:52 +08:00
morris
c4e84751a5
driver: fix public header exceptions for driver
2022-07-22 00:12:36 +00:00
morris
741b031e83
soc: added SOC_TOUCH_SENSE_SUPPORTED macro
2022-07-22 00:12:36 +00:00
Armando (Dou Yiwen)
9f6f61345b
Merge branch 'feature/adc_driver_ng' into 'master'
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ADC Driver NG
Closes IDF-4560, IDF-3908, IDF-4225, IDF-2482, IDF-4111, IDF-3610, IDF-4058, IDF-3801, IDF-3636, IDF-2537, IDF-4310, IDF-5150, IDF-5151, and IDF-4979
See merge request espressif/esp-idf!17960
2022-07-19 21:28:31 +08:00
Cao Sen Miao
53580a62b5
I2C: Fullfill the I2C clock tree, and support 26M XTAL on ESP32-C2
2022-07-19 11:41:42 +08:00
Armando
5b523a3313
esp_adc: new esp_adc component and adc drivers
2022-07-15 18:31:00 +08:00
songruojing
b3d8db3ae2
bootloader, esp_system: esp32c2 console uart to support 26MHz xtal
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Gets the XTAL frequency from the RTC storage register, remove UART_CLK_FREQ_ROM macro from soc.h
2022-07-11 12:24:58 +08:00
songruojing
ef813b23fa
rtc: esp32c2 support 26MHz xtal in startup code and rtc_clk.c
2022-07-11 12:24:58 +08:00
Ivan Grokhotkov
2e37218ce5
soc, hal: remove XTAL_CLK_FREQ
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XTAL_CLK_FREQ now depends on the actual XTAL used, remove this macro
and get the XTAL frequency from the RTC register instead.
No uses of XTAL_CLK_FREQ found, other than in the UART LL.
2022-07-11 12:24:58 +08:00
Ivan Grokhotkov
5b54ae76d4
esp_timer, hal: add support for non-integer systimer frequency
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When ESP32-C2 is paired with a 26 MHz XTAL, the systimer tick
frequency becomes equal to 26 / 2.5 = 10.4 MHz. Previously we always
assumed that systimer tick frequency is integer (and 1 MHz * power of
two, above that!).
This commit introduces a new LL macro, SYSTIMER_LL_TICKS_PER_US_DIV.
It should be set in such a way that:
1. SYSTIMER_LL_TICKS_PER_US / SYSTIMER_LL_TICKS_PER_US_DIV equals the
actual systimer tick frequency,
2. and SYSTIMER_LL_TICKS_PER_US is integer.
For ESP32-C2 this means that SYSTIMER_LL_TICKS_PER_US = 52 and
SYSTIMER_LL_TICKS_PER_US_DIV = 5.
This introduced two possible issues:
1. Overflow when multiplying systimer counter by 5
- Should not be an issue, since systimer counter is 52-bit, so
counter * 5 is no more than 55-bit.
2. The code needs to perform:
- divide by 5: when converting from microseconds to ticks
- divide by 52: when converting from ticks to microseconds
The latter potentially introduces a performance issue for the
esp_timer_get_time function.
2022-07-11 12:24:37 +08:00
Michael (XIAO Xufeng)
a58362a429
Merge branch 'feature/efuse_rev_major_minor' into 'master'
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efuse: Adds major and minor versions
See merge request espressif/esp-idf!18255
2022-07-07 11:48:54 +08:00
Song Ruo Jing
b662f4b74f
Merge branch 'feature/support_26M_32M_xtal_bbpll_c2' into 'master'
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support c2 26M/32M xtal for bbpll
Closes IDF-5485
See merge request espressif/esp-idf!18769
2022-07-06 21:17:52 +08:00
cje
e16165f263
support c2 26M/32M xtal for bbpll
2022-07-05 17:45:03 +08:00
KonstantinKondrashov
0f8ff5aa15
efuse: Adds major and minor versions and others
2022-07-05 14:38:27 +08:00
Omar Chebib
cd48baf979
Refactor: move regi2c_*.h header files from esp_hw_support to soc component
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When creating G0 layer, some regi2c_*.h headers were moved out from
esp_hw_support (G1) to soc (G0). In order to be consistent with that change,
move all the remaining regi2c_*.h headers to soc too.
2022-06-30 09:40:44 +00:00
Armando
31b3f31ef4
ext_mem: make memory region check strict
2022-06-28 14:17:44 +08:00
Cao Sen Miao
3a820462ac
temperature_sensor: Add temperature sensor support for ESP32-C2
2022-06-23 15:36:43 +08:00
Marius Vikhammer
7e60e07a0a
Merge branch 'feature/esp8684_sha' into 'master'
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mbedtls: enable hw support for SHA on C2
Closes IDF-3830 and IDF-5141
See merge request espressif/esp-idf!18531
2022-06-23 14:18:49 +08:00
Marius Vikhammer
f4c79687f8
SHA: added hardware support for SHA on C2.
2022-06-23 11:01:16 +08:00
muhaidong
96f86e0bb4
esp_wifi: esp32c2 does not support wifi mesh
2022-06-21 16:48:52 +08:00
muhaidong
b48b9beace
esp_wifi: esp32c2 does not support csi.
2022-06-20 21:47:51 +08:00
muhaidong
9a25d06b5f
esp_wifi: esp32s2 esp32c3 and esp32s3 support ftm
2022-06-20 21:47:51 +08:00
morris
865937fba3
Merge branch 'bugfix/fix_esp32c2_dose_not_support_wapi' into 'master'
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esp_wifi: esp32c2 does not support wapi
Closes IDF-4216
See merge request espressif/esp-idf!18573
2022-06-20 21:31:54 +08:00
muhaidong
2ccce0ca41
esp_wifi: update comments of WI-FI CAPS in soc_caps.h
2022-06-20 19:43:16 +08:00
muhaidong
6ca2804107
esp_wifi: esp32c2 does not support wapi.
2022-06-20 11:42:12 +08:00
Ivan Grokhotkov
3973db7664
soc: make register access macros compatible with C++20
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In C++20, using the result of an assignment to a 'volatile' value is
deprecated.
Breaking change: register "setter" or modification macros can no
longer be used as expressions.
Closes https://github.com/espressif/esp-idf/issues/9170
2022-06-17 18:09:22 +02:00
Omar Chebib
752026a174
Merge branch 'refactor/remove_g0_dep_on_g1_riscv' into 'master'
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G0: RISC-V targets have now an independent G0 layer
See merge request espressif/esp-idf!17926
2022-06-16 11:53:39 +08:00
Darian
e213e66ba3
Merge branch 'refactor/esp_hw_support_cpu' into 'master'
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esp_hw_support: Add new esp_cpu.h abstraction
Closes IDF-4769
See merge request espressif/esp-idf!17091
2022-06-14 21:11:30 +08:00
Omar Chebib
5bcd9b2db8
G0: RISC-V targets have now an independent G0 layer
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G0 doesn't depend on any G1+ layer for RISC-V based targets
2022-06-14 15:00:53 +08:00