Michael (XIAO Xufeng)
9277306aef
Merge branch 'bugfix/fix_rtc_wdt_in_light_sleep_process' into 'master'
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RTC(bugfix): compile the regi2c_ctrl.c code to iram
See merge request espressif/esp-idf!10931
2020-11-18 20:30:25 +08:00
Angus Gratton
420aef1ffe
Updates for riscv support
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* Target components pull in xtensa component directly
* Use CPU HAL where applicable
* Remove unnecessary xtensa headers
* Compilation changes necessary to support non-xtensa gcc types (ie int32_t/uint32_t is no
longer signed/unsigned int).
Changes come from internal branch commit a6723fc
2020-11-13 07:49:11 +11:00
Angus Gratton
66fb5a29bb
Whitespace: Automated whitespace fixes (large commit)
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Apply the pre-commit hook whitespace fixes to all files in the repo.
(Line endings, blank lines at end of file, trailing whitespace)
2020-11-11 07:36:35 +00:00
fuzhibo
b29f075660
rtc: compile the regi2c_ctrl.c code to iram
2020-11-05 16:17:12 +08:00
fuzhibo
93c7cf094e
rtc: update rtc related code(rtc_sleep rtc_init) to support esp32s3
2020-11-04 02:43:41 +00:00
Renz Bagaporo
6b0a5af73e
soc: move implementations to esp_hw_support
2020-10-28 22:38:50 +08:00
Renz Bagaporo
988be69466
esp_hw_support: create component
2020-10-28 07:21:29 +08:00
