Alexey Lapshin
c605620073
Merge branch 'fix/keep-got-sections-for-riscv' into 'master'
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feat(esp_system): drop .got* sections and add hint
See merge request espressif/esp-idf!32969
2024-09-06 19:21:06 +08:00
Alexey Lapshin
73987108cd
feat(esp_system): drop .got* sections and add hint
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Closes https://github.com/espressif/esp-idf/issues/14296
2024-09-05 15:47:01 +07:00
Marius Vikhammer
520fda61cd
feat(system): remove references to RTC mem on C61
2024-09-04 11:16:36 +08:00
harshal.patil
95f286555a
fix(esp_hw_support): Use _iram_text_end instead of _iram_end for I/D-RAM split
2024-08-28 11:16:27 +05:30
Marius Vikhammer
c91d481dc9
feat(ulp): remove ulp related C61 code
2024-08-27 17:23:19 +08:00
C.S.M
271ca9f85a
feat(spiram): Add .noinit and .bss segement support on esp32c61
2024-08-22 10:58:50 +08:00
Chen Jichang
1c1f536235
feat(psram): add psram noinit segment support on S2/S3/P4/C5
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Closes https://github.com/espressif/esp-idf/issues/14253
2024-08-21 12:13:16 +08:00
Erhan Kurubas
9b38f87781
Revert "Merge branch 'add_openocd_stub_bins' into 'master'"
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This reverts merge request !31504
2024-08-09 22:49:43 +02:00
Erhan Kurubas
c7931b0782
feat(esp_system): preload openocd stub binaries and reserve memory for debugging
2024-08-08 23:25:26 +02:00
Armando
23fcfcae8b
change(cache): added cache size kconfig macro on s2
2024-07-25 14:25:19 +08:00
Armando
8c22cb6c6a
feat(psram): support bss on psram on p4
2024-07-15 10:44:13 +08:00
Marius Vikhammer
41d39a419f
fix(pmp): fixed alignment of PMP addr for RTC mem on C5
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Also refactored it for C6/H2/C61 to keep the approach consistent between targets
2024-07-04 16:24:46 +08:00
harshal.patil
84afc6a955
feat(esp_hw_support): Support memory protection using PMA and PMP for ESP32-C5
2024-06-25 11:55:15 +05:30
laokaiyao
21f870ecd5
remove(c5beta3): remove c5 beta3 system files
2024-06-17 12:02:15 +08:00
Armando
10d3912c70
feat(xip_psram): support xip psram feature on esp32p4
2024-05-22 15:56:07 +08:00
Alexey Lapshin
2b36636f6f
fix(system): print warning if stray section is found while linking
2024-05-17 13:37:42 +04:00
wanlei
e89e8e0ded
feat(esp32c61): update for rom freeze
2024-05-14 12:46:51 +08:00
Alexey Lapshin
9375348740
fix(system): discard eh_frame sections if disabled in sdkconfig
2024-05-02 22:11:56 +04:00
Marius Vikhammer
4533f16c34
fix(rtc_memory): fix conflict between LP-ROM and RTC reserved
2024-04-17 13:37:56 +08:00
Mahavir Jain
46c453ae1e
feat: add memory protection support using PMA/PMP for P4 target
2024-04-14 21:16:40 +05:30
laokaiyao
0cb1057915
change(rom): update the frozen rom for esp32c5mp
2024-04-01 20:53:49 +08:00
Kevin (Lao Kaiyao)
4cd30f9b8f
Merge branch 'feature/esp32c5_mp_bringup' into 'master'
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feat(esp32c5): bringup esp32c5 mp (Stage 7/7: hello world)
See merge request espressif/esp-idf!29093
2024-03-22 11:18:52 +08:00
Alexey Lapshin
0e3673a2bd
Merge branch 'feature/esp32p4-coredump-support' into 'master'
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esp32p4: panic tests support
Closes IDF-7565, IDF-7861, IDF-9035, and IDF-9075
See merge request espressif/esp-idf!28586
2024-03-21 21:12:25 +08:00
Alexey Lapshin
e845d9e0eb
feat(esp_system): allow .data to spill over into L2MEM above 0x4ff40000
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It may be usefull when .rodata placed into .dram1.data
2024-03-21 15:36:39 +04:00
laokaiyao
c9d6a11d1d
feat(esp32c5mp): support to run hello world on esp32c5 mp
2024-03-21 16:18:03 +08:00
wanlei
a611e91b2f
feat(esp32c61): new chip add system and esp_timer support
2024-03-21 11:31:15 +08:00
Alexey Lapshin
40be44f827
feat(system): refactor linker scripts
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- move .tbss to NOLOAD section
- remove xtensa-specific entities from riscv scripts
- explicit eh_frame terminator instead of "align magic"
- 80 characters line length limit
- refactor comments
- discard .rela sections (the rela data will go to relates sections)
2024-03-19 13:27:11 +04:00
laokaiyao
24d6dcb829
feat(esp32c5mp): add system related components
2024-03-18 17:34:56 +08:00
Mahavir Jain
fd6c710b27
fix: cleanup memprot files for C6/H2/P4
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There is no separate permission control peripheral in C6/H2/P4.
Memory protection is achieved using built-in PMA/PMP and hence
removing permission control specific files.
2024-03-11 17:10:40 +05:30
laokaiyao
cfc1584594
feat(esp32c5): support to set esp32c5 mp target in Kconfig
2024-03-05 16:17:53 +08:00
wanlei
ee02b71f1c
feat(esp32c61): introduce target esp32c61
2024-03-01 21:12:25 +08:00
laokaiyao
01e3c85322
refactor(esp32c5): change beta3 path in esp_system and bootloader
2024-03-01 11:12:36 +08:00
Alexey Lapshin
fdb7a43752
Merge branch 'feature/esp32p4_concontiguous_mem_mvp' into 'master'
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feat(esp_system): allow .bss to spill over into L2MEM above 0x4ff40000 on P4
See merge request espressif/esp-idf!28783
2024-02-29 16:28:13 +08:00
Alexey Lapshin
824c8e0593
feat(esp_system): allow .bss to spill over into L2MEM above 0x4ff40000
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This commit introduce SOC_MEM_NON_CONTIGUOUS_SRAM flag (that enebled for
esp32p4). If SOC_MEM_NON_CONTIGUOUS_SRAM is enabled:
- LDFLAGS+=--enable-non-contiguous-regions
- ldgen.py replaces "arrays[*]" from sections.ld.in with objects under
SURROUND keyword. (e.g. from linker.lf: data -> dram0_data SURROUND(foo))
- "mapping[*]" - refers to all other data
If SOC_MEM_NON_CONTIGUOUS_SRAM, sections.ld.in file should contain at
least one block of code like this (otherwise it does not make sense):
.dram0.bss (NOLOAD) :
{
arrays[dram0_bss]
mapping[dram0_bss]
} > sram_low
.dram1.bss (NOLOAD) :
{
/* do not place here arrays[dram0_bss] because it may be splited
* between segments */
mapping[dram0_bss]
} > sram_high
2024-02-28 19:41:25 +04:00
Armando
dd5843f490
change(memory): remove IDF-7890 todo
2024-02-04 12:54:13 +08:00
nilesh.kale
59c5b5fe6b
fix(bootloader): Fix compilation issue in bootloader build during verbose+sb+fe
2024-01-18 12:15:15 +05:30
laokaiyao
d0a8f3e5c4
feat(esp32c5): support esptool on esp32c5 beta3
2024-01-09 13:11:11 +08:00
laokaiyao
11e19f40b9
feat(esp32c5): support to build hello world on esp32c5 beta3
2024-01-09 13:11:11 +08:00
laokaiyao
bb0879b3f8
feat(esp32c5): introduce target esp32c5
2023-11-28 16:14:17 +08:00
Djordje Nedic
e32bdb66e3
fix: Fix ESP32-P4 lp_reserved_seg origin
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Apparently, this part of the linker script was copied from elsewhere
and the origin was not corrected.
2023-10-25 08:09:33 +02:00
zhaokeke
a39869416c
feat(bt): Frees BLE memory when no longer in use
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It will free libble.a & libbt all txt, data and bss segment memory.
This memory is combined into one large memory and put into the heap
pool.
2023-10-08 16:08:47 +08:00
Omar Chebib
8ca191e4c1
fix(esp32p4): Fixed interrupt handling to use the CLIC controller
2023-08-31 12:16:08 +08:00
Armando
d97b3fec67
fix(rtc): fix .rtc_timer_data_in_rtc_mem wrongly in flash issue
2023-08-15 10:17:03 +08:00
Armando
aa245489fb
change(bootloader): added address check in bootloader.ld
2023-08-09 19:33:26 +08:00
Armando
a336b94527
feat(esp_system): base support on p4
2023-07-25 05:59:10 +00:00
Lou Tianhao
dcacd8cdf8
feat(pm/deepsleep): Support deep_sleep example and deep_sleep_wake_stub example for esp32h2
2023-07-20 11:43:57 +08:00
Armando
101e6a18eb
esp32p4: introduce the target
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Add esp32p4 target to tools and Kconfig
Create directories and files that are essential for `idf.py --preview set-target esp32p4`
2023-06-13 15:16:11 +08:00
KonstantinKondrashov
cb6e2133f0
esp_hw_support: Fix invalid system time if s_esp_rtc_time_us & s_rtc_last_ticks were moved around
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The commit fixes the case:
If variables in RTC RAM have been moved around by the linker,
they will be filled with garbage data. Any reset other than OTA would work fine
because the variables would still be initialized from the initial bootup.
So now system time will be valid even after OTA.
Closes https://github.com/espressif/esp-idf/issues/9448
2023-06-08 21:59:21 +08:00
Kevin (Lao Kaiyao)
6b5077f2d7
Merge branch 'refactor/remove_esp32h4_target' into 'master'
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esp32h4: removed esp32h4 target (stage 2)
Closes IDF-7237, IDF-7238, and IDF-7239
See merge request espressif/esp-idf!23179
2023-04-24 23:34:19 +08:00
laokaiyao
b16ed57b2e
esp32h4: removed esp32h4 related files
2023-04-23 12:03:07 +00:00