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esp-idf/components/driver/gpio/gpio.c

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driver: update copyright notice
2021-05-23 20:09:38 -04:00
/*
* SPDX-FileCopyrightText: 2015-2021 Espressif Systems (Shanghai) CO LTD
*
* SPDX-License-Identifier: Apache-2.0
*/
refactor(gpio): add hal gpio driver
2019-07-15 02:44:15 -04:00
Convert Windows -> Unix line ends in gpio.c
2016-10-08 02:12:55 -04:00
#include <esp_types.h>
#include "esp_err.h"
#include "freertos/FreeRTOS.h"
#include "driver/gpio.h"
driver: add rtc module and bugfix gpio32 gpio33 feature(rtc_module):add rtc module 1. add rtc io control API (pull,output and input) 2. add touch pad API (touch pad read and interrupt) 3. add adc1 API (the max width is 12 Bits and support attenuation) 4. add hall sensor API (support hall sensor read ) 5. add dac API (the width is 8 Bits) bugfix(gpio):gpio32 and gpio33 can not output and input the gpio32 and gpio33 is initialize by librtc.a,and gpio_config not initialize the gpio as digital gpio.they can not output and input,when users use gpio32 or gpio33.And there are some problems about others driver ,when they use gpio32 or gpio33 as matrix.
2016-12-07 01:18:10 -05:00
#include "driver/rtc_io.h"
Convert Windows -> Unix line ends in gpio.c
2016-10-08 02:12:55 -04:00
#include "soc/soc.h"
can build and run hello-world app
2019-06-10 00:08:08 -04:00
#include "soc/periph_defs.h"
ipc: prevent code getting pulled in for unicore configuration
2019-08-15 03:05:59 -04:00
#if !CONFIG_FREERTOS_UNICORE
bugfix(GPIO): Fixed the bug that GPIO enables interrupts on one core, but registers interrupt service routines on another core closes https://github.com/espressif/esp-idf/issues/2808 closes https://github.com/espressif/esp-idf/issues/2845
2019-07-17 23:34:49 -04:00
#include "esp_ipc.h"
ipc: prevent code getting pulled in for unicore configuration
2019-08-15 03:05:59 -04:00
#endif
Convert Windows -> Unix line ends in gpio.c
2016-10-08 02:12:55 -04:00
soc: combine xxx_caps.h into one soc_caps.h During HAL layer refactoring and new chip bringup, we have several caps.h for each part, to reduce the conflicts to minimum. But this is The capabilities headers will be relataive stable once completely written (maybe after the featues are supported by drivers). Now ESP32 and ESP32-S2 drivers are relative stable, making it a good time to combine all these caps.h into one soc_caps.h This cleanup also move HAL config and pin config into separated files, to make the responsibilities of these headers more clear. This is helpful for the stabilities of soc_caps.h because we want to make it public some day.
2020-09-09 22:37:58 -04:00
#include "soc/soc_caps.h"
refactor(gpio): add hal gpio driver
2019-07-15 02:44:15 -04:00
#include "soc/gpio_periph.h"
#include "esp_log.h"
dac: apply generic check macro
2021-08-25 05:02:19 -04:00
#include "esp_check.h"
refactor(gpio): add hal gpio driver
2019-07-15 02:44:15 -04:00
#include "hal/gpio_hal.h"
esp_rom: extract common GPIO apis into esp_rom_gpio.h
2020-06-19 00:00:58 -04:00
#include "esp_rom_gpio.h"
refactor(gpio): add hal gpio driver
2019-07-15 02:44:15 -04:00
static const char *GPIO_TAG = "gpio";
dac: apply generic check macro
2021-08-25 05:02:19 -04:00
#define GPIO_CHECK(a, str, ret_val) ESP_RETURN_ON_FALSE(a, ret_val, GPIO_TAG, "%s", str)
soc: updates caps usage We should define caps as 1 if true. When use the caps macros, #if and #if ! should be used instead of #ifdef/#ifndef.
2020-09-12 05:58:30 -04:00
bugfix(GPIO): Fixed the bug that GPIO enables interrupts on one core, but registers interrupt service routines on another core closes https://github.com/espressif/esp-idf/issues/2808 closes https://github.com/espressif/esp-idf/issues/2845
2019-07-17 23:34:49 -04:00
#define GPIO_ISR_CORE_ID_UNINIT (3)
Convert Windows -> Unix line ends in gpio.c
2016-10-08 02:12:55 -04:00
soc: updates caps usage We should define caps as 1 if true. When use the caps macros, #if and #if ! should be used instead of #ifdef/#ifndef.
2020-09-12 05:58:30 -04:00
//default value for SOC_GPIO_SUPPORT_RTC_INDEPENDENT is 0
#ifndef SOC_GPIO_SUPPORT_RTC_INDEPENDENT
#define SOC_GPIO_SUPPORT_RTC_INDEPENDENT 0
#endif
gpio_driver: add per-pin interrupt handlers 1. add ISR handler apis so that users of different layers can hook their own isr handler on different GPIO. Audio project has different software layers, they need different gpio isr handler for layer instead of processing all GPIO interrupts in one handler. If this kind of calling a handler from isr is not proper, please kindly point out. 2. add gpio example code. 3. improve gpio.rst 4. add readme for gpio example Squashed commits: [278e50f] update: GPIO 1. coding style, add a space between conditional or loop keyword and an opening paren. 2. modify some return value and doc 3. use printf in example code Squashed commits: [efb23bb] minor change of comment
2016-12-24 07:45:57 -05:00
typedef struct {
gpio_isr_t fn; /*!< isr function */
refactor(gpio): add hal gpio driver
2019-07-15 02:44:15 -04:00
void *args; /*!< isr function args */
gpio_driver: add per-pin interrupt handlers 1. add ISR handler apis so that users of different layers can hook their own isr handler on different GPIO. Audio project has different software layers, they need different gpio isr handler for layer instead of processing all GPIO interrupts in one handler. If this kind of calling a handler from isr is not proper, please kindly point out. 2. add gpio example code. 3. improve gpio.rst 4. add readme for gpio example Squashed commits: [278e50f] update: GPIO 1. coding style, add a space between conditional or loop keyword and an opening paren. 2. modify some return value and doc 3. use printf in example code Squashed commits: [efb23bb] minor change of comment
2016-12-24 07:45:57 -05:00
} gpio_isr_func_t;
bugfix(GPIO): Fixed the bug that GPIO enables interrupts on one core, but registers interrupt service routines on another core closes https://github.com/espressif/esp-idf/issues/2808 closes https://github.com/espressif/esp-idf/issues/2845
2019-07-17 23:34:49 -04:00
// Used by the IPC call to register the interrupt service routine.
typedef struct {
int source; /*!< ISR source */
int intr_alloc_flags; /*!< ISR alloc flag */
void (*fn)(void*); /*!< ISR function */
void *arg; /*!< ISR function args*/
void *handle; /*!< ISR handle */
esp_err_t ret;
} gpio_isr_alloc_t;
refactor(gpio): add hal gpio driver
2019-07-15 02:44:15 -04:00
typedef struct {
gpio_hal_context_t *gpio_hal;
portMUX_TYPE gpio_spinlock;
uint32_t isr_core_id;
gpio_isr_func_t *gpio_isr_func;
gpio_isr_handle_t gpio_isr_handle;
gpio: Fix interrupt lost issue In previous gpio default isr, interrupt status bits get cleared at the exit of the isr. However, for edge-triggered interrupt type, the interrupt status bit should be cleared before entering the per-pin handlers to avoid any potential interrupt lost. Closes https://github.com/espressif/esp-idf/pull/6853
2022-08-24 05:06:20 -04:00
uint64_t isr_clr_on_entry_mask; // for edge-triggered interrupts, interrupt status bits should be cleared before entering per-pin handlers
refactor(gpio): add hal gpio driver
2019-07-15 02:44:15 -04:00
} gpio_context_t;
static gpio_hal_context_t _gpio_hal = {
.dev = GPIO_HAL_GET_HW(GPIO_PORT_0)
};
static gpio_context_t gpio_context = {
.gpio_hal = &_gpio_hal,
.gpio_spinlock = portMUX_INITIALIZER_UNLOCKED,
.isr_core_id = GPIO_ISR_CORE_ID_UNINIT,
.gpio_isr_func = NULL,
gpio: Fix interrupt lost issue In previous gpio default isr, interrupt status bits get cleared at the exit of the isr. However, for edge-triggered interrupt type, the interrupt status bit should be cleared before entering the per-pin handlers to avoid any potential interrupt lost. Closes https://github.com/espressif/esp-idf/pull/6853
2022-08-24 05:06:20 -04:00
.isr_clr_on_entry_mask = 0,
refactor(gpio): add hal gpio driver
2019-07-15 02:44:15 -04:00
};
gpio_driver: add per-pin interrupt handlers 1. add ISR handler apis so that users of different layers can hook their own isr handler on different GPIO. Audio project has different software layers, they need different gpio isr handler for layer instead of processing all GPIO interrupts in one handler. If this kind of calling a handler from isr is not proper, please kindly point out. 2. add gpio example code. 3. improve gpio.rst 4. add readme for gpio example Squashed commits: [278e50f] update: GPIO 1. coding style, add a space between conditional or loop keyword and an opening paren. 2. modify some return value and doc 3. use printf in example code Squashed commits: [efb23bb] minor change of comment
2016-12-24 07:45:57 -05:00
esp_err_t gpio_pullup_en(gpio_num_t gpio_num)
{
Amend gpio driver to work around SoC bug with some pullups/pulldowns in the GPIO peripheral; mark existing function that does not always work as deprecated
2016-11-14 21:29:52 -05:00
GPIO_CHECK(GPIO_IS_VALID_GPIO(gpio_num), "GPIO number error", ESP_ERR_INVALID_ARG);
refactor(gpio): add hal gpio driver
2019-07-15 02:44:15 -04:00
soc: combine xxx_caps.h into one soc_caps.h During HAL layer refactoring and new chip bringup, we have several caps.h for each part, to reduce the conflicts to minimum. But this is The capabilities headers will be relataive stable once completely written (maybe after the featues are supported by drivers). Now ESP32 and ESP32-S2 drivers are relative stable, making it a good time to combine all these caps.h into one soc_caps.h This cleanup also move HAL config and pin config into separated files, to make the responsibilities of these headers more clear. This is helpful for the stabilities of soc_caps.h because we want to make it public some day.
2020-09-09 22:37:58 -04:00
if (!rtc_gpio_is_valid_gpio(gpio_num) || SOC_GPIO_SUPPORT_RTC_INDEPENDENT) {
refactor(gpio): add hal gpio driver
2019-07-15 02:44:15 -04:00
portENTER_CRITICAL(&gpio_context.gpio_spinlock);
gpio_hal_pullup_en(gpio_context.gpio_hal, gpio_num);
portEXIT_CRITICAL(&gpio_context.gpio_spinlock);
bugfix(gpio):fix esp32 s2 rtc io issue * Modify the function implementation of ESP32-S2 RTC GPIO On ESP32 those PADs which have RTC functions must set pullup/down/capability via RTC register. On ESP32-S2, Digital IOs have their own registers to control pullup/down/capability, independent with RTC registers. * Add ESP32-S2 support of unit test * Modify the pull-up test of unit test * Modify the interrupt test of unit test * Modify input and output mode test of unit test
2019-11-26 07:00:24 -05:00
} else {
esp32c3: Apply one-liner/small changes for ESP32-C3
2020-11-26 03:56:13 -05:00
#if SOC_RTCIO_INPUT_OUTPUT_SUPPORTED
bugfix(gpio):fix esp32 s2 rtc io issue * Modify the function implementation of ESP32-S2 RTC GPIO On ESP32 those PADs which have RTC functions must set pullup/down/capability via RTC register. On ESP32-S2, Digital IOs have their own registers to control pullup/down/capability, independent with RTC registers. * Add ESP32-S2 support of unit test * Modify the pull-up test of unit test * Modify the interrupt test of unit test * Modify input and output mode test of unit test
2019-11-26 07:00:24 -05:00
rtc_gpio_pullup_en(gpio_num);
esp32c3: Apply one-liner/small changes for ESP32-C3
2020-11-26 03:56:13 -05:00
#else
abort(); // This should be eliminated as unreachable, unless a programming error has occured
#endif
driver: add rtc module and bugfix gpio32 gpio33 feature(rtc_module):add rtc module 1. add rtc io control API (pull,output and input) 2. add touch pad API (touch pad read and interrupt) 3. add adc1 API (the max width is 12 Bits and support attenuation) 4. add hall sensor API (support hall sensor read ) 5. add dac API (the width is 8 Bits) bugfix(gpio):gpio32 and gpio33 can not output and input the gpio32 and gpio33 is initialize by librtc.a,and gpio_config not initialize the gpio as digital gpio.they can not output and input,when users use gpio32 or gpio33.And there are some problems about others driver ,when they use gpio32 or gpio33 as matrix.
2016-12-07 01:18:10 -05:00
}
refactor(gpio): add hal gpio driver
2019-07-15 02:44:15 -04:00
Amend gpio driver to work around SoC bug with some pullups/pulldowns in the GPIO peripheral; mark existing function that does not always work as deprecated
2016-11-14 21:29:52 -05:00
return ESP_OK;
}
gpio_driver: add per-pin interrupt handlers 1. add ISR handler apis so that users of different layers can hook their own isr handler on different GPIO. Audio project has different software layers, they need different gpio isr handler for layer instead of processing all GPIO interrupts in one handler. If this kind of calling a handler from isr is not proper, please kindly point out. 2. add gpio example code. 3. improve gpio.rst 4. add readme for gpio example Squashed commits: [278e50f] update: GPIO 1. coding style, add a space between conditional or loop keyword and an opening paren. 2. modify some return value and doc 3. use printf in example code Squashed commits: [efb23bb] minor change of comment
2016-12-24 07:45:57 -05:00
esp_err_t gpio_pullup_dis(gpio_num_t gpio_num)
{
Amend gpio driver to work around SoC bug with some pullups/pulldowns in the GPIO peripheral; mark existing function that does not always work as deprecated
2016-11-14 21:29:52 -05:00
GPIO_CHECK(GPIO_IS_VALID_GPIO(gpio_num), "GPIO number error", ESP_ERR_INVALID_ARG);
refactor(gpio): add hal gpio driver
2019-07-15 02:44:15 -04:00
soc: combine xxx_caps.h into one soc_caps.h During HAL layer refactoring and new chip bringup, we have several caps.h for each part, to reduce the conflicts to minimum. But this is The capabilities headers will be relataive stable once completely written (maybe after the featues are supported by drivers). Now ESP32 and ESP32-S2 drivers are relative stable, making it a good time to combine all these caps.h into one soc_caps.h This cleanup also move HAL config and pin config into separated files, to make the responsibilities of these headers more clear. This is helpful for the stabilities of soc_caps.h because we want to make it public some day.
2020-09-09 22:37:58 -04:00
if (!rtc_gpio_is_valid_gpio(gpio_num) || SOC_GPIO_SUPPORT_RTC_INDEPENDENT) {
refactor(gpio): add hal gpio driver
2019-07-15 02:44:15 -04:00
portENTER_CRITICAL(&gpio_context.gpio_spinlock);
gpio_hal_pullup_dis(gpio_context.gpio_hal, gpio_num);
portEXIT_CRITICAL(&gpio_context.gpio_spinlock);
bugfix(gpio):fix esp32 s2 rtc io issue * Modify the function implementation of ESP32-S2 RTC GPIO On ESP32 those PADs which have RTC functions must set pullup/down/capability via RTC register. On ESP32-S2, Digital IOs have their own registers to control pullup/down/capability, independent with RTC registers. * Add ESP32-S2 support of unit test * Modify the pull-up test of unit test * Modify the interrupt test of unit test * Modify input and output mode test of unit test
2019-11-26 07:00:24 -05:00
} else {
esp32c3: Apply one-liner/small changes for ESP32-C3
2020-11-26 03:56:13 -05:00
#if SOC_RTCIO_INPUT_OUTPUT_SUPPORTED
bugfix(gpio):fix esp32 s2 rtc io issue * Modify the function implementation of ESP32-S2 RTC GPIO On ESP32 those PADs which have RTC functions must set pullup/down/capability via RTC register. On ESP32-S2, Digital IOs have their own registers to control pullup/down/capability, independent with RTC registers. * Add ESP32-S2 support of unit test * Modify the pull-up test of unit test * Modify the interrupt test of unit test * Modify input and output mode test of unit test
2019-11-26 07:00:24 -05:00
rtc_gpio_pullup_dis(gpio_num);
esp32c3: Apply one-liner/small changes for ESP32-C3
2020-11-26 03:56:13 -05:00
#else
abort(); // This should be eliminated as unreachable, unless a programming error has occured
#endif
driver: add rtc module and bugfix gpio32 gpio33 feature(rtc_module):add rtc module 1. add rtc io control API (pull,output and input) 2. add touch pad API (touch pad read and interrupt) 3. add adc1 API (the max width is 12 Bits and support attenuation) 4. add hall sensor API (support hall sensor read ) 5. add dac API (the width is 8 Bits) bugfix(gpio):gpio32 and gpio33 can not output and input the gpio32 and gpio33 is initialize by librtc.a,and gpio_config not initialize the gpio as digital gpio.they can not output and input,when users use gpio32 or gpio33.And there are some problems about others driver ,when they use gpio32 or gpio33 as matrix.
2016-12-07 01:18:10 -05:00
}
refactor(gpio): add hal gpio driver
2019-07-15 02:44:15 -04:00
Amend gpio driver to work around SoC bug with some pullups/pulldowns in the GPIO peripheral; mark existing function that does not always work as deprecated
2016-11-14 21:29:52 -05:00
return ESP_OK;
}
gpio_driver: add per-pin interrupt handlers 1. add ISR handler apis so that users of different layers can hook their own isr handler on different GPIO. Audio project has different software layers, they need different gpio isr handler for layer instead of processing all GPIO interrupts in one handler. If this kind of calling a handler from isr is not proper, please kindly point out. 2. add gpio example code. 3. improve gpio.rst 4. add readme for gpio example Squashed commits: [278e50f] update: GPIO 1. coding style, add a space between conditional or loop keyword and an opening paren. 2. modify some return value and doc 3. use printf in example code Squashed commits: [efb23bb] minor change of comment
2016-12-24 07:45:57 -05:00
esp_err_t gpio_pulldown_en(gpio_num_t gpio_num)
{
Amend gpio driver to work around SoC bug with some pullups/pulldowns in the GPIO peripheral; mark existing function that does not always work as deprecated
2016-11-14 21:29:52 -05:00
GPIO_CHECK(GPIO_IS_VALID_GPIO(gpio_num), "GPIO number error", ESP_ERR_INVALID_ARG);
refactor(gpio): add hal gpio driver
2019-07-15 02:44:15 -04:00
soc: combine xxx_caps.h into one soc_caps.h During HAL layer refactoring and new chip bringup, we have several caps.h for each part, to reduce the conflicts to minimum. But this is The capabilities headers will be relataive stable once completely written (maybe after the featues are supported by drivers). Now ESP32 and ESP32-S2 drivers are relative stable, making it a good time to combine all these caps.h into one soc_caps.h This cleanup also move HAL config and pin config into separated files, to make the responsibilities of these headers more clear. This is helpful for the stabilities of soc_caps.h because we want to make it public some day.
2020-09-09 22:37:58 -04:00
if (!rtc_gpio_is_valid_gpio(gpio_num) || SOC_GPIO_SUPPORT_RTC_INDEPENDENT) {
refactor(gpio): add hal gpio driver
2019-07-15 02:44:15 -04:00
portENTER_CRITICAL(&gpio_context.gpio_spinlock);
gpio_hal_pulldown_en(gpio_context.gpio_hal, gpio_num);
portEXIT_CRITICAL(&gpio_context.gpio_spinlock);
bugfix(gpio):fix esp32 s2 rtc io issue * Modify the function implementation of ESP32-S2 RTC GPIO On ESP32 those PADs which have RTC functions must set pullup/down/capability via RTC register. On ESP32-S2, Digital IOs have their own registers to control pullup/down/capability, independent with RTC registers. * Add ESP32-S2 support of unit test * Modify the pull-up test of unit test * Modify the interrupt test of unit test * Modify input and output mode test of unit test
2019-11-26 07:00:24 -05:00
} else {
esp32c3: Apply one-liner/small changes for ESP32-C3
2020-11-26 03:56:13 -05:00
#if SOC_RTCIO_INPUT_OUTPUT_SUPPORTED
bugfix(gpio):fix esp32 s2 rtc io issue * Modify the function implementation of ESP32-S2 RTC GPIO On ESP32 those PADs which have RTC functions must set pullup/down/capability via RTC register. On ESP32-S2, Digital IOs have their own registers to control pullup/down/capability, independent with RTC registers. * Add ESP32-S2 support of unit test * Modify the pull-up test of unit test * Modify the interrupt test of unit test * Modify input and output mode test of unit test
2019-11-26 07:00:24 -05:00
rtc_gpio_pulldown_en(gpio_num);
esp32c3: Apply one-liner/small changes for ESP32-C3
2020-11-26 03:56:13 -05:00
#else
abort(); // This should be eliminated as unreachable, unless a programming error has occured
#endif
driver: add rtc module and bugfix gpio32 gpio33 feature(rtc_module):add rtc module 1. add rtc io control API (pull,output and input) 2. add touch pad API (touch pad read and interrupt) 3. add adc1 API (the max width is 12 Bits and support attenuation) 4. add hall sensor API (support hall sensor read ) 5. add dac API (the width is 8 Bits) bugfix(gpio):gpio32 and gpio33 can not output and input the gpio32 and gpio33 is initialize by librtc.a,and gpio_config not initialize the gpio as digital gpio.they can not output and input,when users use gpio32 or gpio33.And there are some problems about others driver ,when they use gpio32 or gpio33 as matrix.
2016-12-07 01:18:10 -05:00
}
refactor(gpio): add hal gpio driver
2019-07-15 02:44:15 -04:00
Amend gpio driver to work around SoC bug with some pullups/pulldowns in the GPIO peripheral; mark existing function that does not always work as deprecated
2016-11-14 21:29:52 -05:00
return ESP_OK;
}
gpio_driver: add per-pin interrupt handlers 1. add ISR handler apis so that users of different layers can hook their own isr handler on different GPIO. Audio project has different software layers, they need different gpio isr handler for layer instead of processing all GPIO interrupts in one handler. If this kind of calling a handler from isr is not proper, please kindly point out. 2. add gpio example code. 3. improve gpio.rst 4. add readme for gpio example Squashed commits: [278e50f] update: GPIO 1. coding style, add a space between conditional or loop keyword and an opening paren. 2. modify some return value and doc 3. use printf in example code Squashed commits: [efb23bb] minor change of comment
2016-12-24 07:45:57 -05:00
esp_err_t gpio_pulldown_dis(gpio_num_t gpio_num)
{
Amend gpio driver to work around SoC bug with some pullups/pulldowns in the GPIO peripheral; mark existing function that does not always work as deprecated
2016-11-14 21:29:52 -05:00
GPIO_CHECK(GPIO_IS_VALID_GPIO(gpio_num), "GPIO number error", ESP_ERR_INVALID_ARG);
refactor(gpio): add hal gpio driver
2019-07-15 02:44:15 -04:00
soc: combine xxx_caps.h into one soc_caps.h During HAL layer refactoring and new chip bringup, we have several caps.h for each part, to reduce the conflicts to minimum. But this is The capabilities headers will be relataive stable once completely written (maybe after the featues are supported by drivers). Now ESP32 and ESP32-S2 drivers are relative stable, making it a good time to combine all these caps.h into one soc_caps.h This cleanup also move HAL config and pin config into separated files, to make the responsibilities of these headers more clear. This is helpful for the stabilities of soc_caps.h because we want to make it public some day.
2020-09-09 22:37:58 -04:00
if (!rtc_gpio_is_valid_gpio(gpio_num) || SOC_GPIO_SUPPORT_RTC_INDEPENDENT) {
refactor(gpio): add hal gpio driver
2019-07-15 02:44:15 -04:00
portENTER_CRITICAL(&gpio_context.gpio_spinlock);
gpio_hal_pulldown_dis(gpio_context.gpio_hal, gpio_num);
portEXIT_CRITICAL(&gpio_context.gpio_spinlock);
bugfix(gpio):fix esp32 s2 rtc io issue * Modify the function implementation of ESP32-S2 RTC GPIO On ESP32 those PADs which have RTC functions must set pullup/down/capability via RTC register. On ESP32-S2, Digital IOs have their own registers to control pullup/down/capability, independent with RTC registers. * Add ESP32-S2 support of unit test * Modify the pull-up test of unit test * Modify the interrupt test of unit test * Modify input and output mode test of unit test
2019-11-26 07:00:24 -05:00
} else {
esp32c3: Apply one-liner/small changes for ESP32-C3
2020-11-26 03:56:13 -05:00
#if SOC_RTCIO_INPUT_OUTPUT_SUPPORTED
bugfix(gpio):fix esp32 s2 rtc io issue * Modify the function implementation of ESP32-S2 RTC GPIO On ESP32 those PADs which have RTC functions must set pullup/down/capability via RTC register. On ESP32-S2, Digital IOs have their own registers to control pullup/down/capability, independent with RTC registers. * Add ESP32-S2 support of unit test * Modify the pull-up test of unit test * Modify the interrupt test of unit test * Modify input and output mode test of unit test
2019-11-26 07:00:24 -05:00
rtc_gpio_pulldown_dis(gpio_num);
esp32c3: Apply one-liner/small changes for ESP32-C3
2020-11-26 03:56:13 -05:00
#else
abort(); // This should be eliminated as unreachable, unless a programming error has occured
#endif
driver: add rtc module and bugfix gpio32 gpio33 feature(rtc_module):add rtc module 1. add rtc io control API (pull,output and input) 2. add touch pad API (touch pad read and interrupt) 3. add adc1 API (the max width is 12 Bits and support attenuation) 4. add hall sensor API (support hall sensor read ) 5. add dac API (the width is 8 Bits) bugfix(gpio):gpio32 and gpio33 can not output and input the gpio32 and gpio33 is initialize by librtc.a,and gpio_config not initialize the gpio as digital gpio.they can not output and input,when users use gpio32 or gpio33.And there are some problems about others driver ,when they use gpio32 or gpio33 as matrix.
2016-12-07 01:18:10 -05:00
}
refactor(gpio): add hal gpio driver
2019-07-15 02:44:15 -04:00
Amend gpio driver to work around SoC bug with some pullups/pulldowns in the GPIO peripheral; mark existing function that does not always work as deprecated
2016-11-14 21:29:52 -05:00
return ESP_OK;
}
gpio_driver: add per-pin interrupt handlers 1. add ISR handler apis so that users of different layers can hook their own isr handler on different GPIO. Audio project has different software layers, they need different gpio isr handler for layer instead of processing all GPIO interrupts in one handler. If this kind of calling a handler from isr is not proper, please kindly point out. 2. add gpio example code. 3. improve gpio.rst 4. add readme for gpio example Squashed commits: [278e50f] update: GPIO 1. coding style, add a space between conditional or loop keyword and an opening paren. 2. modify some return value and doc 3. use printf in example code Squashed commits: [efb23bb] minor change of comment
2016-12-24 07:45:57 -05:00
Convert Windows -> Unix line ends in gpio.c
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esp_err_t gpio_set_intr_type(gpio_num_t gpio_num, gpio_int_type_t intr_type)
{
Minor changes for driver 1. remove "\n" when calling ESP_LOGX APIs. 2. modify uart_event_t for uart rx data. 3. use MICRO for uart inverse value 4. add uart_tx_data_t for internal tx function.
2016-11-07 01:16:52 -05:00
GPIO_CHECK(GPIO_IS_VALID_GPIO(gpio_num), "GPIO number error", ESP_ERR_INVALID_ARG);
GPIO_CHECK(intr_type < GPIO_INTR_MAX, "GPIO interrupt type error", ESP_ERR_INVALID_ARG);
Convert Windows -> Unix line ends in gpio.c
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refactor(gpio): add hal gpio driver
2019-07-15 02:44:15 -04:00
portENTER_CRITICAL(&gpio_context.gpio_spinlock);
gpio_hal_set_intr_type(gpio_context.gpio_hal, gpio_num, intr_type);
gpio: Fix interrupt lost issue In previous gpio default isr, interrupt status bits get cleared at the exit of the isr. However, for edge-triggered interrupt type, the interrupt status bit should be cleared before entering the per-pin handlers to avoid any potential interrupt lost. Closes https://github.com/espressif/esp-idf/pull/6853
2022-08-24 05:06:20 -04:00
if (intr_type == GPIO_INTR_POSEDGE || intr_type == GPIO_INTR_NEGEDGE || intr_type == GPIO_INTR_ANYEDGE) {
gpio_context.isr_clr_on_entry_mask |= (1ULL << (gpio_num));
} else {
gpio_context.isr_clr_on_entry_mask &= ~(1ULL << (gpio_num));
}
refactor(gpio): add hal gpio driver
2019-07-15 02:44:15 -04:00
portEXIT_CRITICAL(&gpio_context.gpio_spinlock);
return ESP_OK;
driver(gpio) : Fixed the gpio related bug for release v3.1.
2018-06-03 22:34:23 -04:00
}
refactor(gpio): add hal gpio driver
2019-07-15 02:44:15 -04:00
static esp_err_t gpio_intr_enable_on_core(gpio_num_t gpio_num, uint32_t core_id)
Convert Windows -> Unix line ends in gpio.c
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{
refactor(gpio): add hal gpio driver
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gpio_hal_intr_enable_on_core(gpio_context.gpio_hal, gpio_num, core_id);
Convert Windows -> Unix line ends in gpio.c
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return ESP_OK;
}
gpio: Attach gpio intr to the isr_server on the right core. Make sure GPIO interrupts get attached to the core that the ISR service routine is running on, otherwise they don't arrive.
2017-01-19 07:46:41 -05:00
esp_err_t gpio_intr_enable(gpio_num_t gpio_num)
{
bugfix(GPIO): Fixed the bug that GPIO enables interrupts on one core, but registers interrupt service routines on another core closes https://github.com/espressif/esp-idf/issues/2808 closes https://github.com/espressif/esp-idf/issues/2845
2019-07-17 23:34:49 -04:00
GPIO_CHECK(GPIO_IS_VALID_GPIO(gpio_num), "GPIO number error", ESP_ERR_INVALID_ARG);
refactor(gpio): add hal gpio driver
2019-07-15 02:44:15 -04:00
portENTER_CRITICAL(&gpio_context.gpio_spinlock);
if(gpio_context.isr_core_id == GPIO_ISR_CORE_ID_UNINIT) {
gpio_context.isr_core_id = xPortGetCoreID();
bugfix(GPIO): Fixed the bug that GPIO enables interrupts on one core, but registers interrupt service routines on another core closes https://github.com/espressif/esp-idf/issues/2808 closes https://github.com/espressif/esp-idf/issues/2845
2019-07-17 23:34:49 -04:00
}
refactor(gpio): add hal gpio driver
2019-07-15 02:44:15 -04:00
portEXIT_CRITICAL(&gpio_context.gpio_spinlock);
return gpio_intr_enable_on_core (gpio_num, gpio_context.isr_core_id);
gpio: Attach gpio intr to the isr_server on the right core. Make sure GPIO interrupts get attached to the core that the ISR service routine is running on, otherwise they don't arrive.
2017-01-19 07:46:41 -05:00
}
Convert Windows -> Unix line ends in gpio.c
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esp_err_t gpio_intr_disable(gpio_num_t gpio_num)
{
Minor changes for driver 1. remove "\n" when calling ESP_LOGX APIs. 2. modify uart_event_t for uart rx data. 3. use MICRO for uart inverse value 4. add uart_tx_data_t for internal tx function.
2016-11-07 01:16:52 -05:00
GPIO_CHECK(GPIO_IS_VALID_GPIO(gpio_num), "GPIO number error", ESP_ERR_INVALID_ARG);
refactor(gpio): add hal gpio driver
2019-07-15 02:44:15 -04:00
gpio_hal_intr_disable(gpio_context.gpio_hal, gpio_num);
Convert Windows -> Unix line ends in gpio.c
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return ESP_OK;
}
refactor(gpio): add hal gpio driver
2019-07-15 02:44:15 -04:00
static esp_err_t gpio_input_disable(gpio_num_t gpio_num)
Convert Windows -> Unix line ends in gpio.c
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{
Minor changes for driver 1. remove "\n" when calling ESP_LOGX APIs. 2. modify uart_event_t for uart rx data. 3. use MICRO for uart inverse value 4. add uart_tx_data_t for internal tx function.
2016-11-07 01:16:52 -05:00
GPIO_CHECK(GPIO_IS_VALID_GPIO(gpio_num), "GPIO number error", ESP_ERR_INVALID_ARG);
refactor(gpio): add hal gpio driver
2019-07-15 02:44:15 -04:00
gpio_hal_input_disable(gpio_context.gpio_hal, gpio_num);
return ESP_OK;
}
gpio driver: Clear GPIO matrix output config when setting pin as input Otherwise, if a non-GPIO peripheral has been routed to this pin (as an output), output driver can remain enabled.
2017-06-25 22:41:40 -04:00
refactor(gpio): add hal gpio driver
2019-07-15 02:44:15 -04:00
static esp_err_t gpio_input_enable(gpio_num_t gpio_num)
{
GPIO_CHECK(GPIO_IS_VALID_GPIO(gpio_num), "GPIO number error", ESP_ERR_INVALID_ARG);
gpio_hal_input_enable(gpio_context.gpio_hal, gpio_num);
return ESP_OK;
}
gpio driver: Clear GPIO matrix output config when setting pin as input Otherwise, if a non-GPIO peripheral has been routed to this pin (as an output), output driver can remain enabled.
2017-06-25 22:41:40 -04:00
refactor(gpio): add hal gpio driver
2019-07-15 02:44:15 -04:00
static esp_err_t gpio_output_disable(gpio_num_t gpio_num)
{
GPIO_CHECK(GPIO_IS_VALID_GPIO(gpio_num), "GPIO number error", ESP_ERR_INVALID_ARG);
gpio_hal_output_disable(gpio_context.gpio_hal, gpio_num);
Convert Windows -> Unix line ends in gpio.c
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return ESP_OK;
}
static esp_err_t gpio_output_enable(gpio_num_t gpio_num)
{
Minor changes for driver 1. remove "\n" when calling ESP_LOGX APIs. 2. modify uart_event_t for uart rx data. 3. use MICRO for uart inverse value 4. add uart_tx_data_t for internal tx function.
2016-11-07 01:16:52 -05:00
GPIO_CHECK(GPIO_IS_VALID_OUTPUT_GPIO(gpio_num), "GPIO output gpio_num error", ESP_ERR_INVALID_ARG);
refactor(gpio): add hal gpio driver
2019-07-15 02:44:15 -04:00
gpio_hal_output_enable(gpio_context.gpio_hal, gpio_num);
esp_rom: extract common GPIO apis into esp_rom_gpio.h
2020-06-19 00:00:58 -04:00
esp_rom_gpio_connect_out_signal(gpio_num, SIG_GPIO_OUT_IDX, false, false);
Convert Windows -> Unix line ends in gpio.c
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return ESP_OK;
}
refactor(gpio): add hal gpio driver
2019-07-15 02:44:15 -04:00
static esp_err_t gpio_od_disable(gpio_num_t gpio_num)
{
GPIO_CHECK(GPIO_IS_VALID_GPIO(gpio_num), "GPIO number error", ESP_ERR_INVALID_ARG);
gpio_hal_od_disable(gpio_context.gpio_hal, gpio_num);
return ESP_OK;
}
static esp_err_t gpio_od_enable(gpio_num_t gpio_num)
{
GPIO_CHECK(GPIO_IS_VALID_GPIO(gpio_num), "GPIO number error", ESP_ERR_INVALID_ARG);
gpio_hal_od_enable(gpio_context.gpio_hal, gpio_num);
return ESP_OK;
}
Convert Windows -> Unix line ends in gpio.c
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esp_err_t gpio_set_level(gpio_num_t gpio_num, uint32_t level)
{
gpio driver: Fix gpio_set_level validation of gpio_num argument Closes #125 https://github.com/espressif/esp-idf/issues/125
2016-12-21 21:05:19 -05:00
GPIO_CHECK(GPIO_IS_VALID_OUTPUT_GPIO(gpio_num), "GPIO output gpio_num error", ESP_ERR_INVALID_ARG);
refactor(gpio): add hal gpio driver
2019-07-15 02:44:15 -04:00
gpio_hal_set_level(gpio_context.gpio_hal, gpio_num, level);
Convert Windows -> Unix line ends in gpio.c
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return ESP_OK;
}
int gpio_get_level(gpio_num_t gpio_num)
{
refactor(gpio): add hal gpio driver
2019-07-15 02:44:15 -04:00
return gpio_hal_get_level(gpio_context.gpio_hal, gpio_num);
Convert Windows -> Unix line ends in gpio.c
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}
esp_err_t gpio_set_pull_mode(gpio_num_t gpio_num, gpio_pull_mode_t pull)
{
Minor changes for driver 1. remove "\n" when calling ESP_LOGX APIs. 2. modify uart_event_t for uart rx data. 3. use MICRO for uart inverse value 4. add uart_tx_data_t for internal tx function.
2016-11-07 01:16:52 -05:00
GPIO_CHECK(GPIO_IS_VALID_GPIO(gpio_num), "GPIO number error", ESP_ERR_INVALID_ARG);
GPIO_CHECK(pull <= GPIO_FLOATING, "GPIO pull mode error", ESP_ERR_INVALID_ARG);
Convert Windows -> Unix line ends in gpio.c
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esp_err_t ret = ESP_OK;
refactor(gpio): add hal gpio driver
2019-07-15 02:44:15 -04:00
driver: add rtc module and bugfix gpio32 gpio33 feature(rtc_module):add rtc module 1. add rtc io control API (pull,output and input) 2. add touch pad API (touch pad read and interrupt) 3. add adc1 API (the max width is 12 Bits and support attenuation) 4. add hall sensor API (support hall sensor read ) 5. add dac API (the width is 8 Bits) bugfix(gpio):gpio32 and gpio33 can not output and input the gpio32 and gpio33 is initialize by librtc.a,and gpio_config not initialize the gpio as digital gpio.they can not output and input,when users use gpio32 or gpio33.And there are some problems about others driver ,when they use gpio32 or gpio33 as matrix.
2016-12-07 01:18:10 -05:00
switch (pull) {
refactor(gpio): add hal gpio driver
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case GPIO_PULLUP_ONLY:
gpio_pulldown_dis(gpio_num);
gpio_pullup_en(gpio_num);
break;
case GPIO_PULLDOWN_ONLY:
gpio_pulldown_en(gpio_num);
gpio_pullup_dis(gpio_num);
break;
case GPIO_PULLUP_PULLDOWN:
gpio_pulldown_en(gpio_num);
gpio_pullup_en(gpio_num);
break;
case GPIO_FLOATING:
gpio_pulldown_dis(gpio_num);
gpio_pullup_dis(gpio_num);
break;
default:
ESP_LOGE(GPIO_TAG, "Unknown pull up/down mode,gpio_num=%u,pull=%u", gpio_num, pull);
ret = ESP_ERR_INVALID_ARG;
break;
Convert Windows -> Unix line ends in gpio.c
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}
refactor(gpio): add hal gpio driver
2019-07-15 02:44:15 -04:00
Convert Windows -> Unix line ends in gpio.c
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return ret;
}
esp_err_t gpio_set_direction(gpio_num_t gpio_num, gpio_mode_t mode)
{
Minor changes for driver 1. remove "\n" when calling ESP_LOGX APIs. 2. modify uart_event_t for uart rx data. 3. use MICRO for uart inverse value 4. add uart_tx_data_t for internal tx function.
2016-11-07 01:16:52 -05:00
GPIO_CHECK(GPIO_IS_VALID_GPIO(gpio_num), "GPIO number error", ESP_ERR_INVALID_ARG);
refactor(gpio): add hal gpio driver
2019-07-15 02:44:15 -04:00
if ((GPIO_IS_VALID_OUTPUT_GPIO(gpio_num) != true) && (mode & GPIO_MODE_DEF_OUTPUT)) {
driver: add rtc module and bugfix gpio32 gpio33 feature(rtc_module):add rtc module 1. add rtc io control API (pull,output and input) 2. add touch pad API (touch pad read and interrupt) 3. add adc1 API (the max width is 12 Bits and support attenuation) 4. add hall sensor API (support hall sensor read ) 5. add dac API (the width is 8 Bits) bugfix(gpio):gpio32 and gpio33 can not output and input the gpio32 and gpio33 is initialize by librtc.a,and gpio_config not initialize the gpio as digital gpio.they can not output and input,when users use gpio32 or gpio33.And there are some problems about others driver ,when they use gpio32 or gpio33 as matrix.
2016-12-07 01:18:10 -05:00
ESP_LOGE(GPIO_TAG, "io_num=%d can only be input", gpio_num);
Convert Windows -> Unix line ends in gpio.c
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return ESP_ERR_INVALID_ARG;
}
refactor(gpio): add hal gpio driver
2019-07-15 02:44:15 -04:00
Convert Windows -> Unix line ends in gpio.c
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esp_err_t ret = ESP_OK;
refactor(gpio): add hal gpio driver
2019-07-15 02:44:15 -04:00
driver: add rtc module and bugfix gpio32 gpio33 feature(rtc_module):add rtc module 1. add rtc io control API (pull,output and input) 2. add touch pad API (touch pad read and interrupt) 3. add adc1 API (the max width is 12 Bits and support attenuation) 4. add hall sensor API (support hall sensor read ) 5. add dac API (the width is 8 Bits) bugfix(gpio):gpio32 and gpio33 can not output and input the gpio32 and gpio33 is initialize by librtc.a,and gpio_config not initialize the gpio as digital gpio.they can not output and input,when users use gpio32 or gpio33.And there are some problems about others driver ,when they use gpio32 or gpio33 as matrix.
2016-12-07 01:18:10 -05:00
if (mode & GPIO_MODE_DEF_INPUT) {
refactor(gpio): add hal gpio driver
2019-07-15 02:44:15 -04:00
gpio_input_enable(gpio_num);
Convert Windows -> Unix line ends in gpio.c
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} else {
refactor(gpio): add hal gpio driver
2019-07-15 02:44:15 -04:00
gpio_input_disable(gpio_num);
Convert Windows -> Unix line ends in gpio.c
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}
refactor(gpio): add hal gpio driver
2019-07-15 02:44:15 -04:00
driver: add rtc module and bugfix gpio32 gpio33 feature(rtc_module):add rtc module 1. add rtc io control API (pull,output and input) 2. add touch pad API (touch pad read and interrupt) 3. add adc1 API (the max width is 12 Bits and support attenuation) 4. add hall sensor API (support hall sensor read ) 5. add dac API (the width is 8 Bits) bugfix(gpio):gpio32 and gpio33 can not output and input the gpio32 and gpio33 is initialize by librtc.a,and gpio_config not initialize the gpio as digital gpio.they can not output and input,when users use gpio32 or gpio33.And there are some problems about others driver ,when they use gpio32 or gpio33 as matrix.
2016-12-07 01:18:10 -05:00
if (mode & GPIO_MODE_DEF_OUTPUT) {
gpio driver: Clear GPIO matrix output config when setting pin as input Otherwise, if a non-GPIO peripheral has been routed to this pin (as an output), output driver can remain enabled.
2017-06-25 22:41:40 -04:00
gpio_output_enable(gpio_num);
Convert Windows -> Unix line ends in gpio.c
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} else {
gpio driver: Clear GPIO matrix output config when setting pin as input Otherwise, if a non-GPIO peripheral has been routed to this pin (as an output), output driver can remain enabled.
2017-06-25 22:41:40 -04:00
gpio_output_disable(gpio_num);
Convert Windows -> Unix line ends in gpio.c
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}
refactor(gpio): add hal gpio driver
2019-07-15 02:44:15 -04:00
driver: add rtc module and bugfix gpio32 gpio33 feature(rtc_module):add rtc module 1. add rtc io control API (pull,output and input) 2. add touch pad API (touch pad read and interrupt) 3. add adc1 API (the max width is 12 Bits and support attenuation) 4. add hall sensor API (support hall sensor read ) 5. add dac API (the width is 8 Bits) bugfix(gpio):gpio32 and gpio33 can not output and input the gpio32 and gpio33 is initialize by librtc.a,and gpio_config not initialize the gpio as digital gpio.they can not output and input,when users use gpio32 or gpio33.And there are some problems about others driver ,when they use gpio32 or gpio33 as matrix.
2016-12-07 01:18:10 -05:00
if (mode & GPIO_MODE_DEF_OD) {
refactor(gpio): add hal gpio driver
2019-07-15 02:44:15 -04:00
gpio_od_enable(gpio_num);
Convert Windows -> Unix line ends in gpio.c
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} else {
refactor(gpio): add hal gpio driver
2019-07-15 02:44:15 -04:00
gpio_od_disable(gpio_num);
Convert Windows -> Unix line ends in gpio.c
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}
refactor(gpio): add hal gpio driver
2019-07-15 02:44:15 -04:00
Convert Windows -> Unix line ends in gpio.c
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return ret;
}
components/driver: 'const' all config calls. Some were, some weren't. They all could/should be. Signed-off-by: Michel Pollet <buserror@gmail.com>
2017-04-13 13:33:33 -04:00
esp_err_t gpio_config(const gpio_config_t *pGPIOConfig)
Convert Windows -> Unix line ends in gpio.c
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{
uint64_t gpio_pin_mask = (pGPIOConfig->pin_bit_mask);
uint32_t io_reg = 0;
uint32_t io_num = 0;
Minor changes for driver 1. remove "\n" when calling ESP_LOGX APIs. 2. modify uart_event_t for uart rx data. 3. use MICRO for uart inverse value 4. add uart_tx_data_t for internal tx function.
2016-11-07 01:16:52 -05:00
uint8_t input_en = 0;
uint8_t output_en = 0;
uint8_t od_en = 0;
uint8_t pu_en = 0;
uint8_t pd_en = 0;
refactor(gpio): add hal gpio driver
2019-07-15 02:44:15 -04:00
soc: combine xxx_caps.h into one soc_caps.h During HAL layer refactoring and new chip bringup, we have several caps.h for each part, to reduce the conflicts to minimum. But this is The capabilities headers will be relataive stable once completely written (maybe after the featues are supported by drivers). Now ESP32 and ESP32-S2 drivers are relative stable, making it a good time to combine all these caps.h into one soc_caps.h This cleanup also move HAL config and pin config into separated files, to make the responsibilities of these headers more clear. This is helpful for the stabilities of soc_caps.h because we want to make it public some day.
2020-09-09 22:37:58 -04:00
if (pGPIOConfig->pin_bit_mask == 0 ||
pGPIOConfig->pin_bit_mask & ~SOC_GPIO_VALID_GPIO_MASK) {
Minor changes for driver 1. remove "\n" when calling ESP_LOGX APIs. 2. modify uart_event_t for uart rx data. 3. use MICRO for uart inverse value 4. add uart_tx_data_t for internal tx function.
2016-11-07 01:16:52 -05:00
ESP_LOGE(GPIO_TAG, "GPIO_PIN mask error ");
Convert Windows -> Unix line ends in gpio.c
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return ESP_ERR_INVALID_ARG;
}
refactor(gpio): add hal gpio driver
2019-07-15 02:44:15 -04:00
soc: combine xxx_caps.h into one soc_caps.h During HAL layer refactoring and new chip bringup, we have several caps.h for each part, to reduce the conflicts to minimum. But this is The capabilities headers will be relataive stable once completely written (maybe after the featues are supported by drivers). Now ESP32 and ESP32-S2 drivers are relative stable, making it a good time to combine all these caps.h into one soc_caps.h This cleanup also move HAL config and pin config into separated files, to make the responsibilities of these headers more clear. This is helpful for the stabilities of soc_caps.h because we want to make it public some day.
2020-09-09 22:37:58 -04:00
if (pGPIOConfig->mode & GPIO_MODE_DEF_OUTPUT &&
pGPIOConfig->pin_bit_mask & ~SOC_GPIO_VALID_OUTPUT_GPIO_MASK) {
ESP_LOGE(GPIO_TAG, "GPIO can only be used as input mode");
return ESP_ERR_INVALID_ARG;
Convert Windows -> Unix line ends in gpio.c
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}
refactor(gpio): add hal gpio driver
2019-07-15 02:44:15 -04:00
Convert Windows -> Unix line ends in gpio.c
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do {
io_reg = GPIO_PIN_MUX_REG[io_num];
refactor(gpio): add hal gpio driver
2019-07-15 02:44:15 -04:00
driver(gpio) : Fixed the gpio related bug for release v3.1.
2018-06-03 22:34:23 -04:00
if (((gpio_pin_mask >> io_num) & BIT(0))) {
soc: combine xxx_caps.h into one soc_caps.h During HAL layer refactoring and new chip bringup, we have several caps.h for each part, to reduce the conflicts to minimum. But this is The capabilities headers will be relataive stable once completely written (maybe after the featues are supported by drivers). Now ESP32 and ESP32-S2 drivers are relative stable, making it a good time to combine all these caps.h into one soc_caps.h This cleanup also move HAL config and pin config into separated files, to make the responsibilities of these headers more clear. This is helpful for the stabilities of soc_caps.h because we want to make it public some day.
2020-09-09 22:37:58 -04:00
assert(io_reg != (intptr_t)NULL);
refactor(gpio): add hal gpio driver
2019-07-15 02:44:15 -04:00
esp32c3: Apply one-liner/small changes for ESP32-C3
2020-11-26 03:56:13 -05:00
#if SOC_RTCIO_INPUT_OUTPUT_SUPPORTED
refactor(gpio): add hal gpio driver
2019-07-15 02:44:15 -04:00
if (rtc_gpio_is_valid_gpio(io_num)) {
driver: add rtc module and bugfix gpio32 gpio33 feature(rtc_module):add rtc module 1. add rtc io control API (pull,output and input) 2. add touch pad API (touch pad read and interrupt) 3. add adc1 API (the max width is 12 Bits and support attenuation) 4. add hall sensor API (support hall sensor read ) 5. add dac API (the width is 8 Bits) bugfix(gpio):gpio32 and gpio33 can not output and input the gpio32 and gpio33 is initialize by librtc.a,and gpio_config not initialize the gpio as digital gpio.they can not output and input,when users use gpio32 or gpio33.And there are some problems about others driver ,when they use gpio32 or gpio33 as matrix.
2016-12-07 01:18:10 -05:00
rtc_gpio_deinit(io_num);
}
esp32c3: Apply one-liner/small changes for ESP32-C3
2020-11-26 03:56:13 -05:00
#endif
refactor(gpio): add hal gpio driver
2019-07-15 02:44:15 -04:00
driver: add rtc module and bugfix gpio32 gpio33 feature(rtc_module):add rtc module 1. add rtc io control API (pull,output and input) 2. add touch pad API (touch pad read and interrupt) 3. add adc1 API (the max width is 12 Bits and support attenuation) 4. add hall sensor API (support hall sensor read ) 5. add dac API (the width is 8 Bits) bugfix(gpio):gpio32 and gpio33 can not output and input the gpio32 and gpio33 is initialize by librtc.a,and gpio_config not initialize the gpio as digital gpio.they can not output and input,when users use gpio32 or gpio33.And there are some problems about others driver ,when they use gpio32 or gpio33 as matrix.
2016-12-07 01:18:10 -05:00
if ((pGPIOConfig->mode) & GPIO_MODE_DEF_INPUT) {
Minor changes for driver 1. remove "\n" when calling ESP_LOGX APIs. 2. modify uart_event_t for uart rx data. 3. use MICRO for uart inverse value 4. add uart_tx_data_t for internal tx function.
2016-11-07 01:16:52 -05:00
input_en = 1;
refactor(gpio): add hal gpio driver
2019-07-15 02:44:15 -04:00
gpio_input_enable(io_num);
Convert Windows -> Unix line ends in gpio.c
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} else {
refactor(gpio): add hal gpio driver
2019-07-15 02:44:15 -04:00
gpio_input_disable(io_num);
Convert Windows -> Unix line ends in gpio.c
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}
refactor(gpio): add hal gpio driver
2019-07-15 02:44:15 -04:00
driver: add rtc module and bugfix gpio32 gpio33 feature(rtc_module):add rtc module 1. add rtc io control API (pull,output and input) 2. add touch pad API (touch pad read and interrupt) 3. add adc1 API (the max width is 12 Bits and support attenuation) 4. add hall sensor API (support hall sensor read ) 5. add dac API (the width is 8 Bits) bugfix(gpio):gpio32 and gpio33 can not output and input the gpio32 and gpio33 is initialize by librtc.a,and gpio_config not initialize the gpio as digital gpio.they can not output and input,when users use gpio32 or gpio33.And there are some problems about others driver ,when they use gpio32 or gpio33 as matrix.
2016-12-07 01:18:10 -05:00
if ((pGPIOConfig->mode) & GPIO_MODE_DEF_OD) {
Minor changes for driver 1. remove "\n" when calling ESP_LOGX APIs. 2. modify uart_event_t for uart rx data. 3. use MICRO for uart inverse value 4. add uart_tx_data_t for internal tx function.
2016-11-07 01:16:52 -05:00
od_en = 1;
refactor(gpio): add hal gpio driver
2019-07-15 02:44:15 -04:00
gpio_od_enable(io_num);
Convert Windows -> Unix line ends in gpio.c
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} else {
refactor(gpio): add hal gpio driver
2019-07-15 02:44:15 -04:00
gpio_od_disable(io_num);
Convert Windows -> Unix line ends in gpio.c
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}
refactor(gpio): add hal gpio driver
2019-07-15 02:44:15 -04:00
driver: add rtc module and bugfix gpio32 gpio33 feature(rtc_module):add rtc module 1. add rtc io control API (pull,output and input) 2. add touch pad API (touch pad read and interrupt) 3. add adc1 API (the max width is 12 Bits and support attenuation) 4. add hall sensor API (support hall sensor read ) 5. add dac API (the width is 8 Bits) bugfix(gpio):gpio32 and gpio33 can not output and input the gpio32 and gpio33 is initialize by librtc.a,and gpio_config not initialize the gpio as digital gpio.they can not output and input,when users use gpio32 or gpio33.And there are some problems about others driver ,when they use gpio32 or gpio33 as matrix.
2016-12-07 01:18:10 -05:00
if ((pGPIOConfig->mode) & GPIO_MODE_DEF_OUTPUT) {
Minor changes for driver 1. remove "\n" when calling ESP_LOGX APIs. 2. modify uart_event_t for uart rx data. 3. use MICRO for uart inverse value 4. add uart_tx_data_t for internal tx function.
2016-11-07 01:16:52 -05:00
output_en = 1;
Convert Windows -> Unix line ends in gpio.c
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gpio_output_enable(io_num);
} else {
gpio_output_disable(io_num);
}
refactor(gpio): add hal gpio driver
2019-07-15 02:44:15 -04:00
driver: add rtc module and bugfix gpio32 gpio33 feature(rtc_module):add rtc module 1. add rtc io control API (pull,output and input) 2. add touch pad API (touch pad read and interrupt) 3. add adc1 API (the max width is 12 Bits and support attenuation) 4. add hall sensor API (support hall sensor read ) 5. add dac API (the width is 8 Bits) bugfix(gpio):gpio32 and gpio33 can not output and input the gpio32 and gpio33 is initialize by librtc.a,and gpio_config not initialize the gpio as digital gpio.they can not output and input,when users use gpio32 or gpio33.And there are some problems about others driver ,when they use gpio32 or gpio33 as matrix.
2016-12-07 01:18:10 -05:00
if (pGPIOConfig->pull_up_en) {
Minor changes for driver 1. remove "\n" when calling ESP_LOGX APIs. 2. modify uart_event_t for uart rx data. 3. use MICRO for uart inverse value 4. add uart_tx_data_t for internal tx function.
2016-11-07 01:16:52 -05:00
pu_en = 1;
driver: add rtc module and bugfix gpio32 gpio33 feature(rtc_module):add rtc module 1. add rtc io control API (pull,output and input) 2. add touch pad API (touch pad read and interrupt) 3. add adc1 API (the max width is 12 Bits and support attenuation) 4. add hall sensor API (support hall sensor read ) 5. add dac API (the width is 8 Bits) bugfix(gpio):gpio32 and gpio33 can not output and input the gpio32 and gpio33 is initialize by librtc.a,and gpio_config not initialize the gpio as digital gpio.they can not output and input,when users use gpio32 or gpio33.And there are some problems about others driver ,when they use gpio32 or gpio33 as matrix.
2016-12-07 01:18:10 -05:00
gpio_pullup_en(io_num);
Convert Windows -> Unix line ends in gpio.c
2016-10-08 02:12:55 -04:00
} else {
driver: add rtc module and bugfix gpio32 gpio33 feature(rtc_module):add rtc module 1. add rtc io control API (pull,output and input) 2. add touch pad API (touch pad read and interrupt) 3. add adc1 API (the max width is 12 Bits and support attenuation) 4. add hall sensor API (support hall sensor read ) 5. add dac API (the width is 8 Bits) bugfix(gpio):gpio32 and gpio33 can not output and input the gpio32 and gpio33 is initialize by librtc.a,and gpio_config not initialize the gpio as digital gpio.they can not output and input,when users use gpio32 or gpio33.And there are some problems about others driver ,when they use gpio32 or gpio33 as matrix.
2016-12-07 01:18:10 -05:00
gpio_pullup_dis(io_num);
Convert Windows -> Unix line ends in gpio.c
2016-10-08 02:12:55 -04:00
}
refactor(gpio): add hal gpio driver
2019-07-15 02:44:15 -04:00
driver: add rtc module and bugfix gpio32 gpio33 feature(rtc_module):add rtc module 1. add rtc io control API (pull,output and input) 2. add touch pad API (touch pad read and interrupt) 3. add adc1 API (the max width is 12 Bits and support attenuation) 4. add hall sensor API (support hall sensor read ) 5. add dac API (the width is 8 Bits) bugfix(gpio):gpio32 and gpio33 can not output and input the gpio32 and gpio33 is initialize by librtc.a,and gpio_config not initialize the gpio as digital gpio.they can not output and input,when users use gpio32 or gpio33.And there are some problems about others driver ,when they use gpio32 or gpio33 as matrix.
2016-12-07 01:18:10 -05:00
if (pGPIOConfig->pull_down_en) {
Minor changes for driver 1. remove "\n" when calling ESP_LOGX APIs. 2. modify uart_event_t for uart rx data. 3. use MICRO for uart inverse value 4. add uart_tx_data_t for internal tx function.
2016-11-07 01:16:52 -05:00
pd_en = 1;
driver: add rtc module and bugfix gpio32 gpio33 feature(rtc_module):add rtc module 1. add rtc io control API (pull,output and input) 2. add touch pad API (touch pad read and interrupt) 3. add adc1 API (the max width is 12 Bits and support attenuation) 4. add hall sensor API (support hall sensor read ) 5. add dac API (the width is 8 Bits) bugfix(gpio):gpio32 and gpio33 can not output and input the gpio32 and gpio33 is initialize by librtc.a,and gpio_config not initialize the gpio as digital gpio.they can not output and input,when users use gpio32 or gpio33.And there are some problems about others driver ,when they use gpio32 or gpio33 as matrix.
2016-12-07 01:18:10 -05:00
gpio_pulldown_en(io_num);
Convert Windows -> Unix line ends in gpio.c
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} else {
driver: add rtc module and bugfix gpio32 gpio33 feature(rtc_module):add rtc module 1. add rtc io control API (pull,output and input) 2. add touch pad API (touch pad read and interrupt) 3. add adc1 API (the max width is 12 Bits and support attenuation) 4. add hall sensor API (support hall sensor read ) 5. add dac API (the width is 8 Bits) bugfix(gpio):gpio32 and gpio33 can not output and input the gpio32 and gpio33 is initialize by librtc.a,and gpio_config not initialize the gpio as digital gpio.they can not output and input,when users use gpio32 or gpio33.And there are some problems about others driver ,when they use gpio32 or gpio33 as matrix.
2016-12-07 01:18:10 -05:00
gpio_pulldown_dis(io_num);
Convert Windows -> Unix line ends in gpio.c
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}
refactor(gpio): add hal gpio driver
2019-07-15 02:44:15 -04:00
driver: remove -Wno-format flag
2022-08-04 01:08:48 -04:00
ESP_LOGI(GPIO_TAG, "GPIO[%"PRIu32"]| InputEn: %d| OutputEn: %d| OpenDrain: %d| Pullup: %d| Pulldown: %d| Intr:%d ", io_num, input_en, output_en, od_en, pu_en, pd_en, pGPIOConfig->intr_type);
Convert Windows -> Unix line ends in gpio.c
2016-10-08 02:12:55 -04:00
gpio_set_intr_type(io_num, pGPIOConfig->intr_type);
refactor(gpio): add hal gpio driver
2019-07-15 02:44:15 -04:00
driver: add rtc module and bugfix gpio32 gpio33 feature(rtc_module):add rtc module 1. add rtc io control API (pull,output and input) 2. add touch pad API (touch pad read and interrupt) 3. add adc1 API (the max width is 12 Bits and support attenuation) 4. add hall sensor API (support hall sensor read ) 5. add dac API (the width is 8 Bits) bugfix(gpio):gpio32 and gpio33 can not output and input the gpio32 and gpio33 is initialize by librtc.a,and gpio_config not initialize the gpio as digital gpio.they can not output and input,when users use gpio32 or gpio33.And there are some problems about others driver ,when they use gpio32 or gpio33 as matrix.
2016-12-07 01:18:10 -05:00
if (pGPIOConfig->intr_type) {
Convert Windows -> Unix line ends in gpio.c
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gpio_intr_enable(io_num);
} else {
gpio_intr_disable(io_num);
}
refactor(gpio): add hal gpio driver
2019-07-15 02:44:15 -04:00
gpio: enable GPIO19 on ESP32C3 boards
2021-02-10 04:22:41 -05:00
/* By default, all the pins have to be configured as GPIO pins. */
gpio: Disable USB JTAG when setting pins 18 and 19 as GPIOs on ESP32C3 When `DIS_USB_JTAG` eFuse is NOT burned (`False`), it is not possible to set pins 18 and 19 as GPIOs. This commit solves this by manually disabling USB JTAG when using pins 18 or 19. The functions shall use `gpio_hal_iomux_func_sel` instead of `PIN_FUNC_SELELECT`.
2021-03-15 22:55:05 -04:00
gpio_hal_iomux_func_sel(io_reg, PIN_FUNC_GPIO);
Convert Windows -> Unix line ends in gpio.c
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}
refactor(gpio): add hal gpio driver
2019-07-15 02:44:15 -04:00
Convert Windows -> Unix line ends in gpio.c
2016-10-08 02:12:55 -04:00
io_num++;
driver: add rtc module and bugfix gpio32 gpio33 feature(rtc_module):add rtc module 1. add rtc io control API (pull,output and input) 2. add touch pad API (touch pad read and interrupt) 3. add adc1 API (the max width is 12 Bits and support attenuation) 4. add hall sensor API (support hall sensor read ) 5. add dac API (the width is 8 Bits) bugfix(gpio):gpio32 and gpio33 can not output and input the gpio32 and gpio33 is initialize by librtc.a,and gpio_config not initialize the gpio as digital gpio.they can not output and input,when users use gpio32 or gpio33.And there are some problems about others driver ,when they use gpio32 or gpio33 as matrix.
2016-12-07 01:18:10 -05:00
} while (io_num < GPIO_PIN_COUNT);
refactor(gpio): add hal gpio driver
2019-07-15 02:44:15 -04:00
Convert Windows -> Unix line ends in gpio.c
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return ESP_OK;
}
fix(spi): reset gpios that used by spi when deinited
2018-06-08 03:33:04 -04:00
esp_err_t gpio_reset_pin(gpio_num_t gpio_num)
{
gpio: fix GPIO_IS_VALID_(OUTPUT_)GPIO macro ... which has the potential of doing bit shift by a negative amount
2022-03-21 09:25:21 -04:00
assert(GPIO_IS_VALID_GPIO(gpio_num));
fix(spi): reset gpios that used by spi when deinited
2018-06-08 03:33:04 -04:00
gpio_config_t cfg = {
gpio: Bitmask overflow fix in gpio_reset_pin For pins 32 and up the BIT(nr) macro used here overflowed, causing undetermined GPIO pins to be reset. Example: freeing SPI device/bus where CS is on pin 33 caused debug UART to cease communication, TXD0 was disabled. Fixed as BIT64(nr) macro, to be used elsewhere as needed. For example in definitions like GPIO_SEL_32..GPIO_SEL_39.
2018-08-08 08:31:17 -04:00
.pin_bit_mask = BIT64(gpio_num),
fix(spi): reset gpios that used by spi when deinited
2018-06-08 03:33:04 -04:00
.mode = GPIO_MODE_DISABLE,
//for powersave reasons, the GPIO should not be floating, select pullup
.pull_up_en = true,
.pull_down_en = false,
.intr_type = GPIO_INTR_DISABLE,
};
gpio_config(&cfg);
return ESP_OK;
}
refactor(gpio): add hal gpio driver
2019-07-15 02:44:15 -04:00
static inline void IRAM_ATTR gpio_isr_loop(uint32_t status, const uint32_t gpio_num_start)
{
gpio/driver: Sped the gpio_intr_service ISR up by 1.5 uSeconds (+-50% faster). Removed as much branching (if statements) from the gpio_intr_service ISR, as possible and split the while loop into two. Also forced writing the two status*_w1tc variables only once, instead of every time after calling the external function hooks. The measurements below, was done using the following tools: Toolchain version: crosstool-ng-1.22.0-80-g6c4433a Compiler version: 5.2.0 Here follows a comparison of the gpio_intr_service ISR's execution time, using a DS1054 oscilloscope. All the time spent calling external functions, via the function pointers gpio_isr_func[gpio_num].fn, were disregarded. With OPTIMIZATION_FLAGS = -Og, 1.34 uSeconds faster: 3.22 uSec (with this patch) 4.56 uSec (with commit 71c90ac4) 100 - (100 * 4.56 / 3.22) = 42% faster With OPTIMIZATION_FLAGS = -Os, 1.65 uSeconds faster: 2.89 uSec (with this patch) 4.54 uSec (with commit 71c90ac4) 100 - (100 * 4.54 / 2.89) = 57% faster Signed-off-by: Konstantin Kondrashov <konstantin@espressif.com> Merges https://github.com/espressif/esp-idf/pull/2861
2018-12-21 09:07:51 -05:00
while (status) {
int nbit = __builtin_ffs(status) - 1;
status &= ~(1 << nbit);
int gpio_num = gpio_num_start + nbit;
refactor(gpio): add hal gpio driver
2019-07-15 02:44:15 -04:00
gpio: Fix interrupt lost issue In previous gpio default isr, interrupt status bits get cleared at the exit of the isr. However, for edge-triggered interrupt type, the interrupt status bit should be cleared before entering the per-pin handlers to avoid any potential interrupt lost. Closes https://github.com/espressif/esp-idf/pull/6853
2022-08-24 05:06:20 -04:00
bool intr_status_bit_cleared = false;
// Edge-triggered type interrupt can clear the interrupt status bit before entering per-pin interrupt handler
if ((1ULL << (gpio_num)) & gpio_context.isr_clr_on_entry_mask) {
intr_status_bit_cleared = true;
gpio_hal_clear_intr_status_bit(gpio_context.gpio_hal, gpio_num);
}
refactor(gpio): add hal gpio driver
2019-07-15 02:44:15 -04:00
if (gpio_context.gpio_isr_func[gpio_num].fn != NULL) {
gpio_context.gpio_isr_func[gpio_num].fn(gpio_context.gpio_isr_func[gpio_num].args);
gpio/driver: Sped the gpio_intr_service ISR up by 1.5 uSeconds (+-50% faster). Removed as much branching (if statements) from the gpio_intr_service ISR, as possible and split the while loop into two. Also forced writing the two status*_w1tc variables only once, instead of every time after calling the external function hooks. The measurements below, was done using the following tools: Toolchain version: crosstool-ng-1.22.0-80-g6c4433a Compiler version: 5.2.0 Here follows a comparison of the gpio_intr_service ISR's execution time, using a DS1054 oscilloscope. All the time spent calling external functions, via the function pointers gpio_isr_func[gpio_num].fn, were disregarded. With OPTIMIZATION_FLAGS = -Og, 1.34 uSeconds faster: 3.22 uSec (with this patch) 4.56 uSec (with commit 71c90ac4) 100 - (100 * 4.56 / 3.22) = 42% faster With OPTIMIZATION_FLAGS = -Os, 1.65 uSeconds faster: 2.89 uSec (with this patch) 4.54 uSec (with commit 71c90ac4) 100 - (100 * 4.54 / 2.89) = 57% faster Signed-off-by: Konstantin Kondrashov <konstantin@espressif.com> Merges https://github.com/espressif/esp-idf/pull/2861
2018-12-21 09:07:51 -05:00
}
gpio: Fix interrupt lost issue In previous gpio default isr, interrupt status bits get cleared at the exit of the isr. However, for edge-triggered interrupt type, the interrupt status bit should be cleared before entering the per-pin handlers to avoid any potential interrupt lost. Closes https://github.com/espressif/esp-idf/pull/6853
2022-08-24 05:06:20 -04:00
// If the interrupt status bit was not cleared at the entry, then must clear it before exiting
if (!intr_status_bit_cleared) {
gpio_hal_clear_intr_status_bit(gpio_context.gpio_hal, gpio_num);
}
gpio/driver: Sped the gpio_intr_service ISR up by 1.5 uSeconds (+-50% faster). Removed as much branching (if statements) from the gpio_intr_service ISR, as possible and split the while loop into two. Also forced writing the two status*_w1tc variables only once, instead of every time after calling the external function hooks. The measurements below, was done using the following tools: Toolchain version: crosstool-ng-1.22.0-80-g6c4433a Compiler version: 5.2.0 Here follows a comparison of the gpio_intr_service ISR's execution time, using a DS1054 oscilloscope. All the time spent calling external functions, via the function pointers gpio_isr_func[gpio_num].fn, were disregarded. With OPTIMIZATION_FLAGS = -Og, 1.34 uSeconds faster: 3.22 uSec (with this patch) 4.56 uSec (with commit 71c90ac4) 100 - (100 * 4.56 / 3.22) = 42% faster With OPTIMIZATION_FLAGS = -Os, 1.65 uSeconds faster: 2.89 uSec (with this patch) 4.54 uSec (with commit 71c90ac4) 100 - (100 * 4.54 / 2.89) = 57% faster Signed-off-by: Konstantin Kondrashov <konstantin@espressif.com> Merges https://github.com/espressif/esp-idf/pull/2861
2018-12-21 09:07:51 -05:00
}
}
refactor(gpio): add hal gpio driver
2019-07-15 02:44:15 -04:00
static void IRAM_ATTR gpio_intr_service(void *arg)
gpio_driver: add per-pin interrupt handlers 1. add ISR handler apis so that users of different layers can hook their own isr handler on different GPIO. Audio project has different software layers, they need different gpio isr handler for layer instead of processing all GPIO interrupts in one handler. If this kind of calling a handler from isr is not proper, please kindly point out. 2. add gpio example code. 3. improve gpio.rst 4. add readme for gpio example Squashed commits: [278e50f] update: GPIO 1. coding style, add a space between conditional or loop keyword and an opening paren. 2. modify some return value and doc 3. use printf in example code Squashed commits: [efb23bb] minor change of comment
2016-12-24 07:45:57 -05:00
{
//GPIO intr process
refactor(gpio): add hal gpio driver
2019-07-15 02:44:15 -04:00
if (gpio_context.gpio_isr_func == NULL) {
gpio_driver: add per-pin interrupt handlers 1. add ISR handler apis so that users of different layers can hook their own isr handler on different GPIO. Audio project has different software layers, they need different gpio isr handler for layer instead of processing all GPIO interrupts in one handler. If this kind of calling a handler from isr is not proper, please kindly point out. 2. add gpio example code. 3. improve gpio.rst 4. add readme for gpio example Squashed commits: [278e50f] update: GPIO 1. coding style, add a space between conditional or loop keyword and an opening paren. 2. modify some return value and doc 3. use printf in example code Squashed commits: [efb23bb] minor change of comment
2016-12-24 07:45:57 -05:00
return;
}
refactor(gpio): add hal gpio driver
2019-07-15 02:44:15 -04:00
gpio/driver: Sped the gpio_intr_service ISR up by 1.5 uSeconds (+-50% faster). Removed as much branching (if statements) from the gpio_intr_service ISR, as possible and split the while loop into two. Also forced writing the two status*_w1tc variables only once, instead of every time after calling the external function hooks. The measurements below, was done using the following tools: Toolchain version: crosstool-ng-1.22.0-80-g6c4433a Compiler version: 5.2.0 Here follows a comparison of the gpio_intr_service ISR's execution time, using a DS1054 oscilloscope. All the time spent calling external functions, via the function pointers gpio_isr_func[gpio_num].fn, were disregarded. With OPTIMIZATION_FLAGS = -Og, 1.34 uSeconds faster: 3.22 uSec (with this patch) 4.56 uSec (with commit 71c90ac4) 100 - (100 * 4.56 / 3.22) = 42% faster With OPTIMIZATION_FLAGS = -Os, 1.65 uSeconds faster: 2.89 uSec (with this patch) 4.54 uSec (with commit 71c90ac4) 100 - (100 * 4.54 / 2.89) = 57% faster Signed-off-by: Konstantin Kondrashov <konstantin@espressif.com> Merges https://github.com/espressif/esp-idf/pull/2861
2018-12-21 09:07:51 -05:00
//read status to get interrupt status for GPIO0-31
Merge branch 'master' into feature/esp32s2beta_update
2019-08-08 00:00:45 -04:00
uint32_t gpio_intr_status;
refactor(gpio): add hal gpio driver
2019-07-15 02:44:15 -04:00
gpio_hal_get_intr_status(gpio_context.gpio_hal, gpio_context.isr_core_id, &gpio_intr_status);
gpio/driver: Sped the gpio_intr_service ISR up by 1.5 uSeconds (+-50% faster). Removed as much branching (if statements) from the gpio_intr_service ISR, as possible and split the while loop into two. Also forced writing the two status*_w1tc variables only once, instead of every time after calling the external function hooks. The measurements below, was done using the following tools: Toolchain version: crosstool-ng-1.22.0-80-g6c4433a Compiler version: 5.2.0 Here follows a comparison of the gpio_intr_service ISR's execution time, using a DS1054 oscilloscope. All the time spent calling external functions, via the function pointers gpio_isr_func[gpio_num].fn, were disregarded. With OPTIMIZATION_FLAGS = -Og, 1.34 uSeconds faster: 3.22 uSec (with this patch) 4.56 uSec (with commit 71c90ac4) 100 - (100 * 4.56 / 3.22) = 42% faster With OPTIMIZATION_FLAGS = -Os, 1.65 uSeconds faster: 2.89 uSec (with this patch) 4.54 uSec (with commit 71c90ac4) 100 - (100 * 4.54 / 2.89) = 57% faster Signed-off-by: Konstantin Kondrashov <konstantin@espressif.com> Merges https://github.com/espressif/esp-idf/pull/2861
2018-12-21 09:07:51 -05:00
if (gpio_intr_status) {
gpio_isr_loop(gpio_intr_status, 0);
}
//read status1 to get interrupt status for GPIO32-39
Merge branch 'master' into feature/esp32s2beta_update
2019-08-08 00:00:45 -04:00
uint32_t gpio_intr_status_h;
refactor(gpio): add hal gpio driver
2019-07-15 02:44:15 -04:00
gpio_hal_get_intr_status_high(gpio_context.gpio_hal, gpio_context.isr_core_id, &gpio_intr_status_h);
gpio/driver: Sped the gpio_intr_service ISR up by 1.5 uSeconds (+-50% faster). Removed as much branching (if statements) from the gpio_intr_service ISR, as possible and split the while loop into two. Also forced writing the two status*_w1tc variables only once, instead of every time after calling the external function hooks. The measurements below, was done using the following tools: Toolchain version: crosstool-ng-1.22.0-80-g6c4433a Compiler version: 5.2.0 Here follows a comparison of the gpio_intr_service ISR's execution time, using a DS1054 oscilloscope. All the time spent calling external functions, via the function pointers gpio_isr_func[gpio_num].fn, were disregarded. With OPTIMIZATION_FLAGS = -Og, 1.34 uSeconds faster: 3.22 uSec (with this patch) 4.56 uSec (with commit 71c90ac4) 100 - (100 * 4.56 / 3.22) = 42% faster With OPTIMIZATION_FLAGS = -Os, 1.65 uSeconds faster: 2.89 uSec (with this patch) 4.54 uSec (with commit 71c90ac4) 100 - (100 * 4.54 / 2.89) = 57% faster Signed-off-by: Konstantin Kondrashov <konstantin@espressif.com> Merges https://github.com/espressif/esp-idf/pull/2861
2018-12-21 09:07:51 -05:00
if (gpio_intr_status_h) {
gpio_isr_loop(gpio_intr_status_h, 32);
}
gpio_driver: add per-pin interrupt handlers 1. add ISR handler apis so that users of different layers can hook their own isr handler on different GPIO. Audio project has different software layers, they need different gpio isr handler for layer instead of processing all GPIO interrupts in one handler. If this kind of calling a handler from isr is not proper, please kindly point out. 2. add gpio example code. 3. improve gpio.rst 4. add readme for gpio example Squashed commits: [278e50f] update: GPIO 1. coding style, add a space between conditional or loop keyword and an opening paren. 2. modify some return value and doc 3. use printf in example code Squashed commits: [efb23bb] minor change of comment
2016-12-24 07:45:57 -05:00
}
refactor(gpio): add hal gpio driver
2019-07-15 02:44:15 -04:00
esp_err_t gpio_install_isr_service(int intr_alloc_flags)
gpio_driver: add per-pin interrupt handlers 1. add ISR handler apis so that users of different layers can hook their own isr handler on different GPIO. Audio project has different software layers, they need different gpio isr handler for layer instead of processing all GPIO interrupts in one handler. If this kind of calling a handler from isr is not proper, please kindly point out. 2. add gpio example code. 3. improve gpio.rst 4. add readme for gpio example Squashed commits: [278e50f] update: GPIO 1. coding style, add a space between conditional or loop keyword and an opening paren. 2. modify some return value and doc 3. use printf in example code Squashed commits: [efb23bb] minor change of comment
2016-12-24 07:45:57 -05:00
{
refactor(gpio): add hal gpio driver
2019-07-15 02:44:15 -04:00
GPIO_CHECK(gpio_context.gpio_isr_func == NULL, "GPIO isr service already installed", ESP_ERR_INVALID_STATE);
[gpio] calloc in critical section Remove calloc out of critical section. In critical section, assign allocated memory to gpio_isr_func. Free resources if gpio_isr_register() fails.
2022-08-03 08:31:32 -04:00
esp_err_t ret = ESP_ERR_NO_MEM;
gpio_isr_func_t *isr_func = (gpio_isr_func_t *) calloc(GPIO_NUM_MAX, sizeof(gpio_isr_func_t));
if (isr_func) {
portENTER_CRITICAL(&gpio_context.gpio_spinlock);
gpio: fix potential race condition inside gpio_install_isr_service
2022-08-04 05:38:54 -04:00
if (gpio_context.gpio_isr_func == NULL) {
gpio_context.gpio_isr_func = isr_func;
portEXIT_CRITICAL(&gpio_context.gpio_spinlock);
ret = gpio_isr_register(gpio_intr_service, NULL, intr_alloc_flags, &gpio_context.gpio_isr_handle);
if (ret != ESP_OK) {
// registering failed, uninstall isr service
gpio_uninstall_isr_service();
}
} else {
// isr service already installed, free allocated resource
portEXIT_CRITICAL(&gpio_context.gpio_spinlock);
ret = ESP_ERR_INVALID_STATE;
free(isr_func);
[gpio] calloc in critical section Remove calloc out of critical section. In critical section, assign allocated memory to gpio_isr_func. Free resources if gpio_isr_register() fails.
2022-08-03 08:31:32 -04:00
}
gpio_driver: add per-pin interrupt handlers 1. add ISR handler apis so that users of different layers can hook their own isr handler on different GPIO. Audio project has different software layers, they need different gpio isr handler for layer instead of processing all GPIO interrupts in one handler. If this kind of calling a handler from isr is not proper, please kindly point out. 2. add gpio example code. 3. improve gpio.rst 4. add readme for gpio example Squashed commits: [278e50f] update: GPIO 1. coding style, add a space between conditional or loop keyword and an opening paren. 2. modify some return value and doc 3. use printf in example code Squashed commits: [efb23bb] minor change of comment
2016-12-24 07:45:57 -05:00
}
refactor(gpio): add hal gpio driver
2019-07-15 02:44:15 -04:00
return ret;
gpio_driver: add per-pin interrupt handlers 1. add ISR handler apis so that users of different layers can hook their own isr handler on different GPIO. Audio project has different software layers, they need different gpio isr handler for layer instead of processing all GPIO interrupts in one handler. If this kind of calling a handler from isr is not proper, please kindly point out. 2. add gpio example code. 3. improve gpio.rst 4. add readme for gpio example Squashed commits: [278e50f] update: GPIO 1. coding style, add a space between conditional or loop keyword and an opening paren. 2. modify some return value and doc 3. use printf in example code Squashed commits: [efb23bb] minor change of comment
2016-12-24 07:45:57 -05:00
}
refactor(gpio): add hal gpio driver
2019-07-15 02:44:15 -04:00
esp_err_t gpio_isr_handler_add(gpio_num_t gpio_num, gpio_isr_t isr_handler, void *args)
gpio_driver: add per-pin interrupt handlers 1. add ISR handler apis so that users of different layers can hook their own isr handler on different GPIO. Audio project has different software layers, they need different gpio isr handler for layer instead of processing all GPIO interrupts in one handler. If this kind of calling a handler from isr is not proper, please kindly point out. 2. add gpio example code. 3. improve gpio.rst 4. add readme for gpio example Squashed commits: [278e50f] update: GPIO 1. coding style, add a space between conditional or loop keyword and an opening paren. 2. modify some return value and doc 3. use printf in example code Squashed commits: [efb23bb] minor change of comment
2016-12-24 07:45:57 -05:00
{
refactor(gpio): add hal gpio driver
2019-07-15 02:44:15 -04:00
GPIO_CHECK(gpio_context.gpio_isr_func != NULL, "GPIO isr service is not installed, call gpio_install_isr_service() first", ESP_ERR_INVALID_STATE);
gpio_driver: add per-pin interrupt handlers 1. add ISR handler apis so that users of different layers can hook their own isr handler on different GPIO. Audio project has different software layers, they need different gpio isr handler for layer instead of processing all GPIO interrupts in one handler. If this kind of calling a handler from isr is not proper, please kindly point out. 2. add gpio example code. 3. improve gpio.rst 4. add readme for gpio example Squashed commits: [278e50f] update: GPIO 1. coding style, add a space between conditional or loop keyword and an opening paren. 2. modify some return value and doc 3. use printf in example code Squashed commits: [efb23bb] minor change of comment
2016-12-24 07:45:57 -05:00
GPIO_CHECK(GPIO_IS_VALID_GPIO(gpio_num), "GPIO number error", ESP_ERR_INVALID_ARG);
refactor(gpio): add hal gpio driver
2019-07-15 02:44:15 -04:00
portENTER_CRITICAL(&gpio_context.gpio_spinlock);
gpio_driver: add per-pin interrupt handlers 1. add ISR handler apis so that users of different layers can hook their own isr handler on different GPIO. Audio project has different software layers, they need different gpio isr handler for layer instead of processing all GPIO interrupts in one handler. If this kind of calling a handler from isr is not proper, please kindly point out. 2. add gpio example code. 3. improve gpio.rst 4. add readme for gpio example Squashed commits: [278e50f] update: GPIO 1. coding style, add a space between conditional or loop keyword and an opening paren. 2. modify some return value and doc 3. use printf in example code Squashed commits: [efb23bb] minor change of comment
2016-12-24 07:45:57 -05:00
gpio_intr_disable(gpio_num);
refactor(gpio): add hal gpio driver
2019-07-15 02:44:15 -04:00
if (gpio_context.gpio_isr_func) {
gpio_context.gpio_isr_func[gpio_num].fn = isr_handler;
gpio_context.gpio_isr_func[gpio_num].args = args;
gpio_driver: add per-pin interrupt handlers 1. add ISR handler apis so that users of different layers can hook their own isr handler on different GPIO. Audio project has different software layers, they need different gpio isr handler for layer instead of processing all GPIO interrupts in one handler. If this kind of calling a handler from isr is not proper, please kindly point out. 2. add gpio example code. 3. improve gpio.rst 4. add readme for gpio example Squashed commits: [278e50f] update: GPIO 1. coding style, add a space between conditional or loop keyword and an opening paren. 2. modify some return value and doc 3. use printf in example code Squashed commits: [efb23bb] minor change of comment
2016-12-24 07:45:57 -05:00
}
refactor(gpio): add hal gpio driver
2019-07-15 02:44:15 -04:00
gpio_intr_enable_on_core (gpio_num, esp_intr_get_cpu(gpio_context.gpio_isr_handle));
portEXIT_CRITICAL(&gpio_context.gpio_spinlock);
gpio_driver: add per-pin interrupt handlers 1. add ISR handler apis so that users of different layers can hook their own isr handler on different GPIO. Audio project has different software layers, they need different gpio isr handler for layer instead of processing all GPIO interrupts in one handler. If this kind of calling a handler from isr is not proper, please kindly point out. 2. add gpio example code. 3. improve gpio.rst 4. add readme for gpio example Squashed commits: [278e50f] update: GPIO 1. coding style, add a space between conditional or loop keyword and an opening paren. 2. modify some return value and doc 3. use printf in example code Squashed commits: [efb23bb] minor change of comment
2016-12-24 07:45:57 -05:00
return ESP_OK;
}
refactor(gpio): add hal gpio driver
2019-07-15 02:44:15 -04:00
esp_err_t gpio_isr_handler_remove(gpio_num_t gpio_num)
gpio_driver: add per-pin interrupt handlers 1. add ISR handler apis so that users of different layers can hook their own isr handler on different GPIO. Audio project has different software layers, they need different gpio isr handler for layer instead of processing all GPIO interrupts in one handler. If this kind of calling a handler from isr is not proper, please kindly point out. 2. add gpio example code. 3. improve gpio.rst 4. add readme for gpio example Squashed commits: [278e50f] update: GPIO 1. coding style, add a space between conditional or loop keyword and an opening paren. 2. modify some return value and doc 3. use printf in example code Squashed commits: [efb23bb] minor change of comment
2016-12-24 07:45:57 -05:00
{
refactor(gpio): add hal gpio driver
2019-07-15 02:44:15 -04:00
GPIO_CHECK(gpio_context.gpio_isr_func != NULL, "GPIO isr service is not installed, call gpio_install_isr_service() first", ESP_ERR_INVALID_STATE);
GPIO_CHECK(GPIO_IS_VALID_GPIO(gpio_num), "GPIO number error", ESP_ERR_INVALID_ARG);
portENTER_CRITICAL(&gpio_context.gpio_spinlock);
gpio_intr_disable(gpio_num);
if (gpio_context.gpio_isr_func) {
gpio_context.gpio_isr_func[gpio_num].fn = NULL;
gpio_context.gpio_isr_func[gpio_num].args = NULL;
gpio_driver: add per-pin interrupt handlers 1. add ISR handler apis so that users of different layers can hook their own isr handler on different GPIO. Audio project has different software layers, they need different gpio isr handler for layer instead of processing all GPIO interrupts in one handler. If this kind of calling a handler from isr is not proper, please kindly point out. 2. add gpio example code. 3. improve gpio.rst 4. add readme for gpio example Squashed commits: [278e50f] update: GPIO 1. coding style, add a space between conditional or loop keyword and an opening paren. 2. modify some return value and doc 3. use printf in example code Squashed commits: [efb23bb] minor change of comment
2016-12-24 07:45:57 -05:00
}
refactor(gpio): add hal gpio driver
2019-07-15 02:44:15 -04:00
portEXIT_CRITICAL(&gpio_context.gpio_spinlock);
return ESP_OK;
gpio_driver: add per-pin interrupt handlers 1. add ISR handler apis so that users of different layers can hook their own isr handler on different GPIO. Audio project has different software layers, they need different gpio isr handler for layer instead of processing all GPIO interrupts in one handler. If this kind of calling a handler from isr is not proper, please kindly point out. 2. add gpio example code. 3. improve gpio.rst 4. add readme for gpio example Squashed commits: [278e50f] update: GPIO 1. coding style, add a space between conditional or loop keyword and an opening paren. 2. modify some return value and doc 3. use printf in example code Squashed commits: [efb23bb] minor change of comment
2016-12-24 07:45:57 -05:00
}
tools: Mass fixing of empty prototypes (for -Wstrict-prototypes)
2019-07-16 05:33:30 -04:00
void gpio_uninstall_isr_service(void)
gpio_driver: add per-pin interrupt handlers 1. add ISR handler apis so that users of different layers can hook their own isr handler on different GPIO. Audio project has different software layers, they need different gpio isr handler for layer instead of processing all GPIO interrupts in one handler. If this kind of calling a handler from isr is not proper, please kindly point out. 2. add gpio example code. 3. improve gpio.rst 4. add readme for gpio example Squashed commits: [278e50f] update: GPIO 1. coding style, add a space between conditional or loop keyword and an opening paren. 2. modify some return value and doc 3. use printf in example code Squashed commits: [efb23bb] minor change of comment
2016-12-24 07:45:57 -05:00
{
gpio: Bugfix - Move esp_intr_free() out of the critical section in gpio_uninstall_isr_service() Closes https://github.com/espressif/esp-idf/issues/5571 Fix the bug that if the API was called from one core to free the interrupt source on the other core, it would trigger interrupt watchdog.
2021-11-16 23:07:00 -05:00
gpio_isr_func_t *gpio_isr_func_free = NULL;
gpio_isr_handle_t gpio_isr_handle_free = NULL;
portENTER_CRITICAL(&gpio_context.gpio_spinlock);
refactor(gpio): add hal gpio driver
2019-07-15 02:44:15 -04:00
if (gpio_context.gpio_isr_func == NULL) {
gpio: Bugfix - Move esp_intr_free() out of the critical section in gpio_uninstall_isr_service() Closes https://github.com/espressif/esp-idf/issues/5571 Fix the bug that if the API was called from one core to free the interrupt source on the other core, it would trigger interrupt watchdog.
2021-11-16 23:07:00 -05:00
portEXIT_CRITICAL(&gpio_context.gpio_spinlock);
gpio_driver: add per-pin interrupt handlers 1. add ISR handler apis so that users of different layers can hook their own isr handler on different GPIO. Audio project has different software layers, they need different gpio isr handler for layer instead of processing all GPIO interrupts in one handler. If this kind of calling a handler from isr is not proper, please kindly point out. 2. add gpio example code. 3. improve gpio.rst 4. add readme for gpio example Squashed commits: [278e50f] update: GPIO 1. coding style, add a space between conditional or loop keyword and an opening paren. 2. modify some return value and doc 3. use printf in example code Squashed commits: [efb23bb] minor change of comment
2016-12-24 07:45:57 -05:00
return;
}
gpio: Bugfix - Move esp_intr_free() out of the critical section in gpio_uninstall_isr_service() Closes https://github.com/espressif/esp-idf/issues/5571 Fix the bug that if the API was called from one core to free the interrupt source on the other core, it would trigger interrupt watchdog.
2021-11-16 23:07:00 -05:00
gpio_isr_func_free = gpio_context.gpio_isr_func;
refactor(gpio): add hal gpio driver
2019-07-15 02:44:15 -04:00
gpio_context.gpio_isr_func = NULL;
gpio: Bugfix - Move esp_intr_free() out of the critical section in gpio_uninstall_isr_service() Closes https://github.com/espressif/esp-idf/issues/5571 Fix the bug that if the API was called from one core to free the interrupt source on the other core, it would trigger interrupt watchdog.
2021-11-16 23:07:00 -05:00
gpio_isr_handle_free = gpio_context.gpio_isr_handle;
gpio_context.gpio_isr_handle = NULL;
refactor(gpio): add hal gpio driver
2019-07-15 02:44:15 -04:00
gpio_context.isr_core_id = GPIO_ISR_CORE_ID_UNINIT;
portEXIT_CRITICAL(&gpio_context.gpio_spinlock);
gpio: Bugfix - Move esp_intr_free() out of the critical section in gpio_uninstall_isr_service() Closes https://github.com/espressif/esp-idf/issues/5571 Fix the bug that if the API was called from one core to free the interrupt source on the other core, it would trigger interrupt watchdog.
2021-11-16 23:07:00 -05:00
esp_intr_free(gpio_isr_handle_free);
free(gpio_isr_func_free);
gpio_driver: add per-pin interrupt handlers 1. add ISR handler apis so that users of different layers can hook their own isr handler on different GPIO. Audio project has different software layers, they need different gpio isr handler for layer instead of processing all GPIO interrupts in one handler. If this kind of calling a handler from isr is not proper, please kindly point out. 2. add gpio example code. 3. improve gpio.rst 4. add readme for gpio example Squashed commits: [278e50f] update: GPIO 1. coding style, add a space between conditional or loop keyword and an opening paren. 2. modify some return value and doc 3. use printf in example code Squashed commits: [efb23bb] minor change of comment
2016-12-24 07:45:57 -05:00
return;
}
refactor(gpio): add hal gpio driver
2019-07-15 02:44:15 -04:00
bugfix(GPIO): Fixed the bug that GPIO enables interrupts on one core, but registers interrupt service routines on another core closes https://github.com/espressif/esp-idf/issues/2808 closes https://github.com/espressif/esp-idf/issues/2845
2019-07-17 23:34:49 -04:00
static void gpio_isr_register_on_core_static(void *param)
{
gpio_isr_alloc_t *p = (gpio_isr_alloc_t *)param;
//We need to check the return value.
p->ret = esp_intr_alloc(p->source, p->intr_alloc_flags, p->fn, p->arg, p->handle);
}
refactor(gpio): add hal gpio driver
2019-07-15 02:44:15 -04:00
esp_err_t gpio_isr_register(void (*fn)(void *), void *arg, int intr_alloc_flags, gpio_isr_handle_t *handle)
Convert Windows -> Unix line ends in gpio.c
2016-10-08 02:12:55 -04:00
{
Minor changes for driver 1. remove "\n" when calling ESP_LOGX APIs. 2. modify uart_event_t for uart rx data. 3. use MICRO for uart inverse value 4. add uart_tx_data_t for internal tx function.
2016-11-07 01:16:52 -05:00
GPIO_CHECK(fn, "GPIO ISR null", ESP_ERR_INVALID_ARG);
bugfix(GPIO): Fixed the bug that GPIO enables interrupts on one core, but registers interrupt service routines on another core closes https://github.com/espressif/esp-idf/issues/2808 closes https://github.com/espressif/esp-idf/issues/2845
2019-07-17 23:34:49 -04:00
gpio_isr_alloc_t p;
p.source = ETS_GPIO_INTR_SOURCE;
p.intr_alloc_flags = intr_alloc_flags;
p.fn = fn;
p.arg = arg;
p.handle = handle;
refactor(gpio): add hal gpio driver
2019-07-15 02:44:15 -04:00
portENTER_CRITICAL(&gpio_context.gpio_spinlock);
if(gpio_context.isr_core_id == GPIO_ISR_CORE_ID_UNINIT) {
gpio_context.isr_core_id = xPortGetCoreID();
bugfix(GPIO): Fixed the bug that GPIO enables interrupts on one core, but registers interrupt service routines on another core closes https://github.com/espressif/esp-idf/issues/2808 closes https://github.com/espressif/esp-idf/issues/2845
2019-07-17 23:34:49 -04:00
}
refactor(gpio): add hal gpio driver
2019-07-15 02:44:15 -04:00
portEXIT_CRITICAL(&gpio_context.gpio_spinlock);
ipc: prevent code getting pulled in for unicore configuration
2019-08-15 03:05:59 -04:00
esp_err_t ret;
#if CONFIG_FREERTOS_UNICORE
gpio_isr_register_on_core_static(&p);
ret = ESP_OK;
#else /* CONFIG_FREERTOS_UNICORE */
refactor(gpio): add hal gpio driver
2019-07-15 02:44:15 -04:00
ret = esp_ipc_call_blocking(gpio_context.isr_core_id, gpio_isr_register_on_core_static, (void *)&p);
ipc: prevent code getting pulled in for unicore configuration
2019-08-15 03:05:59 -04:00
#endif /* !CONFIG_FREERTOS_UNICORE */
gpio: Bugfix - Move esp_intr_free() out of the critical section in gpio_uninstall_isr_service() Closes https://github.com/espressif/esp-idf/issues/5571 Fix the bug that if the API was called from one core to free the interrupt source on the other core, it would trigger interrupt watchdog.
2021-11-16 23:07:00 -05:00
if (ret != ESP_OK) {
ESP_LOGE(GPIO_TAG, "esp_ipc_call_blocking failed (0x%x)", ret);
return ESP_ERR_NOT_FOUND;
}
if (p.ret != ESP_OK) {
ESP_LOGE(GPIO_TAG, "esp_intr_alloc failed (0x%x)", p.ret);
bugfix(GPIO): Fixed the bug that GPIO enables interrupts on one core, but registers interrupt service routines on another core closes https://github.com/espressif/esp-idf/issues/2808 closes https://github.com/espressif/esp-idf/issues/2845
2019-07-17 23:34:49 -04:00
return ESP_ERR_NOT_FOUND;
}
return ESP_OK;
Convert Windows -> Unix line ends in gpio.c
2016-10-08 02:12:55 -04:00
}
esp_err_t gpio_wakeup_enable(gpio_num_t gpio_num, gpio_int_type_t intr_type)
{
Minor changes for driver 1. remove "\n" when calling ESP_LOGX APIs. 2. modify uart_event_t for uart rx data. 3. use MICRO for uart inverse value 4. add uart_tx_data_t for internal tx function.
2016-11-07 01:16:52 -05:00
GPIO_CHECK(GPIO_IS_VALID_GPIO(gpio_num), "GPIO number error", ESP_ERR_INVALID_ARG);
Convert Windows -> Unix line ends in gpio.c
2016-10-08 02:12:55 -04:00
esp_err_t ret = ESP_OK;
refactor(gpio): add hal gpio driver
2019-07-15 02:44:15 -04:00
if ((intr_type == GPIO_INTR_LOW_LEVEL) || (intr_type == GPIO_INTR_HIGH_LEVEL)) {
esp_system: support gpio wakeup from deep sleep on esp32c3
2021-02-05 04:10:44 -05:00
#if SOC_RTCIO_WAKE_SUPPORTED
refactor(gpio): add hal gpio driver
2019-07-15 02:44:15 -04:00
if (rtc_gpio_is_valid_gpio(gpio_num)) {
driver/gpio: support wakeup function for RTC IOs
2018-08-13 18:57:32 -04:00
ret = rtc_gpio_wakeup_enable(gpio_num, intr_type);
}
esp_system: support gpio wakeup from deep sleep on esp32c3
2021-02-05 04:10:44 -05:00
#endif
driver(gpio): fix gpio can't wakeup light sleep
2020-04-27 08:30:23 -04:00
portENTER_CRITICAL(&gpio_context.gpio_spinlock);
esp32h2: support GPIO peripheral, IO_MUX, GPIO matrix. Generic GPIO example is supported as well.
2021-12-30 07:31:38 -05:00
gpio_hal_set_intr_type(gpio_context.gpio_hal, gpio_num, intr_type);
gpio_hal_wakeup_enable(gpio_context.gpio_hal, gpio_num);
gpio: update gpio sleep workaround config name
2022-02-08 20:27:27 -05:00
#if SOC_GPIO_SUPPORT_SLP_SWITCH && CONFIG_ESP_SLEEP_GPIO_RESET_WORKAROUND
light sleep: add software workaround for esp32c3 gpio reset issue
2021-03-11 06:25:54 -05:00
gpio_hal_sleep_sel_dis(gpio_context.gpio_hal, gpio_num);
#endif
driver(gpio): fix gpio can't wakeup light sleep
2020-04-27 08:30:23 -04:00
portEXIT_CRITICAL(&gpio_context.gpio_spinlock);
Convert Windows -> Unix line ends in gpio.c
2016-10-08 02:12:55 -04:00
} else {
driver/gpio: support wakeup function for RTC IOs
2018-08-13 18:57:32 -04:00
ESP_LOGE(GPIO_TAG, "GPIO wakeup only supports level mode, but edge mode set. gpio_num:%u", gpio_num);
Convert Windows -> Unix line ends in gpio.c
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ret = ESP_ERR_INVALID_ARG;
}
refactor(gpio): add hal gpio driver
2019-07-15 02:44:15 -04:00
Convert Windows -> Unix line ends in gpio.c
2016-10-08 02:12:55 -04:00
return ret;
}
esp_err_t gpio_wakeup_disable(gpio_num_t gpio_num)
{
Minor changes for driver 1. remove "\n" when calling ESP_LOGX APIs. 2. modify uart_event_t for uart rx data. 3. use MICRO for uart inverse value 4. add uart_tx_data_t for internal tx function.
2016-11-07 01:16:52 -05:00
GPIO_CHECK(GPIO_IS_VALID_GPIO(gpio_num), "GPIO number error", ESP_ERR_INVALID_ARG);
refactor(gpio): add hal gpio driver
2019-07-15 02:44:15 -04:00
esp_err_t ret = ESP_OK;
esp_system: support gpio wakeup from deep sleep on esp32c3
2021-02-05 04:10:44 -05:00
#if SOC_RTCIO_WAKE_SUPPORTED
refactor(gpio): add hal gpio driver
2019-07-15 02:44:15 -04:00
if (rtc_gpio_is_valid_gpio(gpio_num)) {
ret = rtc_gpio_wakeup_disable(gpio_num);
}
esp_system: support gpio wakeup from deep sleep on esp32c3
2021-02-05 04:10:44 -05:00
#endif
driver(gpio): fix gpio can't wakeup light sleep
2020-04-27 08:30:23 -04:00
portENTER_CRITICAL(&gpio_context.gpio_spinlock);
gpio_hal_wakeup_disable(gpio_context.gpio_hal, gpio_num);
gpio: update gpio sleep workaround config name
2022-02-08 20:27:27 -05:00
#if SOC_GPIO_SUPPORT_SLP_SWITCH && CONFIG_ESP_SLEEP_GPIO_RESET_WORKAROUND
deep sleep: fix sleep gpio wakeup fail issue
2021-04-08 23:35:32 -04:00
gpio_hal_sleep_sel_en(gpio_context.gpio_hal, gpio_num);
#endif
driver(gpio): fix gpio can't wakeup light sleep
2020-04-27 08:30:23 -04:00
portEXIT_CRITICAL(&gpio_context.gpio_spinlock);
refactor(gpio): add hal gpio driver
2019-07-15 02:44:15 -04:00
return ret;
Convert Windows -> Unix line ends in gpio.c
2016-10-08 02:12:55 -04:00
}
feature(gpio): add APIs to set and get pad drive capability. RTC pads use RTC registers to contol drive capability.
2017-07-17 03:38:19 -04:00
esp_err_t gpio_set_drive_capability(gpio_num_t gpio_num, gpio_drive_cap_t strength)
{
GPIO_CHECK(GPIO_IS_VALID_OUTPUT_GPIO(gpio_num), "GPIO number error", ESP_ERR_INVALID_ARG);
GPIO_CHECK(strength < GPIO_DRIVE_CAP_MAX, "GPIO drive capability error", ESP_ERR_INVALID_ARG);
refactor(gpio): add hal gpio driver
2019-07-15 02:44:15 -04:00
esp_err_t ret = ESP_OK;
soc: combine xxx_caps.h into one soc_caps.h During HAL layer refactoring and new chip bringup, we have several caps.h for each part, to reduce the conflicts to minimum. But this is The capabilities headers will be relataive stable once completely written (maybe after the featues are supported by drivers). Now ESP32 and ESP32-S2 drivers are relative stable, making it a good time to combine all these caps.h into one soc_caps.h This cleanup also move HAL config and pin config into separated files, to make the responsibilities of these headers more clear. This is helpful for the stabilities of soc_caps.h because we want to make it public some day.
2020-09-09 22:37:58 -04:00
if (!rtc_gpio_is_valid_gpio(gpio_num) || SOC_GPIO_SUPPORT_RTC_INDEPENDENT) {
refactor(gpio): add hal gpio driver
2019-07-15 02:44:15 -04:00
portENTER_CRITICAL(&gpio_context.gpio_spinlock);
gpio_hal_set_drive_capability(gpio_context.gpio_hal, gpio_num, strength);
portEXIT_CRITICAL(&gpio_context.gpio_spinlock);
bugfix(gpio):fix esp32 s2 rtc io issue * Modify the function implementation of ESP32-S2 RTC GPIO On ESP32 those PADs which have RTC functions must set pullup/down/capability via RTC register. On ESP32-S2, Digital IOs have their own registers to control pullup/down/capability, independent with RTC registers. * Add ESP32-S2 support of unit test * Modify the pull-up test of unit test * Modify the interrupt test of unit test * Modify input and output mode test of unit test
2019-11-26 07:00:24 -05:00
} else {
esp32c3: Apply one-liner/small changes for ESP32-C3
2020-11-26 03:56:13 -05:00
#if SOC_RTCIO_INPUT_OUTPUT_SUPPORTED
bugfix(gpio):fix esp32 s2 rtc io issue * Modify the function implementation of ESP32-S2 RTC GPIO On ESP32 those PADs which have RTC functions must set pullup/down/capability via RTC register. On ESP32-S2, Digital IOs have their own registers to control pullup/down/capability, independent with RTC registers. * Add ESP32-S2 support of unit test * Modify the pull-up test of unit test * Modify the interrupt test of unit test * Modify input and output mode test of unit test
2019-11-26 07:00:24 -05:00
ret = rtc_gpio_set_drive_capability(gpio_num, strength);
esp32c3: Apply one-liner/small changes for ESP32-C3
2020-11-26 03:56:13 -05:00
#else
abort(); // This should be eliminated as unreachable, unless a programming error has occured
#endif
feature(gpio): add APIs to set and get pad drive capability. RTC pads use RTC registers to contol drive capability.
2017-07-17 03:38:19 -04:00
}
bugfix(gpio):fix esp32 s2 rtc io issue * Modify the function implementation of ESP32-S2 RTC GPIO On ESP32 those PADs which have RTC functions must set pullup/down/capability via RTC register. On ESP32-S2, Digital IOs have their own registers to control pullup/down/capability, independent with RTC registers. * Add ESP32-S2 support of unit test * Modify the pull-up test of unit test * Modify the interrupt test of unit test * Modify input and output mode test of unit test
2019-11-26 07:00:24 -05:00
refactor(gpio): add hal gpio driver
2019-07-15 02:44:15 -04:00
return ret;
feature(gpio): add APIs to set and get pad drive capability. RTC pads use RTC registers to contol drive capability.
2017-07-17 03:38:19 -04:00
}
refactor(gpio): add hal gpio driver
2019-07-15 02:44:15 -04:00
esp_err_t gpio_get_drive_capability(gpio_num_t gpio_num, gpio_drive_cap_t *strength)
feature(gpio): add APIs to set and get pad drive capability. RTC pads use RTC registers to contol drive capability.
2017-07-17 03:38:19 -04:00
{
GPIO_CHECK(GPIO_IS_VALID_OUTPUT_GPIO(gpio_num), "GPIO number error", ESP_ERR_INVALID_ARG);
GPIO_CHECK(strength != NULL, "GPIO drive capability pointer error", ESP_ERR_INVALID_ARG);
refactor(gpio): add hal gpio driver
2019-07-15 02:44:15 -04:00
esp_err_t ret = ESP_OK;
soc: combine xxx_caps.h into one soc_caps.h During HAL layer refactoring and new chip bringup, we have several caps.h for each part, to reduce the conflicts to minimum. But this is The capabilities headers will be relataive stable once completely written (maybe after the featues are supported by drivers). Now ESP32 and ESP32-S2 drivers are relative stable, making it a good time to combine all these caps.h into one soc_caps.h This cleanup also move HAL config and pin config into separated files, to make the responsibilities of these headers more clear. This is helpful for the stabilities of soc_caps.h because we want to make it public some day.
2020-09-09 22:37:58 -04:00
if (!rtc_gpio_is_valid_gpio(gpio_num) || SOC_GPIO_SUPPORT_RTC_INDEPENDENT) {
refactor(gpio): add hal gpio driver
2019-07-15 02:44:15 -04:00
portENTER_CRITICAL(&gpio_context.gpio_spinlock);
gpio_hal_get_drive_capability(gpio_context.gpio_hal, gpio_num, strength);
portEXIT_CRITICAL(&gpio_context.gpio_spinlock);
bugfix(gpio):fix esp32 s2 rtc io issue * Modify the function implementation of ESP32-S2 RTC GPIO On ESP32 those PADs which have RTC functions must set pullup/down/capability via RTC register. On ESP32-S2, Digital IOs have their own registers to control pullup/down/capability, independent with RTC registers. * Add ESP32-S2 support of unit test * Modify the pull-up test of unit test * Modify the interrupt test of unit test * Modify input and output mode test of unit test
2019-11-26 07:00:24 -05:00
} else {
esp32c3: Apply one-liner/small changes for ESP32-C3
2020-11-26 03:56:13 -05:00
#if SOC_RTCIO_INPUT_OUTPUT_SUPPORTED
bugfix(gpio):fix esp32 s2 rtc io issue * Modify the function implementation of ESP32-S2 RTC GPIO On ESP32 those PADs which have RTC functions must set pullup/down/capability via RTC register. On ESP32-S2, Digital IOs have their own registers to control pullup/down/capability, independent with RTC registers. * Add ESP32-S2 support of unit test * Modify the pull-up test of unit test * Modify the interrupt test of unit test * Modify input and output mode test of unit test
2019-11-26 07:00:24 -05:00
ret = rtc_gpio_get_drive_capability(gpio_num, strength);
esp32c3: Apply one-liner/small changes for ESP32-C3
2020-11-26 03:56:13 -05:00
#else
abort(); // This should be eliminated as unreachable, unless a programming error has occured
#endif
feature(gpio): add APIs to set and get pad drive capability. RTC pads use RTC registers to contol drive capability.
2017-07-17 03:38:19 -04:00
}
bugfix(gpio):fix esp32 s2 rtc io issue * Modify the function implementation of ESP32-S2 RTC GPIO On ESP32 those PADs which have RTC functions must set pullup/down/capability via RTC register. On ESP32-S2, Digital IOs have their own registers to control pullup/down/capability, independent with RTC registers. * Add ESP32-S2 support of unit test * Modify the pull-up test of unit test * Modify the interrupt test of unit test * Modify input and output mode test of unit test
2019-11-26 07:00:24 -05:00
refactor(gpio): add hal gpio driver
2019-07-15 02:44:15 -04:00
return ret;
feature(gpio): add APIs to set and get pad drive capability. RTC pads use RTC registers to contol drive capability.
2017-07-17 03:38:19 -04:00
}
driver(gpio): Add api support digital pad hold function.
2018-04-03 10:09:30 -04:00
esp_err_t gpio_hold_en(gpio_num_t gpio_num)
{
GPIO_CHECK(GPIO_IS_VALID_OUTPUT_GPIO(gpio_num), "Only output-capable GPIO support this function", ESP_ERR_NOT_SUPPORTED);
refactor(gpio): add hal gpio driver
2019-07-15 02:44:15 -04:00
int ret = ESP_OK;
if (rtc_gpio_is_valid_gpio(gpio_num)) {
esp_system: support gpio wakeup from deep sleep on esp32c3
2021-02-05 04:10:44 -05:00
#if SOC_RTCIO_HOLD_SUPPORTED
refactor(gpio): add hal gpio driver
2019-07-15 02:44:15 -04:00
ret = rtc_gpio_hold_en(gpio_num);
esp_system: support gpio wakeup from deep sleep on esp32c3
2021-02-05 04:10:44 -05:00
#endif
Driver: gpio and rtcio dirver update
2019-06-13 03:37:58 -04:00
} else if (GPIO_HOLD_MASK[gpio_num]) {
refactor(gpio): add hal gpio driver
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portENTER_CRITICAL(&gpio_context.gpio_spinlock);
gpio_hal_hold_en(gpio_context.gpio_hal, gpio_num);
portEXIT_CRITICAL(&gpio_context.gpio_spinlock);
driver(gpio): Add api support digital pad hold function.
2018-04-03 10:09:30 -04:00
} else {
refactor(gpio): add hal gpio driver
2019-07-15 02:44:15 -04:00
ret = ESP_ERR_NOT_SUPPORTED;
driver(gpio): Add api support digital pad hold function.
2018-04-03 10:09:30 -04:00
}
refactor(gpio): add hal gpio driver
2019-07-15 02:44:15 -04:00
return ret;
driver(gpio): Add api support digital pad hold function.
2018-04-03 10:09:30 -04:00
}
esp_err_t gpio_hold_dis(gpio_num_t gpio_num)
{
GPIO_CHECK(GPIO_IS_VALID_OUTPUT_GPIO(gpio_num), "Only output-capable GPIO support this function", ESP_ERR_NOT_SUPPORTED);
refactor(gpio): add hal gpio driver
2019-07-15 02:44:15 -04:00
int ret = ESP_OK;
if (rtc_gpio_is_valid_gpio(gpio_num)) {
esp_system: support gpio wakeup from deep sleep on esp32c3
2021-02-05 04:10:44 -05:00
#if SOC_RTCIO_HOLD_SUPPORTED
refactor(gpio): add hal gpio driver
2019-07-15 02:44:15 -04:00
ret = rtc_gpio_hold_dis(gpio_num);
esp_system: support gpio wakeup from deep sleep on esp32c3
2021-02-05 04:10:44 -05:00
#endif
Driver: gpio and rtcio dirver update
2019-06-13 03:37:58 -04:00
}else if (GPIO_HOLD_MASK[gpio_num]) {
refactor(gpio): add hal gpio driver
2019-07-15 02:44:15 -04:00
portENTER_CRITICAL(&gpio_context.gpio_spinlock);
gpio_hal_hold_dis(gpio_context.gpio_hal, gpio_num);
portEXIT_CRITICAL(&gpio_context.gpio_spinlock);
Driver: gpio and rtcio dirver update
2019-06-13 03:37:58 -04:00
} else {
refactor(gpio): add hal gpio driver
2019-07-15 02:44:15 -04:00
ret = ESP_ERR_NOT_SUPPORTED;
Driver: gpio and rtcio dirver update
2019-06-13 03:37:58 -04:00
}
refactor(gpio): add hal gpio driver
2019-07-15 02:44:15 -04:00
return ret;
feat(gpio): add function allowing switching input source from GPIO back to IOMUX
2018-04-23 13:23:12 -04:00
}
driver(gpio): fixed digital gpio unable hold bug during deep-sleep.
2018-12-07 08:44:43 -05:00
void gpio_deep_sleep_hold_en(void)
{
refactor(gpio): add hal gpio driver
2019-07-15 02:44:15 -04:00
portENTER_CRITICAL(&gpio_context.gpio_spinlock);
gpio_hal_deep_sleep_hold_en(gpio_context.gpio_hal);
portEXIT_CRITICAL(&gpio_context.gpio_spinlock);
driver(gpio): fixed digital gpio unable hold bug during deep-sleep.
2018-12-07 08:44:43 -05:00
}
void gpio_deep_sleep_hold_dis(void)
{
refactor(gpio): add hal gpio driver
2019-07-15 02:44:15 -04:00
portENTER_CRITICAL(&gpio_context.gpio_spinlock);
gpio_hal_deep_sleep_hold_dis(gpio_context.gpio_hal);
portEXIT_CRITICAL(&gpio_context.gpio_spinlock);
driver(gpio): fixed digital gpio unable hold bug during deep-sleep.
2018-12-07 08:44:43 -05:00
}
soc: combine xxx_caps.h into one soc_caps.h During HAL layer refactoring and new chip bringup, we have several caps.h for each part, to reduce the conflicts to minimum. But this is The capabilities headers will be relataive stable once completely written (maybe after the featues are supported by drivers). Now ESP32 and ESP32-S2 drivers are relative stable, making it a good time to combine all these caps.h into one soc_caps.h This cleanup also move HAL config and pin config into separated files, to make the responsibilities of these headers more clear. This is helpful for the stabilities of soc_caps.h because we want to make it public some day.
2020-09-09 22:37:58 -04:00
#if SOC_GPIO_SUPPORT_FORCE_HOLD
Driver: gpio and rtcio dirver update
2019-06-13 03:37:58 -04:00
esp_err_t gpio_force_hold_all()
{
esp_system: support gpio wakeup from deep sleep on esp32c3
2021-02-05 04:10:44 -05:00
#if SOC_RTCIO_HOLD_SUPPORTED
Driver: gpio and rtcio dirver update
2019-06-13 03:37:58 -04:00
rtc_gpio_force_hold_all();
esp_system: support gpio wakeup from deep sleep on esp32c3
2021-02-05 04:10:44 -05:00
#endif
refactor(gpio): add hal gpio driver
2019-07-15 02:44:15 -04:00
portENTER_CRITICAL(&gpio_context.gpio_spinlock);
esp32h2: support GPIO peripheral, IO_MUX, GPIO matrix. Generic GPIO example is supported as well.
2021-12-30 07:31:38 -05:00
gpio_hal_force_hold_all();
refactor(gpio): add hal gpio driver
2019-07-15 02:44:15 -04:00
portEXIT_CRITICAL(&gpio_context.gpio_spinlock);
Driver: gpio and rtcio dirver update
2019-06-13 03:37:58 -04:00
return ESP_OK;
}
esp_err_t gpio_force_unhold_all()
{
esp_system: support gpio wakeup from deep sleep on esp32c3
2021-02-05 04:10:44 -05:00
#if SOC_RTCIO_HOLD_SUPPORTED
Driver: gpio and rtcio dirver update
2019-06-13 03:37:58 -04:00
rtc_gpio_force_hold_dis_all();
esp_system: support gpio wakeup from deep sleep on esp32c3
2021-02-05 04:10:44 -05:00
#endif
refactor(gpio): add hal gpio driver
2019-07-15 02:44:15 -04:00
portENTER_CRITICAL(&gpio_context.gpio_spinlock);
esp_system: support gpio wakeup from deep sleep on esp32c3
2021-02-05 04:10:44 -05:00
gpio_hal_force_unhold_all();
refactor(gpio): add hal gpio driver
2019-07-15 02:44:15 -04:00
portEXIT_CRITICAL(&gpio_context.gpio_spinlock);
Driver: gpio and rtcio dirver update
2019-06-13 03:37:58 -04:00
return ESP_OK;
}
#endif
feat(gpio): add function allowing switching input source from GPIO back to IOMUX
2018-04-23 13:23:12 -04:00
void gpio_iomux_in(uint32_t gpio, uint32_t signal_idx)
{
refactor(gpio): add hal gpio driver
2019-07-15 02:44:15 -04:00
gpio_hal_iomux_in(gpio_context.gpio_hal, gpio, signal_idx);
feat(gpio): add function allowing switching input source from GPIO back to IOMUX
2018-04-23 13:23:12 -04:00
}
void gpio_iomux_out(uint8_t gpio_num, int func, bool oen_inv)
{
refactor(gpio): add hal gpio driver
2019-07-15 02:44:15 -04:00
gpio_hal_iomux_out(gpio_context.gpio_hal, gpio_num, func, (uint32_t)oen_inv);
feat(gpio): add function allowing switching input source from GPIO back to IOMUX
2018-04-23 13:23:12 -04:00
}
components/pm: Add slp gpio configure workaround
2020-11-12 07:39:55 -05:00
#if SOC_GPIO_SUPPORT_SLP_SWITCH
static esp_err_t gpio_sleep_pullup_en(gpio_num_t gpio_num)
{
GPIO_CHECK(GPIO_IS_VALID_GPIO(gpio_num), "GPIO number error", ESP_ERR_INVALID_ARG);
portENTER_CRITICAL(&gpio_context.gpio_spinlock);
gpio_hal_sleep_pullup_en(gpio_context.gpio_hal, gpio_num);
portEXIT_CRITICAL(&gpio_context.gpio_spinlock);
return ESP_OK;
}
static esp_err_t gpio_sleep_pullup_dis(gpio_num_t gpio_num)
{
GPIO_CHECK(GPIO_IS_VALID_GPIO(gpio_num), "GPIO number error", ESP_ERR_INVALID_ARG);
portENTER_CRITICAL(&gpio_context.gpio_spinlock);
gpio_hal_sleep_pullup_dis(gpio_context.gpio_hal, gpio_num);
portEXIT_CRITICAL(&gpio_context.gpio_spinlock);
return ESP_OK;
}
static esp_err_t gpio_sleep_pulldown_en(gpio_num_t gpio_num)
{
GPIO_CHECK(GPIO_IS_VALID_GPIO(gpio_num), "GPIO number error", ESP_ERR_INVALID_ARG);
portENTER_CRITICAL(&gpio_context.gpio_spinlock);
gpio_hal_sleep_pulldown_en(gpio_context.gpio_hal, gpio_num);
portEXIT_CRITICAL(&gpio_context.gpio_spinlock);
return ESP_OK;
}
static esp_err_t gpio_sleep_pulldown_dis(gpio_num_t gpio_num)
{
GPIO_CHECK(GPIO_IS_VALID_GPIO(gpio_num), "GPIO number error", ESP_ERR_INVALID_ARG);
portENTER_CRITICAL(&gpio_context.gpio_spinlock);
gpio_hal_sleep_pulldown_dis(gpio_context.gpio_hal, gpio_num);
portEXIT_CRITICAL(&gpio_context.gpio_spinlock);
return ESP_OK;
}
static esp_err_t gpio_sleep_input_disable(gpio_num_t gpio_num)
{
GPIO_CHECK(GPIO_IS_VALID_GPIO(gpio_num), "GPIO number error", ESP_ERR_INVALID_ARG);
gpio_hal_sleep_input_disable(gpio_context.gpio_hal, gpio_num);
return ESP_OK;
}
static esp_err_t gpio_sleep_input_enable(gpio_num_t gpio_num)
{
GPIO_CHECK(GPIO_IS_VALID_GPIO(gpio_num), "GPIO number error", ESP_ERR_INVALID_ARG);
gpio_hal_sleep_input_enable(gpio_context.gpio_hal, gpio_num);
return ESP_OK;
}
static esp_err_t gpio_sleep_output_disable(gpio_num_t gpio_num)
{
GPIO_CHECK(GPIO_IS_VALID_GPIO(gpio_num), "GPIO number error", ESP_ERR_INVALID_ARG);
gpio_hal_sleep_output_disable(gpio_context.gpio_hal, gpio_num);
return ESP_OK;
}
static esp_err_t gpio_sleep_output_enable(gpio_num_t gpio_num)
{
GPIO_CHECK(GPIO_IS_VALID_OUTPUT_GPIO(gpio_num), "GPIO output gpio_num error", ESP_ERR_INVALID_ARG);
gpio_hal_sleep_output_enable(gpio_context.gpio_hal, gpio_num);
return ESP_OK;
}
esp_err_t gpio_sleep_set_direction(gpio_num_t gpio_num, gpio_mode_t mode)
{
GPIO_CHECK(GPIO_IS_VALID_GPIO(gpio_num), "GPIO number error", ESP_ERR_INVALID_ARG);
if ((GPIO_IS_VALID_OUTPUT_GPIO(gpio_num) != true) && (mode & GPIO_MODE_DEF_OUTPUT)) {
ESP_LOGE(GPIO_TAG, "io_num=%d can only be input", gpio_num);
return ESP_ERR_INVALID_ARG;
}
esp_err_t ret = ESP_OK;
if (mode & GPIO_MODE_DEF_INPUT) {
gpio_sleep_input_enable(gpio_num);
} else {
gpio_sleep_input_disable(gpio_num);
}
if (mode & GPIO_MODE_DEF_OUTPUT) {
gpio_sleep_output_enable(gpio_num);
} else {
gpio_sleep_output_disable(gpio_num);
}
return ret;
}
esp_err_t gpio_sleep_set_pull_mode(gpio_num_t gpio_num, gpio_pull_mode_t pull)
{
GPIO_CHECK(GPIO_IS_VALID_GPIO(gpio_num), "GPIO number error", ESP_ERR_INVALID_ARG);
GPIO_CHECK(pull <= GPIO_FLOATING, "GPIO pull mode error", ESP_ERR_INVALID_ARG);
esp_err_t ret = ESP_OK;
switch (pull) {
case GPIO_PULLUP_ONLY:
gpio_sleep_pulldown_dis(gpio_num);
gpio_sleep_pullup_en(gpio_num);
break;
case GPIO_PULLDOWN_ONLY:
gpio_sleep_pulldown_en(gpio_num);
gpio_sleep_pullup_dis(gpio_num);
break;
case GPIO_PULLUP_PULLDOWN:
gpio_sleep_pulldown_en(gpio_num);
gpio_sleep_pullup_en(gpio_num);
break;
case GPIO_FLOATING:
gpio_sleep_pulldown_dis(gpio_num);
gpio_sleep_pullup_dis(gpio_num);
break;
default:
ESP_LOGE(GPIO_TAG, "Unknown pull up/down mode,gpio_num=%u,pull=%u", gpio_num, pull);
ret = ESP_ERR_INVALID_ARG;
break;
}
return ret;
}
esp_err_t gpio_sleep_sel_en(gpio_num_t gpio_num)
{
GPIO_CHECK(GPIO_IS_VALID_GPIO(gpio_num), "GPIO number error", ESP_ERR_INVALID_ARG);
portENTER_CRITICAL(&gpio_context.gpio_spinlock);
gpio_hal_sleep_sel_en(gpio_context.gpio_hal, gpio_num);
portEXIT_CRITICAL(&gpio_context.gpio_spinlock);
return ESP_OK;
}
esp_err_t gpio_sleep_sel_dis(gpio_num_t gpio_num)
{
GPIO_CHECK(GPIO_IS_VALID_GPIO(gpio_num), "GPIO number error", ESP_ERR_INVALID_ARG);
portENTER_CRITICAL(&gpio_context.gpio_spinlock);
gpio_hal_sleep_sel_dis(gpio_context.gpio_hal, gpio_num);
portEXIT_CRITICAL(&gpio_context.gpio_spinlock);
return ESP_OK;
}
#if CONFIG_GPIO_ESP32_SUPPORT_SWITCH_SLP_PULL
esp_err_t gpio_sleep_pupd_config_apply(gpio_num_t gpio_num)
{
GPIO_CHECK(GPIO_IS_VALID_GPIO(gpio_num), "GPIO number error", ESP_ERR_INVALID_ARG);
gpio_hal_sleep_pupd_config_apply(gpio_context.gpio_hal, gpio_num);
return ESP_OK;
}
esp_err_t gpio_sleep_pupd_config_unapply(gpio_num_t gpio_num)
{
GPIO_CHECK(GPIO_IS_VALID_GPIO(gpio_num), "GPIO number error", ESP_ERR_INVALID_ARG);
gpio_hal_sleep_pupd_config_unapply(gpio_context.gpio_hal, gpio_num);
return ESP_OK;
}
esp_system: support gpio wakeup from deep sleep on esp32c3
2021-02-05 04:10:44 -05:00
#endif // CONFIG_GPIO_ESP32_SUPPORT_SWITCH_SLP_PULL
#endif // SOC_GPIO_SUPPORT_SLP_SWITCH
#if SOC_GPIO_SUPPORT_DEEPSLEEP_WAKEUP
esp_err_t gpio_deep_sleep_wakeup_enable(gpio_num_t gpio_num, gpio_int_type_t intr_type)
{
if (!gpio_hal_is_valid_deepsleep_wakeup_gpio(gpio_num)) {
ESP_LOGE(GPIO_TAG, "GPIO %d does not support deep sleep wakeup", gpio_num);
return ESP_ERR_INVALID_ARG;
}
if ((intr_type != GPIO_INTR_LOW_LEVEL) && (intr_type != GPIO_INTR_HIGH_LEVEL)) {
ESP_LOGE(GPIO_TAG, "GPIO wakeup only supports level mode, but edge mode set. gpio_num:%u", gpio_num);
return ESP_ERR_INVALID_ARG;
}
portENTER_CRITICAL(&gpio_context.gpio_spinlock);
gpio_hal_deepsleep_wakeup_enable(gpio_context.gpio_hal, gpio_num, intr_type);
gpio: update gpio sleep workaround config name
2022-02-08 20:27:27 -05:00
#if SOC_GPIO_SUPPORT_SLP_SWITCH && CONFIG_ESP_SLEEP_GPIO_RESET_WORKAROUND
deep sleep: fix sleep gpio wakeup fail issue
2021-04-08 23:35:32 -04:00
gpio_hal_sleep_sel_dis(gpio_context.gpio_hal, gpio_num);
#endif
esp_system: support gpio wakeup from deep sleep on esp32c3
2021-02-05 04:10:44 -05:00
portEXIT_CRITICAL(&gpio_context.gpio_spinlock);
return ESP_OK;
}
esp_err_t gpio_deep_sleep_wakeup_disable(gpio_num_t gpio_num)
{
if (!gpio_hal_is_valid_deepsleep_wakeup_gpio(gpio_num)) {
ESP_LOGE(GPIO_TAG, "GPIO %d does not support deep sleep wakeup", gpio_num);
return ESP_ERR_INVALID_ARG;
}
portENTER_CRITICAL(&gpio_context.gpio_spinlock);
gpio_hal_deepsleep_wakeup_disable(gpio_context.gpio_hal, gpio_num);
gpio: update gpio sleep workaround config name
2022-02-08 20:27:27 -05:00
#if SOC_GPIO_SUPPORT_SLP_SWITCH && CONFIG_ESP_SLEEP_GPIO_RESET_WORKAROUND
deep sleep: fix sleep gpio wakeup fail issue
2021-04-08 23:35:32 -04:00
gpio_hal_sleep_sel_en(gpio_context.gpio_hal, gpio_num);
#endif
esp_system: support gpio wakeup from deep sleep on esp32c3
2021-02-05 04:10:44 -05:00
portEXIT_CRITICAL(&gpio_context.gpio_spinlock);
return ESP_OK;
}
#endif // SOC_GPIO_SUPPORT_DEEPSLEEP_WAKEUP
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