2021-10-13 05:10:57 -04:00
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/*
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2022-01-19 21:25:43 -05:00
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* SPDX-FileCopyrightText: 2015-2022 Espressif Systems (Shanghai) CO LTD
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2021-10-13 05:10:57 -04:00
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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2016-10-18 09:49:00 -04:00
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#include <stddef.h>
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#include <stdlib.h>
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#include <stdio.h>
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2017-04-05 09:19:15 -04:00
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#include <string.h>
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2016-10-18 09:49:00 -04:00
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2018-03-29 23:39:42 -04:00
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#include "sdkconfig.h"
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#include "esp_heap_caps.h"
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2017-09-12 10:36:17 -04:00
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#include "esp_heap_caps_init.h"
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2016-10-18 09:49:00 -04:00
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#include "freertos/FreeRTOS.h"
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#include "freertos/task.h"
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#include "freertos/queue.h"
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#include "freertos/semphr.h"
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#include "freertos/xtensa_api.h"
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#include "freertos/portmacro.h"
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2017-10-20 05:09:03 -04:00
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#include "xtensa/core-macros.h"
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2016-10-18 09:49:00 -04:00
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#include "esp_types.h"
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2022-01-12 01:53:47 -05:00
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#include "esp_mac.h"
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#include "esp_random.h"
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2016-10-18 09:49:00 -04:00
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#include "esp_task.h"
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#include "esp_attr.h"
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2017-02-16 09:06:02 -05:00
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#include "esp_phy_init.h"
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2017-12-07 08:48:27 -05:00
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#include "esp_bt.h"
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2017-09-12 10:36:17 -04:00
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#include "esp_err.h"
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#include "esp_log.h"
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2017-10-09 03:34:31 -04:00
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#include "esp_pm.h"
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2020-07-09 08:58:13 -04:00
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#include "esp_ipc.h"
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2021-10-25 05:13:46 -04:00
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#include "esp_private/periph_ctrl.h"
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2021-11-18 22:42:01 -05:00
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#include "esp_private/esp_clk.h"
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2018-04-08 07:19:47 -04:00
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#include "soc/rtc.h"
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2020-07-09 08:58:13 -04:00
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#include "soc/rtc_cntl_reg.h"
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2018-06-15 09:40:51 -04:00
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#include "soc/soc_memory_layout.h"
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2019-02-20 08:01:27 -05:00
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#include "esp_coexist_internal.h"
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2021-03-19 02:59:30 -04:00
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#include "esp_timer.h"
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#include "esp_sleep.h"
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2022-01-17 04:44:25 -05:00
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#include "esp_rom_sys.h"
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2020-07-21 01:07:34 -04:00
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2016-10-18 09:49:00 -04:00
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#if CONFIG_BT_ENABLED
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2018-06-15 09:40:51 -04:00
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/* Macro definition
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************************************************************************
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*/
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2021-03-19 02:59:30 -04:00
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#define BT_LOG_TAG "BT_INIT"
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2017-09-12 10:36:17 -04:00
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2017-06-13 05:14:50 -04:00
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#define BTDM_INIT_PERIOD (5000) /* ms */
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2018-06-15 09:40:51 -04:00
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/* Low Power Clock Selection */
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2018-04-08 07:19:47 -04:00
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#define BTDM_LPCLK_SEL_XTAL (0)
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#define BTDM_LPCLK_SEL_XTAL32K (1)
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#define BTDM_LPCLK_SEL_RTC_SLOW (2)
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#define BTDM_LPCLK_SEL_8M (3)
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2021-03-19 02:59:30 -04:00
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// wakeup request sources
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enum {
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BTDM_ASYNC_WAKEUP_SRC_VHCI = 0,
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BTDM_ASYNC_WAKEUP_SRC_DISA,
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BTDM_ASYNC_WAKEUP_SRC_TMR,
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BTDM_ASYNC_WAKEUP_SRC_MAX,
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};
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// low power control struct
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typedef union {
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struct {
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uint32_t enable : 1; // whether low power mode is required
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uint32_t lpclk_sel : 2; // low power clock source
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uint32_t mac_bb_pd : 1; // whether hardware(MAC, BB) force-power-down is required during sleep
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uint32_t wakeup_timer_required : 1; // whether system timer is needed
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uint32_t no_light_sleep : 1; // do not allow system to enter light sleep after bluetooth is enabled
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uint32_t reserved : 26; // reserved
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};
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uint32_t val;
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} btdm_lpcntl_t;
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// low power control status
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typedef union {
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struct {
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uint32_t pm_lock_released : 1; // whether power management lock is released
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uint32_t mac_bb_pd : 1; // whether hardware(MAC, BB) is powered down
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uint32_t phy_enabled : 1; // whether phy is switched on
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uint32_t wakeup_timer_started : 1; // whether wakeup timer is started
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uint32_t reserved : 28; // reserved
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};
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uint32_t val;
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} btdm_lpstat_t;
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2018-12-11 03:49:01 -05:00
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/* Sleep and wakeup interval control */
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2020-07-09 08:58:13 -04:00
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#define BTDM_MIN_SLEEP_DURATION (24) // threshold of interval in half slots to allow to fall into modem sleep
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#define BTDM_MODEM_WAKE_UP_DELAY (8) // delay in half slots of modem wake up procedure, including re-enable PHY/RF
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2016-10-18 09:49:00 -04:00
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#define BT_DEBUG(...)
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#define BT_API_CALL_CHECK(info, api_call, ret) \
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do{\
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esp_err_t __err = (api_call);\
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if ((ret) != __err) {\
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2017-11-06 05:22:45 -05:00
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BT_DEBUG("%s %d %s ret=0x%X\n", __FUNCTION__, __LINE__, (info), __err);\
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2016-10-18 09:49:00 -04:00
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return __err;\
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}\
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} while(0)
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2017-07-11 09:46:17 -04:00
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#define OSI_FUNCS_TIME_BLOCKING 0xffffffff
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2021-03-19 02:59:30 -04:00
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#define OSI_VERSION 0x00010006
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2018-06-15 09:40:51 -04:00
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#define OSI_MAGIC_VALUE 0xFADEBEAD
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/* Types definition
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************************************************************************
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*/
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2021-03-19 02:59:30 -04:00
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/* vendor dependent signals to be posted to controller task */
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typedef enum {
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BTDM_VND_OL_SIG_WAKEUP_TMR = 0,
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BTDM_VND_OL_SIG_NUM,
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} btdm_vnd_ol_sig_t;
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/* prototype of function to handle vendor dependent signals */
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typedef void (* btdm_vnd_ol_task_func_t)(void *param);
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2017-07-11 09:46:17 -04:00
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2018-06-15 09:40:51 -04:00
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/* VHCI function interface */
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typedef struct vhci_host_callback {
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void (*notify_host_send_available)(void); /*!< callback used to notify that the host can send packet to controller */
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int (*notify_host_recv)(uint8_t *data, uint16_t len); /*!< callback used to notify that the controller has a packet to send to the host*/
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} vhci_host_callback_t;
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/* Dram region */
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2017-09-19 08:10:35 -04:00
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typedef struct {
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esp_bt_mode_t mode;
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intptr_t start;
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intptr_t end;
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} btdm_dram_available_region_t;
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2021-03-19 02:59:30 -04:00
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typedef void (* osi_intr_handler)(void);
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2018-03-29 23:39:42 -04:00
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2018-06-15 09:40:51 -04:00
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/* OSI function */
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2016-10-18 09:49:00 -04:00
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struct osi_funcs_t {
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2020-07-09 08:58:13 -04:00
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uint32_t _magic;
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2018-06-15 09:40:51 -04:00
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uint32_t _version;
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2021-03-19 02:59:30 -04:00
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void (*_interrupt_set)(int32_t cpu_no, int32_t intr_source, int32_t interrupt_no, int32_t interrpt_prio);
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void (*_interrupt_clear)(int32_t interrupt_source, int32_t interrupt_no);
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void (*_interrupt_handler_set)(int32_t interrupt_no, void *fn, void *arg);
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2016-10-18 09:49:00 -04:00
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void (*_interrupt_disable)(void);
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void (*_interrupt_restore)(void);
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void (*_task_yield)(void);
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2017-06-07 02:58:17 -04:00
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void (*_task_yield_from_isr)(void);
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2016-10-18 09:49:00 -04:00
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void *(*_semphr_create)(uint32_t max, uint32_t init);
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2017-07-11 09:46:17 -04:00
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void (*_semphr_delete)(void *semphr);
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int32_t (*_semphr_take_from_isr)(void *semphr, void *hptw);
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2016-10-18 09:49:00 -04:00
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int32_t (*_semphr_give_from_isr)(void *semphr, void *hptw);
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int32_t (*_semphr_take)(void *semphr, uint32_t block_time_ms);
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2017-07-11 09:46:17 -04:00
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int32_t (*_semphr_give)(void *semphr);
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2016-10-18 09:49:00 -04:00
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void *(*_mutex_create)(void);
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2017-07-11 09:46:17 -04:00
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void (*_mutex_delete)(void *mutex);
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2016-10-18 09:49:00 -04:00
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int32_t (*_mutex_lock)(void *mutex);
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int32_t (*_mutex_unlock)(void *mutex);
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2017-07-11 09:46:17 -04:00
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void *(* _queue_create)(uint32_t queue_len, uint32_t item_size);
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void (* _queue_delete)(void *queue);
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int32_t (* _queue_send)(void *queue, void *item, uint32_t block_time_ms);
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int32_t (* _queue_send_from_isr)(void *queue, void *item, void *hptw);
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int32_t (* _queue_recv)(void *queue, void *item, uint32_t block_time_ms);
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int32_t (* _queue_recv_from_isr)(void *queue, void *item, void *hptw);
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int32_t (* _task_create)(void *task_func, const char *name, uint32_t stack_depth, void *param, uint32_t prio, void *task_handle, uint32_t core_id);
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void (* _task_delete)(void *task_handle);
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2017-07-25 07:58:39 -04:00
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bool (* _is_in_isr)(void);
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2017-10-20 05:09:03 -04:00
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int (* _cause_sw_intr_to_core)(int core_id, int intr_no);
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2021-03-19 02:59:30 -04:00
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void *(* _malloc)(size_t size);
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void *(* _malloc_internal)(size_t size);
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2017-07-11 09:46:17 -04:00
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void (* _free)(void *p);
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2017-03-01 08:04:12 -05:00
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int32_t (* _read_efuse_mac)(uint8_t mac[6]);
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2017-03-24 02:57:07 -04:00
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void (* _srand)(unsigned int seed);
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int (* _rand)(void);
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2020-07-09 08:58:13 -04:00
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uint32_t (* _btdm_lpcycles_2_hus)(uint32_t cycles, uint32_t *error_corr);
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uint32_t (* _btdm_hus_2_lpcycles)(uint32_t hus);
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bool (* _btdm_sleep_check_duration)(int32_t *slot_cnt);
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2018-12-11 03:49:01 -05:00
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void (* _btdm_sleep_enter_phase1)(uint32_t lpcycles); /* called when interrupt is disabled */
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void (* _btdm_sleep_enter_phase2)(void);
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void (* _btdm_sleep_exit_phase1)(void); /* called from ISR */
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void (* _btdm_sleep_exit_phase2)(void); /* called from ISR */
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void (* _btdm_sleep_exit_phase3)(void); /* called from task */
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2021-01-25 04:12:36 -05:00
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void (* _coex_wifi_sleep_set)(bool sleep);
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int (* _coex_core_ble_conn_dyn_prio_get)(bool *low, bool *high);
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void (* _coex_schm_status_bit_set)(uint32_t type, uint32_t status);
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void (* _coex_schm_status_bit_clear)(uint32_t type, uint32_t status);
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2021-03-19 02:59:30 -04:00
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void (* _interrupt_on)(int intr_num);
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void (* _interrupt_off)(int intr_num);
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void (* _esp_hw_power_down)(void);
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void (* _esp_hw_power_up)(void);
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void (* _ets_backup_dma_copy)(uint32_t reg, uint32_t mem_addr, uint32_t num, bool to_rem);
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2018-06-15 09:40:51 -04:00
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};
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/* External functions or values
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************************************************************************
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*/
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/* not for user call, so don't put to include file */
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/* OSI */
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extern int btdm_osi_funcs_register(void *osi_funcs);
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/* Initialise and De-initialise */
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2020-07-09 08:58:13 -04:00
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extern int btdm_controller_init(esp_bt_controller_config_t *config_opts);
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2018-06-15 09:40:51 -04:00
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extern void btdm_controller_deinit(void);
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extern int btdm_controller_enable(esp_bt_mode_t mode);
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extern void btdm_controller_disable(void);
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extern uint8_t btdm_controller_get_mode(void);
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extern const char *btdm_controller_get_compile_version(void);
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2018-12-11 03:49:01 -05:00
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extern void btdm_rf_bb_init_phase2(void); // shall be called after PHY/RF is enabled
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2018-06-15 09:40:51 -04:00
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/* Sleep */
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extern void btdm_controller_enable_sleep(bool enable);
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extern uint8_t btdm_controller_get_sleep_mode(void);
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extern bool btdm_power_state_active(void);
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2021-03-19 02:59:30 -04:00
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extern void btdm_wakeup_request(void);
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extern void btdm_in_wakeup_requesting_set(bool in_wakeup_requesting);
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/* vendor dependent tasks to be posted and handled by controller task*/
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extern int btdm_vnd_offload_task_register(btdm_vnd_ol_sig_t sig, btdm_vnd_ol_task_func_t func);
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extern int btdm_vnd_offload_task_deregister(btdm_vnd_ol_sig_t sig);
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extern int btdm_vnd_offload_post_from_isr(btdm_vnd_ol_sig_t sig, void *param, bool need_yield);
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extern int btdm_vnd_offload_post(btdm_vnd_ol_sig_t sig, void *param);
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2018-06-15 09:40:51 -04:00
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/* Low Power Clock */
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extern bool btdm_lpclk_select_src(uint32_t sel);
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extern bool btdm_lpclk_set_div(uint32_t div);
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2020-07-09 08:58:13 -04:00
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extern int btdm_hci_tl_io_event_post(int event);
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2018-06-15 09:40:51 -04:00
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/* VHCI */
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extern bool API_vhci_host_check_send_available(void);
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extern void API_vhci_host_send_packet(uint8_t *data, uint16_t len);
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extern int API_vhci_host_register_callback(const vhci_host_callback_t *callback);
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/* TX power */
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extern int ble_txpwr_set(int power_type, int power_level);
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extern int ble_txpwr_get(int power_type);
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2020-07-09 08:58:13 -04:00
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extern uint16_t l2c_ble_link_get_tx_buf_num(void);
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2021-03-19 02:59:30 -04:00
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extern int coex_core_ble_conn_dyn_prio_get(bool *low, bool *high);
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extern bool btdm_deep_sleep_mem_init(void);
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extern void btdm_deep_sleep_mem_deinit(void);
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extern void btdm_ble_power_down_dma_copy(bool copy);
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extern uint8_t btdm_sleep_clock_sync(void);
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#if CONFIG_MAC_BB_PD
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extern void esp_mac_bb_power_down(void);
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extern void esp_mac_bb_power_up(void);
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extern void ets_backup_dma_copy(uint32_t reg, uint32_t mem_addr, uint32_t num, bool to_mem);
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#endif
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2018-06-15 09:40:51 -04:00
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extern char _bss_start_btdm;
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extern char _bss_end_btdm;
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extern char _data_start_btdm;
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extern char _data_end_btdm;
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extern uint32_t _data_start_btdm_rom;
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extern uint32_t _data_end_btdm_rom;
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extern uint32_t _bt_bss_start;
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extern uint32_t _bt_bss_end;
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extern uint32_t _btdm_bss_start;
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extern uint32_t _btdm_bss_end;
|
|
|
|
extern uint32_t _bt_data_start;
|
|
|
|
extern uint32_t _bt_data_end;
|
|
|
|
extern uint32_t _btdm_data_start;
|
|
|
|
extern uint32_t _btdm_data_end;
|
|
|
|
|
2020-07-09 08:58:13 -04:00
|
|
|
extern char _bt_tmp_bss_start;
|
|
|
|
extern char _bt_tmp_bss_end;
|
|
|
|
|
2018-06-15 09:40:51 -04:00
|
|
|
/* Local Function Declare
|
|
|
|
*********************************************************************
|
|
|
|
*/
|
2021-03-19 02:59:30 -04:00
|
|
|
static void interrupt_set_wrapper(int32_t cpu_no, int32_t intr_source, int32_t intr_num, int32_t intr_prio);
|
|
|
|
static void interrupt_clear_wrapper(int32_t intr_source, int32_t intr_num);
|
|
|
|
static void interrupt_handler_set_wrapper(int n, void *fn, void *arg);
|
2022-01-19 21:25:43 -05:00
|
|
|
static void interrupt_disable(void);
|
|
|
|
static void interrupt_restore(void);
|
|
|
|
static void task_yield_from_isr(void);
|
2018-10-29 04:54:32 -04:00
|
|
|
static void *semphr_create_wrapper(uint32_t max, uint32_t init);
|
|
|
|
static void semphr_delete_wrapper(void *semphr);
|
2022-01-19 21:25:43 -05:00
|
|
|
static int32_t semphr_take_from_isr_wrapper(void *semphr, void *hptw);
|
|
|
|
static int32_t semphr_give_from_isr_wrapper(void *semphr, void *hptw);
|
2018-10-29 04:54:32 -04:00
|
|
|
static int32_t semphr_take_wrapper(void *semphr, uint32_t block_time_ms);
|
|
|
|
static int32_t semphr_give_wrapper(void *semphr);
|
|
|
|
static void *mutex_create_wrapper(void);
|
|
|
|
static void mutex_delete_wrapper(void *mutex);
|
|
|
|
static int32_t mutex_lock_wrapper(void *mutex);
|
|
|
|
static int32_t mutex_unlock_wrapper(void *mutex);
|
|
|
|
static void *queue_create_wrapper(uint32_t queue_len, uint32_t item_size);
|
|
|
|
static void queue_delete_wrapper(void *queue);
|
|
|
|
static int32_t queue_send_wrapper(void *queue, void *item, uint32_t block_time_ms);
|
2022-01-19 21:25:43 -05:00
|
|
|
static int32_t queue_send_from_isr_wrapper(void *queue, void *item, void *hptw);
|
2018-10-29 04:54:32 -04:00
|
|
|
static int32_t queue_recv_wrapper(void *queue, void *item, uint32_t block_time_ms);
|
2022-01-19 21:25:43 -05:00
|
|
|
static int32_t queue_recv_from_isr_wrapper(void *queue, void *item, void *hptw);
|
2018-10-29 04:54:32 -04:00
|
|
|
static int32_t task_create_wrapper(void *task_func, const char *name, uint32_t stack_depth, void *param, uint32_t prio, void *task_handle, uint32_t core_id);
|
|
|
|
static void task_delete_wrapper(void *task_handle);
|
2022-01-19 21:25:43 -05:00
|
|
|
static bool is_in_isr_wrapper(void);
|
2018-10-29 04:54:32 -04:00
|
|
|
static void *malloc_internal_wrapper(size_t size);
|
2022-01-19 21:25:43 -05:00
|
|
|
static int32_t read_mac_wrapper(uint8_t mac[6]);
|
|
|
|
static void srand_wrapper(unsigned int seed);
|
|
|
|
static int rand_wrapper(void);
|
|
|
|
static uint32_t btdm_lpcycles_2_hus(uint32_t cycles, uint32_t *error_corr);
|
|
|
|
static uint32_t btdm_hus_2_lpcycles(uint32_t hus);
|
|
|
|
static bool btdm_sleep_check_duration(int32_t *slot_cnt);
|
2018-12-11 03:49:01 -05:00
|
|
|
static void btdm_sleep_enter_phase1_wrapper(uint32_t lpcycles);
|
|
|
|
static void btdm_sleep_enter_phase2_wrapper(void);
|
|
|
|
static void btdm_sleep_exit_phase3_wrapper(void);
|
2021-01-25 04:12:36 -05:00
|
|
|
static void coex_wifi_sleep_set_hook(bool sleep);
|
|
|
|
static void coex_schm_status_bit_set_wrapper(uint32_t type, uint32_t status);
|
|
|
|
static void coex_schm_status_bit_clear_wrapper(uint32_t type, uint32_t status);
|
2021-03-19 02:59:30 -04:00
|
|
|
static void interrupt_on_wrapper(int intr_num);
|
|
|
|
static void interrupt_off_wrapper(int intr_num);
|
|
|
|
static void btdm_hw_mac_power_up_wrapper(void);
|
|
|
|
static void btdm_hw_mac_power_down_wrapper(void);
|
|
|
|
static void btdm_backup_dma_copy_wrapper(uint32_t reg, uint32_t mem_addr, uint32_t num, bool to_mem);
|
2018-06-15 09:40:51 -04:00
|
|
|
|
2021-03-19 02:59:30 -04:00
|
|
|
static void btdm_slp_tmr_callback(void *arg);
|
2018-06-15 09:40:51 -04:00
|
|
|
/* Local variable definition
|
|
|
|
***************************************************************************
|
|
|
|
*/
|
|
|
|
/* OSI funcs */
|
|
|
|
static const struct osi_funcs_t osi_funcs_ro = {
|
2020-07-09 08:58:13 -04:00
|
|
|
._magic = OSI_MAGIC_VALUE,
|
2018-06-15 09:40:51 -04:00
|
|
|
._version = OSI_VERSION,
|
2021-03-19 02:59:30 -04:00
|
|
|
._interrupt_set = interrupt_set_wrapper,
|
|
|
|
._interrupt_clear = interrupt_clear_wrapper,
|
|
|
|
._interrupt_handler_set = interrupt_handler_set_wrapper,
|
2018-06-15 09:40:51 -04:00
|
|
|
._interrupt_disable = interrupt_disable,
|
|
|
|
._interrupt_restore = interrupt_restore,
|
|
|
|
._task_yield = vPortYield,
|
|
|
|
._task_yield_from_isr = task_yield_from_isr,
|
|
|
|
._semphr_create = semphr_create_wrapper,
|
|
|
|
._semphr_delete = semphr_delete_wrapper,
|
|
|
|
._semphr_take_from_isr = semphr_take_from_isr_wrapper,
|
|
|
|
._semphr_give_from_isr = semphr_give_from_isr_wrapper,
|
|
|
|
._semphr_take = semphr_take_wrapper,
|
|
|
|
._semphr_give = semphr_give_wrapper,
|
|
|
|
._mutex_create = mutex_create_wrapper,
|
|
|
|
._mutex_delete = mutex_delete_wrapper,
|
|
|
|
._mutex_lock = mutex_lock_wrapper,
|
|
|
|
._mutex_unlock = mutex_unlock_wrapper,
|
|
|
|
._queue_create = queue_create_wrapper,
|
|
|
|
._queue_delete = queue_delete_wrapper,
|
|
|
|
._queue_send = queue_send_wrapper,
|
|
|
|
._queue_send_from_isr = queue_send_from_isr_wrapper,
|
|
|
|
._queue_recv = queue_recv_wrapper,
|
|
|
|
._queue_recv_from_isr = queue_recv_from_isr_wrapper,
|
|
|
|
._task_create = task_create_wrapper,
|
|
|
|
._task_delete = task_delete_wrapper,
|
|
|
|
._is_in_isr = is_in_isr_wrapper,
|
2021-03-19 02:59:30 -04:00
|
|
|
._cause_sw_intr_to_core = NULL,
|
2018-06-15 09:40:51 -04:00
|
|
|
._malloc = malloc,
|
|
|
|
._malloc_internal = malloc_internal_wrapper,
|
|
|
|
._free = free,
|
|
|
|
._read_efuse_mac = read_mac_wrapper,
|
|
|
|
._srand = srand_wrapper,
|
|
|
|
._rand = rand_wrapper,
|
2020-07-09 08:58:13 -04:00
|
|
|
._btdm_lpcycles_2_hus = btdm_lpcycles_2_hus,
|
|
|
|
._btdm_hus_2_lpcycles = btdm_hus_2_lpcycles,
|
2018-06-15 09:40:51 -04:00
|
|
|
._btdm_sleep_check_duration = btdm_sleep_check_duration,
|
2018-12-11 03:49:01 -05:00
|
|
|
._btdm_sleep_enter_phase1 = btdm_sleep_enter_phase1_wrapper,
|
|
|
|
._btdm_sleep_enter_phase2 = btdm_sleep_enter_phase2_wrapper,
|
2021-03-19 02:59:30 -04:00
|
|
|
._btdm_sleep_exit_phase1 = NULL,
|
2018-12-11 03:49:01 -05:00
|
|
|
._btdm_sleep_exit_phase2 = NULL,
|
|
|
|
._btdm_sleep_exit_phase3 = btdm_sleep_exit_phase3_wrapper,
|
2021-01-25 04:12:36 -05:00
|
|
|
._coex_wifi_sleep_set = coex_wifi_sleep_set_hook,
|
2021-03-19 02:59:30 -04:00
|
|
|
._coex_core_ble_conn_dyn_prio_get = coex_core_ble_conn_dyn_prio_get,
|
2021-01-25 04:12:36 -05:00
|
|
|
._coex_schm_status_bit_set = coex_schm_status_bit_set_wrapper,
|
|
|
|
._coex_schm_status_bit_clear = coex_schm_status_bit_clear_wrapper,
|
2021-03-19 02:59:30 -04:00
|
|
|
._interrupt_on = interrupt_on_wrapper,
|
|
|
|
._interrupt_off = interrupt_off_wrapper,
|
|
|
|
._esp_hw_power_down = btdm_hw_mac_power_down_wrapper,
|
|
|
|
._esp_hw_power_up = btdm_hw_mac_power_up_wrapper,
|
|
|
|
._ets_backup_dma_copy = btdm_backup_dma_copy_wrapper,
|
2016-10-18 09:49:00 -04:00
|
|
|
};
|
|
|
|
|
2018-12-13 22:29:00 -05:00
|
|
|
static DRAM_ATTR struct osi_funcs_t *osi_funcs_p;
|
2018-06-15 09:40:51 -04:00
|
|
|
|
2017-02-17 06:24:58 -05:00
|
|
|
/* Static variable declare */
|
2018-12-13 22:29:00 -05:00
|
|
|
static DRAM_ATTR esp_bt_controller_status_t btdm_controller_status = ESP_BT_CONTROLLER_STATUS_IDLE;
|
2017-02-17 06:24:58 -05:00
|
|
|
|
2018-12-13 22:29:00 -05:00
|
|
|
static DRAM_ATTR portMUX_TYPE global_int_mux = portMUX_INITIALIZER_UNLOCKED;
|
2016-10-18 09:49:00 -04:00
|
|
|
|
2021-03-19 02:59:30 -04:00
|
|
|
// low power control struct
|
|
|
|
static DRAM_ATTR btdm_lpcntl_t s_lp_cntl;
|
|
|
|
// low power status struct
|
|
|
|
static DRAM_ATTR btdm_lpstat_t s_lp_stat;
|
2018-04-08 07:19:47 -04:00
|
|
|
// measured average low power clock period in micro seconds
|
2018-12-13 22:29:00 -05:00
|
|
|
static DRAM_ATTR uint32_t btdm_lpcycle_us = 0;
|
2021-03-19 02:59:30 -04:00
|
|
|
// number of fractional bit for btdm_lpcycle_us
|
|
|
|
static DRAM_ATTR uint8_t btdm_lpcycle_us_frac = 0;
|
|
|
|
// semaphore used for blocking VHCI API to wait for controller to wake up
|
|
|
|
static DRAM_ATTR QueueHandle_t s_wakeup_req_sem = NULL;
|
|
|
|
// wakeup timer
|
|
|
|
static DRAM_ATTR esp_timer_handle_t s_btdm_slp_tmr;
|
2018-04-08 07:19:47 -04:00
|
|
|
|
2017-10-09 03:34:31 -04:00
|
|
|
#ifdef CONFIG_PM_ENABLE
|
2018-12-13 22:29:00 -05:00
|
|
|
static DRAM_ATTR esp_pm_lock_handle_t s_pm_lock;
|
2021-03-19 02:59:30 -04:00
|
|
|
// pm_lock to prevent light sleep due to incompatibility currently
|
|
|
|
static DRAM_ATTR esp_pm_lock_handle_t s_light_sleep_pm_lock;
|
2020-07-09 08:58:13 -04:00
|
|
|
#endif
|
2021-03-19 02:59:30 -04:00
|
|
|
|
|
|
|
void IRAM_ATTR btdm_hw_mac_power_down_wrapper(void)
|
2018-12-11 03:49:01 -05:00
|
|
|
{
|
2021-03-19 02:59:30 -04:00
|
|
|
#if CONFIG_MAC_BB_PD
|
|
|
|
esp_mac_bb_power_down();
|
|
|
|
#endif
|
2018-12-11 03:49:01 -05:00
|
|
|
}
|
|
|
|
|
2021-03-19 02:59:30 -04:00
|
|
|
void IRAM_ATTR btdm_hw_mac_power_up_wrapper(void)
|
2018-03-29 23:39:42 -04:00
|
|
|
{
|
2021-03-19 02:59:30 -04:00
|
|
|
#if CONFIG_MAC_BB_PD
|
|
|
|
esp_mac_bb_power_up();
|
|
|
|
#endif
|
2018-03-29 23:39:42 -04:00
|
|
|
}
|
|
|
|
|
2021-03-19 02:59:30 -04:00
|
|
|
void IRAM_ATTR btdm_backup_dma_copy_wrapper(uint32_t reg, uint32_t mem_addr, uint32_t num, bool to_mem)
|
2018-03-29 23:39:42 -04:00
|
|
|
{
|
2021-03-19 02:59:30 -04:00
|
|
|
#if CONFIG_MAC_BB_PD
|
|
|
|
ets_backup_dma_copy(reg, mem_addr, num, to_mem);
|
|
|
|
#endif
|
|
|
|
}
|
2018-03-29 23:39:42 -04:00
|
|
|
|
2021-09-14 05:47:09 -04:00
|
|
|
static inline void esp_bt_power_domain_on(void)
|
|
|
|
{
|
|
|
|
// Bluetooth module power up
|
|
|
|
esp_wifi_bt_power_domain_on();
|
|
|
|
}
|
|
|
|
|
|
|
|
static inline void esp_bt_power_domain_off(void)
|
|
|
|
{
|
|
|
|
// Bluetooth module power down
|
|
|
|
esp_wifi_bt_power_domain_off();
|
|
|
|
}
|
|
|
|
|
2021-03-19 02:59:30 -04:00
|
|
|
static void interrupt_set_wrapper(int32_t cpu_no, int32_t intr_source, int32_t intr_num, int32_t intr_prio)
|
|
|
|
{
|
2022-01-17 04:44:25 -05:00
|
|
|
esp_rom_route_intr_matrix(cpu_no, intr_source, intr_num);
|
2021-03-19 02:59:30 -04:00
|
|
|
}
|
|
|
|
|
|
|
|
static void interrupt_clear_wrapper(int32_t intr_source, int32_t intr_num)
|
|
|
|
{
|
2018-03-29 23:39:42 -04:00
|
|
|
}
|
|
|
|
|
2021-03-19 02:59:30 -04:00
|
|
|
static void interrupt_handler_set_wrapper(int32_t n, void *fn, void *arg)
|
|
|
|
{
|
|
|
|
xt_set_interrupt_handler(n, (xt_handler)fn, arg);
|
|
|
|
}
|
|
|
|
|
|
|
|
static void interrupt_on_wrapper(int intr_num)
|
|
|
|
{
|
|
|
|
xt_ints_on(1 << intr_num);
|
|
|
|
}
|
|
|
|
|
|
|
|
static void interrupt_off_wrapper(int intr_num)
|
|
|
|
{
|
|
|
|
xt_ints_off(1 << intr_num);
|
|
|
|
}
|
2018-03-29 23:39:42 -04:00
|
|
|
|
2016-10-18 09:49:00 -04:00
|
|
|
static void IRAM_ATTR interrupt_disable(void)
|
|
|
|
{
|
2018-07-01 09:35:00 -04:00
|
|
|
if (xPortInIsrContext()) {
|
|
|
|
portENTER_CRITICAL_ISR(&global_int_mux);
|
|
|
|
} else {
|
|
|
|
portENTER_CRITICAL(&global_int_mux);
|
|
|
|
}
|
2016-10-18 09:49:00 -04:00
|
|
|
}
|
|
|
|
|
|
|
|
static void IRAM_ATTR interrupt_restore(void)
|
|
|
|
{
|
2018-07-01 09:35:00 -04:00
|
|
|
if (xPortInIsrContext()) {
|
|
|
|
portEXIT_CRITICAL_ISR(&global_int_mux);
|
|
|
|
} else {
|
|
|
|
portEXIT_CRITICAL(&global_int_mux);
|
|
|
|
}
|
2016-10-18 09:49:00 -04:00
|
|
|
}
|
|
|
|
|
2017-06-07 02:58:17 -04:00
|
|
|
static void IRAM_ATTR task_yield_from_isr(void)
|
|
|
|
{
|
|
|
|
portYIELD_FROM_ISR();
|
|
|
|
}
|
|
|
|
|
2018-10-29 04:54:32 -04:00
|
|
|
static void *semphr_create_wrapper(uint32_t max, uint32_t init)
|
2016-10-18 09:49:00 -04:00
|
|
|
{
|
|
|
|
return (void *)xSemaphoreCreateCounting(max, init);
|
|
|
|
}
|
|
|
|
|
2018-10-29 04:54:32 -04:00
|
|
|
static void semphr_delete_wrapper(void *semphr)
|
2017-07-11 09:46:17 -04:00
|
|
|
{
|
|
|
|
vSemaphoreDelete(semphr);
|
|
|
|
}
|
|
|
|
|
2021-03-19 02:59:30 -04:00
|
|
|
static int IRAM_ATTR semphr_take_from_isr_wrapper(void *semphr, void *hptw)
|
2017-07-11 09:46:17 -04:00
|
|
|
{
|
2021-03-19 02:59:30 -04:00
|
|
|
return (int)xSemaphoreTakeFromISR(semphr, hptw);
|
2017-07-11 09:46:17 -04:00
|
|
|
}
|
|
|
|
|
2021-03-19 02:59:30 -04:00
|
|
|
static int IRAM_ATTR semphr_give_from_isr_wrapper(void *semphr, void *hptw)
|
2016-10-18 09:49:00 -04:00
|
|
|
{
|
2021-03-19 02:59:30 -04:00
|
|
|
return (int)xSemaphoreGiveFromISR(semphr, hptw);
|
2016-10-18 09:49:00 -04:00
|
|
|
}
|
|
|
|
|
2021-03-19 02:59:30 -04:00
|
|
|
static int semphr_take_wrapper(void *semphr, uint32_t block_time_ms)
|
2016-10-18 09:49:00 -04:00
|
|
|
{
|
2017-07-11 09:46:17 -04:00
|
|
|
if (block_time_ms == OSI_FUNCS_TIME_BLOCKING) {
|
2021-03-19 02:59:30 -04:00
|
|
|
return (int)xSemaphoreTake(semphr, portMAX_DELAY);
|
2017-07-11 09:46:17 -04:00
|
|
|
} else {
|
2021-03-19 02:59:30 -04:00
|
|
|
return (int)xSemaphoreTake(semphr, block_time_ms / portTICK_PERIOD_MS);
|
2017-07-11 09:46:17 -04:00
|
|
|
}
|
|
|
|
}
|
|
|
|
|
2021-03-19 02:59:30 -04:00
|
|
|
static int semphr_give_wrapper(void *semphr)
|
2017-07-11 09:46:17 -04:00
|
|
|
{
|
2021-03-19 02:59:30 -04:00
|
|
|
return (int)xSemaphoreGive(semphr);
|
2016-10-18 09:49:00 -04:00
|
|
|
}
|
|
|
|
|
2018-10-29 04:54:32 -04:00
|
|
|
static void *mutex_create_wrapper(void)
|
2016-10-18 09:49:00 -04:00
|
|
|
{
|
|
|
|
return (void *)xSemaphoreCreateMutex();
|
|
|
|
}
|
|
|
|
|
2018-10-29 04:54:32 -04:00
|
|
|
static void mutex_delete_wrapper(void *mutex)
|
2017-07-11 09:46:17 -04:00
|
|
|
{
|
|
|
|
vSemaphoreDelete(mutex);
|
|
|
|
}
|
|
|
|
|
2021-03-19 02:59:30 -04:00
|
|
|
static int mutex_lock_wrapper(void *mutex)
|
2016-10-18 09:49:00 -04:00
|
|
|
{
|
2021-03-19 02:59:30 -04:00
|
|
|
return (int)xSemaphoreTake(mutex, portMAX_DELAY);
|
2016-10-18 09:49:00 -04:00
|
|
|
}
|
|
|
|
|
2021-03-19 02:59:30 -04:00
|
|
|
static int mutex_unlock_wrapper(void *mutex)
|
2016-10-18 09:49:00 -04:00
|
|
|
{
|
2021-03-19 02:59:30 -04:00
|
|
|
return (int)xSemaphoreGive(mutex);
|
2016-10-18 09:49:00 -04:00
|
|
|
}
|
|
|
|
|
2018-10-29 04:54:32 -04:00
|
|
|
static void *queue_create_wrapper(uint32_t queue_len, uint32_t item_size)
|
2017-07-11 09:46:17 -04:00
|
|
|
{
|
|
|
|
return (void *)xQueueCreate(queue_len, item_size);
|
|
|
|
}
|
|
|
|
|
2018-10-29 04:54:32 -04:00
|
|
|
static void queue_delete_wrapper(void *queue)
|
2017-07-11 09:46:17 -04:00
|
|
|
{
|
|
|
|
vQueueDelete(queue);
|
|
|
|
}
|
|
|
|
|
2021-03-19 02:59:30 -04:00
|
|
|
static int queue_send_wrapper(void *queue, void *item, uint32_t block_time_ms)
|
2017-07-11 09:46:17 -04:00
|
|
|
{
|
|
|
|
if (block_time_ms == OSI_FUNCS_TIME_BLOCKING) {
|
2021-03-19 02:59:30 -04:00
|
|
|
return (int)xQueueSend(queue, item, portMAX_DELAY);
|
2017-07-11 09:46:17 -04:00
|
|
|
} else {
|
2021-03-19 02:59:30 -04:00
|
|
|
return (int)xQueueSend(queue, item, block_time_ms / portTICK_PERIOD_MS);
|
2017-07-11 09:46:17 -04:00
|
|
|
}
|
|
|
|
}
|
|
|
|
|
2021-03-19 02:59:30 -04:00
|
|
|
static int IRAM_ATTR queue_send_from_isr_wrapper(void *queue, void *item, void *hptw)
|
2017-07-11 09:46:17 -04:00
|
|
|
{
|
2021-03-19 02:59:30 -04:00
|
|
|
return (int)xQueueSendFromISR(queue, item, hptw);
|
2017-07-11 09:46:17 -04:00
|
|
|
}
|
|
|
|
|
2021-03-19 02:59:30 -04:00
|
|
|
static int queue_recv_wrapper(void *queue, void *item, uint32_t block_time_ms)
|
2017-07-11 09:46:17 -04:00
|
|
|
{
|
|
|
|
if (block_time_ms == OSI_FUNCS_TIME_BLOCKING) {
|
2021-03-19 02:59:30 -04:00
|
|
|
return (int)xQueueReceive(queue, item, portMAX_DELAY);
|
2017-07-11 09:46:17 -04:00
|
|
|
} else {
|
2021-03-19 02:59:30 -04:00
|
|
|
return (int)xQueueReceive(queue, item, block_time_ms / portTICK_PERIOD_MS);
|
2017-07-11 09:46:17 -04:00
|
|
|
}
|
|
|
|
}
|
|
|
|
|
2021-03-19 02:59:30 -04:00
|
|
|
static int IRAM_ATTR queue_recv_from_isr_wrapper(void *queue, void *item, void *hptw)
|
2017-07-11 09:46:17 -04:00
|
|
|
{
|
2021-03-19 02:59:30 -04:00
|
|
|
return (int)xQueueReceiveFromISR(queue, item, hptw);
|
2017-07-11 09:46:17 -04:00
|
|
|
}
|
|
|
|
|
2021-03-19 02:59:30 -04:00
|
|
|
static int task_create_wrapper(void *task_func, const char *name, uint32_t stack_depth, void *param, uint32_t prio, void *task_handle, uint32_t core_id)
|
2017-07-11 09:46:17 -04:00
|
|
|
{
|
|
|
|
return (uint32_t)xTaskCreatePinnedToCore(task_func, name, stack_depth, param, prio, task_handle, (core_id < portNUM_PROCESSORS ? core_id : tskNO_AFFINITY));
|
|
|
|
}
|
|
|
|
|
2018-10-29 04:54:32 -04:00
|
|
|
static void task_delete_wrapper(void *task_handle)
|
2017-07-11 09:46:17 -04:00
|
|
|
{
|
|
|
|
vTaskDelete(task_handle);
|
|
|
|
}
|
|
|
|
|
2017-07-25 07:58:39 -04:00
|
|
|
static bool IRAM_ATTR is_in_isr_wrapper(void)
|
|
|
|
{
|
2020-07-09 08:58:13 -04:00
|
|
|
return (bool)xPortInIsrContext();
|
2017-07-25 07:58:39 -04:00
|
|
|
}
|
|
|
|
|
2018-10-29 04:54:32 -04:00
|
|
|
static void *malloc_internal_wrapper(size_t size)
|
2018-06-15 09:40:51 -04:00
|
|
|
{
|
2021-03-19 02:59:30 -04:00
|
|
|
void *p = heap_caps_malloc(size, MALLOC_CAP_DEFAULT|MALLOC_CAP_INTERNAL|MALLOC_CAP_DMA);
|
|
|
|
if(p == NULL) {
|
|
|
|
ESP_LOGE(BT_LOG_TAG, "Malloc failed");
|
|
|
|
}
|
|
|
|
return p;
|
2018-06-15 09:40:51 -04:00
|
|
|
}
|
|
|
|
|
2021-03-19 02:59:30 -04:00
|
|
|
static int IRAM_ATTR read_mac_wrapper(uint8_t mac[6])
|
2017-03-01 08:04:12 -05:00
|
|
|
{
|
2021-03-19 02:59:30 -04:00
|
|
|
int ret = esp_read_mac(mac, ESP_MAC_BT);
|
|
|
|
ESP_LOGI(BT_LOG_TAG, "Bluetooth MAC: %02x:%02x:%02x:%02x:%02x:%02x\n",
|
2020-07-09 08:58:13 -04:00
|
|
|
mac[0], mac[1], mac[2], mac[3], mac[4], mac[5]);
|
2021-03-19 02:59:30 -04:00
|
|
|
|
|
|
|
return ret;
|
2017-03-01 08:04:12 -05:00
|
|
|
}
|
|
|
|
|
2017-03-24 02:57:07 -04:00
|
|
|
static void IRAM_ATTR srand_wrapper(unsigned int seed)
|
|
|
|
{
|
|
|
|
/* empty function */
|
|
|
|
}
|
|
|
|
|
|
|
|
static int IRAM_ATTR rand_wrapper(void)
|
|
|
|
{
|
|
|
|
return (int)esp_random();
|
|
|
|
}
|
|
|
|
|
2020-07-09 08:58:13 -04:00
|
|
|
static uint32_t IRAM_ATTR btdm_lpcycles_2_hus(uint32_t cycles, uint32_t *error_corr)
|
2018-04-08 07:19:47 -04:00
|
|
|
{
|
2020-07-09 08:58:13 -04:00
|
|
|
uint64_t local_error_corr = (error_corr == NULL) ? 0 : (uint64_t)(*error_corr);
|
|
|
|
uint64_t res = (uint64_t)btdm_lpcycle_us * cycles * 2;
|
|
|
|
local_error_corr += res;
|
|
|
|
res = (local_error_corr >> btdm_lpcycle_us_frac);
|
|
|
|
local_error_corr -= (res << btdm_lpcycle_us_frac);
|
|
|
|
if (error_corr) {
|
|
|
|
*error_corr = (uint32_t) local_error_corr;
|
|
|
|
}
|
|
|
|
return (uint32_t)res;
|
2018-04-08 07:19:47 -04:00
|
|
|
}
|
|
|
|
|
|
|
|
/*
|
2020-07-09 08:58:13 -04:00
|
|
|
* @brief Converts a duration in half us into a number of low power clock cycles.
|
2018-04-08 07:19:47 -04:00
|
|
|
*/
|
2020-07-09 08:58:13 -04:00
|
|
|
static uint32_t IRAM_ATTR btdm_hus_2_lpcycles(uint32_t hus)
|
2018-04-08 07:19:47 -04:00
|
|
|
{
|
2018-06-27 05:23:23 -04:00
|
|
|
// The number of sleep duration(us) should not lead to overflow. Thrs: 100s
|
2018-04-08 07:19:47 -04:00
|
|
|
// Compute the sleep duration in us to low power clock cycles, with calibration result applied
|
|
|
|
// clock measurement is conducted
|
2020-07-09 08:58:13 -04:00
|
|
|
uint64_t cycles = ((uint64_t)(hus) << btdm_lpcycle_us_frac) / btdm_lpcycle_us;
|
|
|
|
cycles >>= 1;
|
2018-04-08 07:19:47 -04:00
|
|
|
|
|
|
|
return (uint32_t)cycles;
|
|
|
|
}
|
|
|
|
|
2020-07-09 08:58:13 -04:00
|
|
|
static bool IRAM_ATTR btdm_sleep_check_duration(int32_t *half_slot_cnt)
|
2018-04-08 07:19:47 -04:00
|
|
|
{
|
2020-07-09 08:58:13 -04:00
|
|
|
if (*half_slot_cnt < BTDM_MIN_SLEEP_DURATION) {
|
2018-04-08 07:19:47 -04:00
|
|
|
return false;
|
|
|
|
}
|
2018-12-11 03:49:01 -05:00
|
|
|
/* wake up in advance considering the delay in enabling PHY/RF */
|
2020-07-09 08:58:13 -04:00
|
|
|
*half_slot_cnt -= BTDM_MODEM_WAKE_UP_DELAY;
|
2018-04-08 07:19:47 -04:00
|
|
|
return true;
|
|
|
|
}
|
|
|
|
|
2018-12-11 03:49:01 -05:00
|
|
|
static void btdm_sleep_enter_phase1_wrapper(uint32_t lpcycles)
|
|
|
|
{
|
2021-03-19 02:59:30 -04:00
|
|
|
if (s_lp_cntl.wakeup_timer_required == 0) {
|
|
|
|
return;
|
|
|
|
}
|
|
|
|
|
2018-12-11 03:49:01 -05:00
|
|
|
// start a timer to wake up and acquire the pm_lock before modem_sleep awakes
|
2021-03-19 02:59:30 -04:00
|
|
|
uint32_t us_to_sleep = btdm_lpcycles_2_hus(lpcycles, NULL) >> 1;
|
2018-12-11 03:49:01 -05:00
|
|
|
|
2020-07-09 08:58:13 -04:00
|
|
|
#define BTDM_MIN_TIMER_UNCERTAINTY_US (1800)
|
2018-12-11 03:49:01 -05:00
|
|
|
assert(us_to_sleep > BTDM_MIN_TIMER_UNCERTAINTY_US);
|
|
|
|
// allow a maximum time uncertainty to be about 488ppm(1/2048) at least as clock drift
|
|
|
|
// and set the timer in advance
|
|
|
|
uint32_t uncertainty = (us_to_sleep >> 11);
|
|
|
|
if (uncertainty < BTDM_MIN_TIMER_UNCERTAINTY_US) {
|
|
|
|
uncertainty = BTDM_MIN_TIMER_UNCERTAINTY_US;
|
|
|
|
}
|
|
|
|
|
2021-03-19 02:59:30 -04:00
|
|
|
assert (s_lp_stat.wakeup_timer_started == 0);
|
|
|
|
if (esp_timer_start_once(s_btdm_slp_tmr, us_to_sleep - uncertainty) == ESP_OK) {
|
|
|
|
s_lp_stat.wakeup_timer_started = 1;
|
|
|
|
} else {
|
|
|
|
ESP_LOGE(BT_LOG_TAG, "timer start failed");
|
|
|
|
assert(0);
|
2018-12-11 03:49:01 -05:00
|
|
|
}
|
|
|
|
}
|
|
|
|
|
|
|
|
static void btdm_sleep_enter_phase2_wrapper(void)
|
2018-04-08 07:19:47 -04:00
|
|
|
{
|
2020-07-09 08:58:13 -04:00
|
|
|
if (btdm_controller_get_sleep_mode() == ESP_BT_SLEEP_MODE_1) {
|
2021-03-19 02:59:30 -04:00
|
|
|
if (s_lp_stat.phy_enabled) {
|
|
|
|
esp_phy_disable();
|
|
|
|
s_lp_stat.phy_enabled = 0;
|
|
|
|
} else {
|
|
|
|
assert(0);
|
|
|
|
}
|
2020-07-09 08:58:13 -04:00
|
|
|
|
2021-03-19 02:59:30 -04:00
|
|
|
if (s_lp_stat.pm_lock_released == 0) {
|
2018-12-11 03:49:01 -05:00
|
|
|
#ifdef CONFIG_PM_ENABLE
|
2021-03-19 02:59:30 -04:00
|
|
|
esp_pm_lock_release(s_pm_lock);
|
2018-12-11 03:49:01 -05:00
|
|
|
#endif
|
2021-03-19 02:59:30 -04:00
|
|
|
s_lp_stat.pm_lock_released = 1;
|
|
|
|
}
|
2018-04-08 07:19:47 -04:00
|
|
|
}
|
|
|
|
}
|
|
|
|
|
2021-03-19 02:59:30 -04:00
|
|
|
static void btdm_sleep_exit_phase3_wrapper(void)
|
2018-12-11 03:49:01 -05:00
|
|
|
{
|
|
|
|
#ifdef CONFIG_PM_ENABLE
|
2021-03-19 02:59:30 -04:00
|
|
|
// If BT wakeup before esp timer coming due to timer task have no chance to run.
|
|
|
|
// Then we will not run into `btdm_sleep_exit_phase0` and acquire PM lock,
|
|
|
|
// Do it again here to fix this issue.
|
|
|
|
if (s_lp_stat.pm_lock_released) {
|
2018-12-11 03:49:01 -05:00
|
|
|
esp_pm_lock_acquire(s_pm_lock);
|
2021-03-19 02:59:30 -04:00
|
|
|
s_lp_stat.pm_lock_released = 0;
|
2018-12-11 03:49:01 -05:00
|
|
|
}
|
|
|
|
#endif
|
2021-03-19 02:59:30 -04:00
|
|
|
|
|
|
|
if (btdm_controller_get_sleep_mode() == ESP_BT_SLEEP_MODE_1) {
|
|
|
|
if (s_lp_stat.phy_enabled == 0) {
|
|
|
|
esp_phy_enable();
|
|
|
|
s_lp_stat.phy_enabled = 1;
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
|
|
|
// If BT wakeup before esp timer coming due to timer task have no chance to run.
|
|
|
|
// Then we will not run into `btdm_sleep_exit_phase0` and stop esp timer,
|
|
|
|
// Do it again here to fix this issue.
|
|
|
|
if (s_lp_cntl.wakeup_timer_required && s_lp_stat.wakeup_timer_started) {
|
|
|
|
esp_timer_stop(s_btdm_slp_tmr);
|
|
|
|
s_lp_stat.wakeup_timer_started = 0;
|
|
|
|
}
|
2021-06-23 20:11:44 -04:00
|
|
|
|
|
|
|
// wait for the sleep state to change
|
|
|
|
// the procedure duration is at micro-second level or less
|
|
|
|
while (btdm_sleep_clock_sync()) {
|
|
|
|
;
|
|
|
|
}
|
2020-07-09 08:58:13 -04:00
|
|
|
}
|
2018-12-11 03:49:01 -05:00
|
|
|
|
2021-03-19 02:59:30 -04:00
|
|
|
static void IRAM_ATTR btdm_sleep_exit_phase0(void *param)
|
2020-07-09 08:58:13 -04:00
|
|
|
{
|
2021-03-19 02:59:30 -04:00
|
|
|
assert(s_lp_cntl.enable == 1);
|
|
|
|
|
2018-12-11 03:49:01 -05:00
|
|
|
#ifdef CONFIG_PM_ENABLE
|
2021-03-19 02:59:30 -04:00
|
|
|
if (s_lp_stat.pm_lock_released) {
|
|
|
|
esp_pm_lock_acquire(s_pm_lock);
|
|
|
|
s_lp_stat.pm_lock_released = 0;
|
|
|
|
}
|
2018-12-11 03:49:01 -05:00
|
|
|
#endif
|
2021-03-19 02:59:30 -04:00
|
|
|
|
|
|
|
int event = (int) param;
|
|
|
|
if (event == BTDM_ASYNC_WAKEUP_SRC_VHCI || event == BTDM_ASYNC_WAKEUP_SRC_DISA) {
|
|
|
|
btdm_wakeup_request();
|
|
|
|
}
|
|
|
|
|
|
|
|
if (s_lp_cntl.wakeup_timer_required && s_lp_stat.wakeup_timer_started) {
|
|
|
|
esp_timer_stop(s_btdm_slp_tmr);
|
|
|
|
s_lp_stat.wakeup_timer_started = 0;
|
|
|
|
}
|
|
|
|
|
|
|
|
if (event == BTDM_ASYNC_WAKEUP_SRC_VHCI || event == BTDM_ASYNC_WAKEUP_SRC_DISA) {
|
|
|
|
semphr_give_wrapper(s_wakeup_req_sem);
|
2018-04-08 07:19:47 -04:00
|
|
|
}
|
|
|
|
}
|
|
|
|
|
2020-09-03 08:51:19 -04:00
|
|
|
static void IRAM_ATTR btdm_slp_tmr_callback(void *arg)
|
|
|
|
{
|
2021-03-19 02:59:30 -04:00
|
|
|
#ifdef CONFIG_PM_ENABLE
|
|
|
|
btdm_vnd_offload_post(BTDM_VND_OL_SIG_WAKEUP_TMR, (void *)BTDM_ASYNC_WAKEUP_SRC_TMR);
|
|
|
|
#endif
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
|
|
static bool async_wakeup_request(int event)
|
|
|
|
{
|
|
|
|
if (s_lp_cntl.enable == 0) {
|
|
|
|
return false;
|
|
|
|
}
|
|
|
|
|
|
|
|
bool do_wakeup_request = false;
|
|
|
|
switch (event) {
|
|
|
|
case BTDM_ASYNC_WAKEUP_SRC_VHCI:
|
|
|
|
case BTDM_ASYNC_WAKEUP_SRC_DISA:
|
|
|
|
btdm_in_wakeup_requesting_set(true);
|
|
|
|
if (!btdm_power_state_active()) {
|
|
|
|
btdm_vnd_offload_post(BTDM_VND_OL_SIG_WAKEUP_TMR, (void *)event);
|
|
|
|
do_wakeup_request = true;
|
|
|
|
semphr_take_wrapper(s_wakeup_req_sem, OSI_FUNCS_TIME_BLOCKING);
|
|
|
|
}
|
|
|
|
break;
|
|
|
|
default:
|
|
|
|
break;
|
2020-09-03 08:51:19 -04:00
|
|
|
}
|
2021-03-19 02:59:30 -04:00
|
|
|
|
|
|
|
return do_wakeup_request;
|
|
|
|
}
|
|
|
|
|
|
|
|
static void async_wakeup_request_end(int event)
|
|
|
|
{
|
|
|
|
if (s_lp_cntl.enable == 0) {
|
|
|
|
return;
|
|
|
|
}
|
|
|
|
|
|
|
|
bool allow_to_sleep;
|
|
|
|
switch (event) {
|
|
|
|
case BTDM_ASYNC_WAKEUP_SRC_VHCI:
|
|
|
|
case BTDM_ASYNC_WAKEUP_SRC_DISA:
|
|
|
|
allow_to_sleep = true;
|
|
|
|
break;
|
|
|
|
default:
|
|
|
|
allow_to_sleep = true;
|
|
|
|
break;
|
|
|
|
}
|
|
|
|
|
|
|
|
if (allow_to_sleep) {
|
|
|
|
btdm_in_wakeup_requesting_set(false);
|
|
|
|
}
|
|
|
|
|
|
|
|
return;
|
2020-08-26 05:51:13 -04:00
|
|
|
}
|
|
|
|
|
2021-01-25 04:12:36 -05:00
|
|
|
static void coex_schm_status_bit_set_wrapper(uint32_t type, uint32_t status)
|
|
|
|
{
|
|
|
|
#if CONFIG_SW_COEXIST_ENABLE
|
|
|
|
coex_schm_status_bit_set(type, status);
|
|
|
|
#endif
|
|
|
|
}
|
|
|
|
|
|
|
|
static void coex_schm_status_bit_clear_wrapper(uint32_t type, uint32_t status)
|
|
|
|
{
|
|
|
|
#if CONFIG_SW_COEXIST_ENABLE
|
|
|
|
coex_schm_status_bit_clear(type, status);
|
|
|
|
#endif
|
|
|
|
}
|
|
|
|
|
2020-03-20 05:58:05 -04:00
|
|
|
bool esp_vhci_host_check_send_available(void)
|
|
|
|
{
|
2021-03-19 02:59:30 -04:00
|
|
|
if (btdm_controller_status != ESP_BT_CONTROLLER_STATUS_ENABLED) {
|
|
|
|
return false;
|
|
|
|
}
|
2020-03-20 05:58:05 -04:00
|
|
|
return API_vhci_host_check_send_available();
|
|
|
|
}
|
|
|
|
|
|
|
|
void esp_vhci_host_send_packet(uint8_t *data, uint16_t len)
|
|
|
|
{
|
2021-03-19 02:59:30 -04:00
|
|
|
if (btdm_controller_status != ESP_BT_CONTROLLER_STATUS_ENABLED) {
|
|
|
|
return;
|
2020-07-09 08:58:13 -04:00
|
|
|
}
|
2021-03-19 02:59:30 -04:00
|
|
|
async_wakeup_request(BTDM_ASYNC_WAKEUP_SRC_VHCI);
|
|
|
|
|
2017-01-03 02:53:06 -05:00
|
|
|
API_vhci_host_send_packet(data, len);
|
2021-03-19 02:59:30 -04:00
|
|
|
|
|
|
|
async_wakeup_request_end(BTDM_ASYNC_WAKEUP_SRC_VHCI);
|
2017-01-03 02:53:06 -05:00
|
|
|
}
|
|
|
|
|
2018-06-15 09:40:51 -04:00
|
|
|
esp_err_t esp_vhci_host_register_callback(const esp_vhci_host_callback_t *callback)
|
2017-01-03 02:53:06 -05:00
|
|
|
{
|
2021-03-19 02:59:30 -04:00
|
|
|
if (btdm_controller_status != ESP_BT_CONTROLLER_STATUS_ENABLED) {
|
|
|
|
return ESP_FAIL;
|
|
|
|
}
|
2018-06-15 09:40:51 -04:00
|
|
|
return API_vhci_host_register_callback((const vhci_host_callback_t *)callback) == 0 ? ESP_OK : ESP_FAIL;
|
2017-01-03 02:53:06 -05:00
|
|
|
}
|
|
|
|
|
2017-09-19 08:10:35 -04:00
|
|
|
static void btdm_controller_mem_init(void)
|
2017-09-12 10:36:17 -04:00
|
|
|
{
|
2021-03-19 02:59:30 -04:00
|
|
|
extern void btdm_controller_rom_data_init(void );
|
|
|
|
btdm_controller_rom_data_init();
|
2018-08-28 04:01:07 -04:00
|
|
|
}
|
|
|
|
|
2017-09-19 08:10:35 -04:00
|
|
|
esp_err_t esp_bt_controller_mem_release(esp_bt_mode_t mode)
|
|
|
|
{
|
2021-03-19 02:59:30 -04:00
|
|
|
ESP_LOGW(BT_LOG_TAG, "%s not implemented, return OK", __func__);
|
2018-07-11 02:22:32 -04:00
|
|
|
return ESP_OK;
|
|
|
|
}
|
|
|
|
|
|
|
|
esp_err_t esp_bt_mem_release(esp_bt_mode_t mode)
|
|
|
|
{
|
2021-03-19 02:59:30 -04:00
|
|
|
ESP_LOGW(BT_LOG_TAG, "%s not implemented, return OK", __func__);
|
2017-09-19 08:10:35 -04:00
|
|
|
return ESP_OK;
|
2017-09-12 10:36:17 -04:00
|
|
|
}
|
|
|
|
|
2021-11-15 04:04:42 -05:00
|
|
|
#if CONFIG_MAC_BB_PD
|
2021-03-19 02:59:30 -04:00
|
|
|
static void IRAM_ATTR btdm_mac_bb_power_down_cb(void)
|
2016-10-18 09:49:00 -04:00
|
|
|
{
|
2021-03-19 02:59:30 -04:00
|
|
|
if (s_lp_cntl.mac_bb_pd && s_lp_stat.mac_bb_pd == 0) {
|
|
|
|
btdm_ble_power_down_dma_copy(true);
|
|
|
|
s_lp_stat.mac_bb_pd = 1;
|
2018-06-15 09:40:51 -04:00
|
|
|
}
|
2021-03-19 02:59:30 -04:00
|
|
|
}
|
2018-06-15 09:40:51 -04:00
|
|
|
|
2021-03-19 02:59:30 -04:00
|
|
|
static void IRAM_ATTR btdm_mac_bb_power_up_cb(void)
|
|
|
|
{
|
|
|
|
if (s_lp_cntl.mac_bb_pd && s_lp_stat.mac_bb_pd) {
|
|
|
|
btdm_ble_power_down_dma_copy(false);
|
|
|
|
s_lp_stat.mac_bb_pd = 0;
|
2018-06-15 09:40:51 -04:00
|
|
|
}
|
2021-03-19 02:59:30 -04:00
|
|
|
}
|
|
|
|
#endif
|
|
|
|
|
|
|
|
esp_err_t esp_bt_controller_init(esp_bt_controller_config_t *cfg)
|
|
|
|
{
|
|
|
|
esp_err_t err = ESP_FAIL;
|
2018-06-15 09:40:51 -04:00
|
|
|
|
2017-02-20 12:05:37 -05:00
|
|
|
if (btdm_controller_status != ESP_BT_CONTROLLER_STATUS_IDLE) {
|
2017-04-05 09:19:15 -04:00
|
|
|
return ESP_ERR_INVALID_STATE;
|
2017-02-20 12:05:37 -05:00
|
|
|
}
|
|
|
|
|
2017-04-05 09:19:15 -04:00
|
|
|
if (cfg == NULL) {
|
|
|
|
return ESP_ERR_INVALID_ARG;
|
|
|
|
}
|
|
|
|
|
2017-07-11 09:46:17 -04:00
|
|
|
if (cfg->controller_task_prio != ESP_TASK_BT_CONTROLLER_PRIO
|
2020-07-09 08:58:13 -04:00
|
|
|
|| cfg->controller_task_stack_size < ESP_TASK_BT_CONTROLLER_STACK) {
|
2021-03-19 02:59:30 -04:00
|
|
|
ESP_LOGE(BT_LOG_TAG, "Invalid controller task prioriy or stack size");
|
2017-07-11 09:46:17 -04:00
|
|
|
return ESP_ERR_INVALID_ARG;
|
2017-06-13 05:14:50 -04:00
|
|
|
}
|
|
|
|
|
2020-07-09 08:58:13 -04:00
|
|
|
if (cfg->bluetooth_mode != ESP_BT_MODE_BLE) {
|
2021-03-19 02:59:30 -04:00
|
|
|
ESP_LOGE(BT_LOG_TAG, "%s controller only support BLE only mode", __func__);
|
2020-07-09 08:58:13 -04:00
|
|
|
return ESP_ERR_NOT_SUPPORTED;
|
|
|
|
}
|
|
|
|
|
|
|
|
if (cfg->bluetooth_mode & ESP_BT_MODE_BLE) {
|
|
|
|
if ((cfg->ble_max_act <= 0) || (cfg->ble_max_act > BT_CTRL_BLE_MAX_ACT_LIMIT)) {
|
2021-03-19 02:59:30 -04:00
|
|
|
ESP_LOGE(BT_LOG_TAG, "Invalid value of ble_max_act");
|
2020-07-09 08:58:13 -04:00
|
|
|
return ESP_ERR_INVALID_ARG;
|
|
|
|
}
|
2018-06-15 09:40:51 -04:00
|
|
|
}
|
|
|
|
|
2020-07-09 08:58:13 -04:00
|
|
|
if (cfg->sleep_mode == ESP_BT_SLEEP_MODE_1) {
|
|
|
|
if (cfg->sleep_clock == ESP_BT_SLEEP_CLOCK_NONE) {
|
2021-03-19 02:59:30 -04:00
|
|
|
ESP_LOGE(BT_LOG_TAG, "SLEEP_MODE_1 enabled but sleep clock not configured");
|
2020-07-09 08:58:13 -04:00
|
|
|
return ESP_ERR_INVALID_ARG;
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
2021-03-19 02:59:30 -04:00
|
|
|
// overwrite some parameters
|
|
|
|
cfg->magic = ESP_BT_CTRL_CONFIG_MAGIC_VAL;
|
|
|
|
|
2021-09-17 05:11:35 -04:00
|
|
|
#if CONFIG_MAC_BB_PD
|
|
|
|
esp_mac_bb_pd_mem_init();
|
|
|
|
#endif
|
2021-09-14 05:47:09 -04:00
|
|
|
esp_bt_power_domain_on();
|
|
|
|
|
2021-03-19 02:59:30 -04:00
|
|
|
btdm_controller_mem_init();
|
2018-03-27 04:35:00 -04:00
|
|
|
|
2021-03-19 02:59:30 -04:00
|
|
|
#if CONFIG_MAC_BB_PD
|
|
|
|
if (esp_register_mac_bb_pd_callback(btdm_mac_bb_power_down_cb) != 0) {
|
|
|
|
err = ESP_ERR_INVALID_ARG;
|
|
|
|
goto error;
|
|
|
|
}
|
|
|
|
|
|
|
|
if (esp_register_mac_bb_pu_callback(btdm_mac_bb_power_up_cb) != 0) {
|
|
|
|
err = ESP_ERR_INVALID_ARG;
|
|
|
|
goto error;
|
2018-03-29 23:39:42 -04:00
|
|
|
}
|
|
|
|
#endif
|
|
|
|
|
2021-03-19 02:59:30 -04:00
|
|
|
osi_funcs_p = (struct osi_funcs_t *)malloc_internal_wrapper(sizeof(struct osi_funcs_t));
|
|
|
|
if (osi_funcs_p == NULL) {
|
|
|
|
return ESP_ERR_NO_MEM;
|
|
|
|
}
|
|
|
|
|
|
|
|
memcpy(osi_funcs_p, &osi_funcs_ro, sizeof(struct osi_funcs_t));
|
|
|
|
if (btdm_osi_funcs_register(osi_funcs_p) != 0) {
|
|
|
|
return ESP_ERR_INVALID_ARG;
|
|
|
|
}
|
|
|
|
|
|
|
|
ESP_LOGI(BT_LOG_TAG, "BT controller compile version [%s]", btdm_controller_get_compile_version());
|
|
|
|
|
|
|
|
// init low-power control resources
|
|
|
|
do {
|
|
|
|
// set default values for global states or resources
|
|
|
|
s_lp_stat.val = 0;
|
|
|
|
s_lp_cntl.val = 0;
|
|
|
|
s_wakeup_req_sem = NULL;
|
|
|
|
s_btdm_slp_tmr = NULL;
|
|
|
|
|
|
|
|
// configure and initialize resources
|
|
|
|
s_lp_cntl.enable = (cfg->sleep_mode == ESP_BT_SLEEP_MODE_1) ? 1 : 0;
|
2021-08-10 03:51:09 -04:00
|
|
|
s_lp_cntl.no_light_sleep = 1;
|
2021-03-19 02:59:30 -04:00
|
|
|
|
|
|
|
if (s_lp_cntl.enable) {
|
2021-11-15 04:04:42 -05:00
|
|
|
#if CONFIG_MAC_BB_PD
|
2021-03-19 02:59:30 -04:00
|
|
|
if (!btdm_deep_sleep_mem_init()) {
|
|
|
|
err = ESP_ERR_NO_MEM;
|
|
|
|
goto error;
|
|
|
|
}
|
|
|
|
s_lp_cntl.mac_bb_pd = 1;
|
|
|
|
#endif
|
2020-02-20 01:34:28 -05:00
|
|
|
#ifdef CONFIG_PM_ENABLE
|
2021-03-19 02:59:30 -04:00
|
|
|
s_lp_cntl.wakeup_timer_required = 1;
|
|
|
|
#endif
|
|
|
|
// async wakeup semaphore for VHCI
|
|
|
|
s_wakeup_req_sem = semphr_create_wrapper(1, 0);
|
|
|
|
if (s_wakeup_req_sem == NULL) {
|
|
|
|
err = ESP_ERR_NO_MEM;
|
|
|
|
goto error;
|
|
|
|
}
|
|
|
|
btdm_vnd_offload_task_register(BTDM_VND_OL_SIG_WAKEUP_TMR, btdm_sleep_exit_phase0);
|
2020-02-20 01:34:28 -05:00
|
|
|
}
|
2021-03-19 02:59:30 -04:00
|
|
|
|
|
|
|
if (s_lp_cntl.wakeup_timer_required) {
|
|
|
|
esp_timer_create_args_t create_args = {
|
|
|
|
.callback = btdm_slp_tmr_callback,
|
|
|
|
.arg = NULL,
|
|
|
|
.name = "btSlp",
|
|
|
|
};
|
|
|
|
if ((err = esp_timer_create(&create_args, &s_btdm_slp_tmr)) != ESP_OK) {
|
|
|
|
goto error;
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
|
|
|
// set default bluetooth sleep clock cycle and its fractional bits
|
|
|
|
btdm_lpcycle_us_frac = RTC_CLK_CAL_FRACT;
|
|
|
|
btdm_lpcycle_us = 2 << (btdm_lpcycle_us_frac);
|
|
|
|
|
2021-08-10 03:51:09 -04:00
|
|
|
// set default bluetooth sleep clock source
|
|
|
|
s_lp_cntl.lpclk_sel = BTDM_LPCLK_SEL_XTAL; // set default value
|
2021-03-19 02:59:30 -04:00
|
|
|
#if CONFIG_BT_CTRL_LPCLK_SEL_EXT_32K_XTAL
|
|
|
|
// check whether or not EXT_CRYS is working
|
|
|
|
if (rtc_clk_slow_freq_get() == RTC_SLOW_FREQ_32K_XTAL) {
|
2021-08-10 03:51:09 -04:00
|
|
|
s_lp_cntl.lpclk_sel = BTDM_LPCLK_SEL_XTAL32K; // External 32 kHz XTAL
|
|
|
|
s_lp_cntl.no_light_sleep = 0;
|
2021-03-19 02:59:30 -04:00
|
|
|
} else {
|
|
|
|
ESP_LOGW(BT_LOG_TAG, "32.768kHz XTAL not detected, fall back to main XTAL as Bluetooth sleep clock\n"
|
|
|
|
"light sleep mode will not be able to apply when bluetooth is enabled");
|
|
|
|
}
|
2021-11-15 04:04:42 -05:00
|
|
|
#elif CONFIG_BT_CTRL_LPCLK_SEL_RTC_SLOW
|
2021-03-19 02:59:30 -04:00
|
|
|
// check whether or not EXT_CRYS is working
|
|
|
|
if (rtc_clk_slow_freq_get() == RTC_SLOW_FREQ_RTC) {
|
2021-08-10 03:51:09 -04:00
|
|
|
s_lp_cntl.lpclk_sel = BTDM_LPCLK_SEL_RTC_SLOW; // Internal 150 kHz RC oscillator
|
|
|
|
ESP_LOGW(BTDM_LOG_TAG, "Internal 150kHz RC osciallator. The accuracy of this clock is a lot larger than 500ppm which is "
|
|
|
|
"required in Bluetooth communication, so don't select this option in scenarios such as BLE connection state.");
|
2021-03-19 02:59:30 -04:00
|
|
|
} else {
|
2021-08-10 03:51:09 -04:00
|
|
|
ESP_LOGW(BT_LOG_TAG, "Internal 150kHz RC oscillator not detected.");
|
|
|
|
assert(0);
|
2020-07-09 08:58:13 -04:00
|
|
|
}
|
2021-03-19 02:59:30 -04:00
|
|
|
#else
|
2021-08-10 03:51:09 -04:00
|
|
|
s_lp_cntl.no_light_sleep = 1;
|
2021-03-19 02:59:30 -04:00
|
|
|
#endif
|
|
|
|
|
|
|
|
bool select_src_ret __attribute__((unused));
|
|
|
|
bool set_div_ret __attribute__((unused));
|
|
|
|
if (s_lp_cntl.lpclk_sel == BTDM_LPCLK_SEL_XTAL) {
|
|
|
|
select_src_ret = btdm_lpclk_select_src(BTDM_LPCLK_SEL_XTAL);
|
2022-03-25 06:41:25 -04:00
|
|
|
set_div_ret = btdm_lpclk_set_div(esp_clk_xtal_freq() * 2 / MHZ);
|
2021-03-19 02:59:30 -04:00
|
|
|
assert(select_src_ret && set_div_ret);
|
|
|
|
btdm_lpcycle_us_frac = RTC_CLK_CAL_FRACT;
|
|
|
|
btdm_lpcycle_us = 2 << (btdm_lpcycle_us_frac);
|
|
|
|
} else if (s_lp_cntl.lpclk_sel == BTDM_LPCLK_SEL_XTAL32K) {
|
|
|
|
select_src_ret = btdm_lpclk_select_src(BTDM_LPCLK_SEL_XTAL32K);
|
|
|
|
set_div_ret = btdm_lpclk_set_div(0);
|
|
|
|
assert(select_src_ret && set_div_ret);
|
|
|
|
btdm_lpcycle_us_frac = RTC_CLK_CAL_FRACT;
|
|
|
|
btdm_lpcycle_us = (RTC_CLK_CAL_FRACT > 15) ? (1000000 << (RTC_CLK_CAL_FRACT - 15)) :
|
|
|
|
(1000000 >> (15 - RTC_CLK_CAL_FRACT));
|
|
|
|
assert(btdm_lpcycle_us != 0);
|
|
|
|
} else if (s_lp_cntl.lpclk_sel == BTDM_LPCLK_SEL_RTC_SLOW) {
|
|
|
|
select_src_ret = btdm_lpclk_select_src(BTDM_LPCLK_SEL_RTC_SLOW);
|
|
|
|
set_div_ret = btdm_lpclk_set_div(0);
|
|
|
|
assert(select_src_ret && set_div_ret);
|
|
|
|
btdm_lpcycle_us_frac = RTC_CLK_CAL_FRACT;
|
|
|
|
btdm_lpcycle_us = esp_clk_slowclk_cal_get();
|
|
|
|
} else {
|
|
|
|
err = ESP_ERR_INVALID_ARG;
|
2020-07-09 08:58:13 -04:00
|
|
|
goto error;
|
|
|
|
}
|
2018-12-11 03:49:01 -05:00
|
|
|
|
2021-03-19 02:59:30 -04:00
|
|
|
#ifdef CONFIG_PM_ENABLE
|
|
|
|
if (s_lp_cntl.no_light_sleep) {
|
|
|
|
if ((err = esp_pm_lock_create(ESP_PM_NO_LIGHT_SLEEP, 0, "btLS", &s_light_sleep_pm_lock)) != ESP_OK) {
|
|
|
|
err = ESP_ERR_NO_MEM;
|
|
|
|
goto error;
|
|
|
|
}
|
|
|
|
}
|
|
|
|
if ((err = esp_pm_lock_create(ESP_PM_APB_FREQ_MAX, 0, "bt", &s_pm_lock)) != ESP_OK) {
|
2020-07-09 08:58:13 -04:00
|
|
|
err = ESP_ERR_NO_MEM;
|
|
|
|
goto error;
|
2021-03-19 02:59:30 -04:00
|
|
|
} else {
|
|
|
|
s_lp_stat.pm_lock_released = 1;
|
2020-07-09 08:58:13 -04:00
|
|
|
}
|
2018-12-11 03:49:01 -05:00
|
|
|
#endif
|
2021-03-19 02:59:30 -04:00
|
|
|
} while (0);
|
2018-12-11 03:49:01 -05:00
|
|
|
|
2021-03-19 02:59:30 -04:00
|
|
|
#if CONFIG_SW_COEXIST_ENABLE
|
|
|
|
coex_init();
|
|
|
|
#endif
|
2020-08-26 05:51:13 -04:00
|
|
|
|
2020-07-09 08:58:13 -04:00
|
|
|
periph_module_enable(PERIPH_BT_MODULE);
|
2021-03-19 02:59:30 -04:00
|
|
|
|
2020-07-09 08:58:13 -04:00
|
|
|
esp_phy_enable();
|
2021-03-19 02:59:30 -04:00
|
|
|
s_lp_stat.phy_enabled = 1;
|
2017-04-05 09:19:15 -04:00
|
|
|
|
2020-07-09 08:58:13 -04:00
|
|
|
if (btdm_controller_init(cfg) != 0) {
|
2018-12-11 03:49:01 -05:00
|
|
|
err = ESP_ERR_NO_MEM;
|
|
|
|
goto error;
|
2017-04-05 09:19:15 -04:00
|
|
|
}
|
|
|
|
|
2017-07-11 09:46:17 -04:00
|
|
|
btdm_controller_status = ESP_BT_CONTROLLER_STATUS_INITED;
|
2018-12-11 03:49:01 -05:00
|
|
|
|
2017-04-05 09:19:15 -04:00
|
|
|
return ESP_OK;
|
2018-12-11 03:49:01 -05:00
|
|
|
|
|
|
|
error:
|
2021-03-19 02:59:30 -04:00
|
|
|
if (s_lp_stat.phy_enabled) {
|
|
|
|
esp_phy_disable();
|
|
|
|
s_lp_stat.phy_enabled = 0;
|
2020-09-03 08:51:19 -04:00
|
|
|
}
|
2021-03-19 02:59:30 -04:00
|
|
|
|
|
|
|
do {
|
|
|
|
// deinit low power control resources
|
|
|
|
#ifdef CONFIG_PM_ENABLE
|
|
|
|
if (s_lp_cntl.no_light_sleep) {
|
|
|
|
if (s_light_sleep_pm_lock != NULL) {
|
|
|
|
esp_pm_lock_delete(s_light_sleep_pm_lock);
|
|
|
|
s_light_sleep_pm_lock = NULL;
|
|
|
|
}
|
|
|
|
}
|
|
|
|
if (s_pm_lock != NULL) {
|
|
|
|
esp_pm_lock_delete(s_pm_lock);
|
|
|
|
s_pm_lock = NULL;
|
|
|
|
s_lp_stat.pm_lock_released = 0;
|
|
|
|
}
|
|
|
|
|
|
|
|
#endif
|
|
|
|
if (s_lp_cntl.wakeup_timer_required && s_btdm_slp_tmr != NULL) {
|
|
|
|
esp_timer_delete(s_btdm_slp_tmr);
|
|
|
|
s_btdm_slp_tmr = NULL;
|
|
|
|
}
|
|
|
|
|
2021-11-15 04:04:42 -05:00
|
|
|
#if CONFIG_MAC_BB_PD
|
2021-03-19 02:59:30 -04:00
|
|
|
if (s_lp_cntl.mac_bb_pd) {
|
|
|
|
btdm_deep_sleep_mem_deinit();
|
|
|
|
s_lp_cntl.mac_bb_pd = 0;
|
|
|
|
}
|
2020-07-09 08:58:13 -04:00
|
|
|
#endif
|
2021-03-19 02:59:30 -04:00
|
|
|
if (s_lp_cntl.enable) {
|
|
|
|
btdm_vnd_offload_task_deregister(BTDM_VND_OL_SIG_WAKEUP_TMR);
|
|
|
|
if (s_wakeup_req_sem != NULL) {
|
|
|
|
semphr_delete_wrapper(s_wakeup_req_sem);
|
|
|
|
s_wakeup_req_sem = NULL;
|
|
|
|
}
|
|
|
|
}
|
|
|
|
} while (0);
|
|
|
|
|
|
|
|
#if CONFIG_MAC_BB_PD
|
|
|
|
esp_unregister_mac_bb_pd_callback(btdm_mac_bb_power_down_cb);
|
|
|
|
|
|
|
|
esp_unregister_mac_bb_pu_callback(btdm_mac_bb_power_up_cb);
|
|
|
|
#endif
|
|
|
|
|
|
|
|
if (osi_funcs_p != NULL) {
|
|
|
|
free(osi_funcs_p);
|
|
|
|
osi_funcs_p = NULL;
|
|
|
|
}
|
2018-12-11 03:49:01 -05:00
|
|
|
return err;
|
2017-02-17 06:24:58 -05:00
|
|
|
}
|
|
|
|
|
2017-07-11 09:46:17 -04:00
|
|
|
esp_err_t esp_bt_controller_deinit(void)
|
2017-02-17 06:24:58 -05:00
|
|
|
{
|
2017-07-11 09:46:17 -04:00
|
|
|
if (btdm_controller_status != ESP_BT_CONTROLLER_STATUS_INITED) {
|
|
|
|
return ESP_ERR_INVALID_STATE;
|
|
|
|
}
|
|
|
|
|
2018-07-17 03:46:56 -04:00
|
|
|
btdm_controller_deinit();
|
2017-11-01 05:05:38 -04:00
|
|
|
periph_module_disable(PERIPH_BT_MODULE);
|
|
|
|
|
2021-03-19 02:59:30 -04:00
|
|
|
if (s_lp_stat.phy_enabled) {
|
|
|
|
esp_phy_disable();
|
|
|
|
s_lp_stat.phy_enabled = 0;
|
|
|
|
} else {
|
|
|
|
assert(0);
|
|
|
|
}
|
|
|
|
|
|
|
|
// deinit low power control resources
|
|
|
|
do {
|
2021-11-15 04:04:42 -05:00
|
|
|
#if CONFIG_MAC_BB_PD
|
2021-03-19 02:59:30 -04:00
|
|
|
btdm_deep_sleep_mem_deinit();
|
2018-12-11 03:49:01 -05:00
|
|
|
#endif
|
2021-03-19 02:59:30 -04:00
|
|
|
|
|
|
|
#ifdef CONFIG_PM_ENABLE
|
|
|
|
if (s_lp_cntl.no_light_sleep) {
|
|
|
|
esp_pm_lock_delete(s_light_sleep_pm_lock);
|
|
|
|
s_light_sleep_pm_lock = NULL;
|
|
|
|
}
|
|
|
|
|
|
|
|
esp_pm_lock_delete(s_pm_lock);
|
|
|
|
s_pm_lock = NULL;
|
|
|
|
s_lp_stat.pm_lock_released = 0;
|
2018-03-29 23:39:42 -04:00
|
|
|
#endif
|
2021-03-19 02:59:30 -04:00
|
|
|
if (s_lp_cntl.wakeup_timer_required) {
|
|
|
|
if (s_lp_stat.wakeup_timer_started) {
|
|
|
|
esp_timer_stop(s_btdm_slp_tmr);
|
|
|
|
}
|
|
|
|
s_lp_stat.wakeup_timer_started = 0;
|
|
|
|
esp_timer_delete(s_btdm_slp_tmr);
|
|
|
|
s_btdm_slp_tmr = NULL;
|
|
|
|
}
|
|
|
|
|
|
|
|
if (s_lp_cntl.enable) {
|
|
|
|
btdm_vnd_offload_task_deregister(BTDM_VND_OL_SIG_WAKEUP_TMR);
|
|
|
|
|
|
|
|
semphr_delete_wrapper(s_wakeup_req_sem);
|
|
|
|
s_wakeup_req_sem = NULL;
|
|
|
|
}
|
|
|
|
} while (0);
|
2018-03-29 23:39:42 -04:00
|
|
|
|
2021-03-19 02:59:30 -04:00
|
|
|
#if CONFIG_MAC_BB_PD
|
|
|
|
esp_unregister_mac_bb_pd_callback(btdm_mac_bb_power_down_cb);
|
|
|
|
esp_unregister_mac_bb_pu_callback(btdm_mac_bb_power_up_cb);
|
|
|
|
#endif
|
2021-10-28 22:42:23 -04:00
|
|
|
|
|
|
|
esp_bt_power_domain_off();
|
|
|
|
|
2018-06-15 09:40:51 -04:00
|
|
|
free(osi_funcs_p);
|
|
|
|
osi_funcs_p = NULL;
|
|
|
|
|
2017-10-10 03:35:17 -04:00
|
|
|
btdm_controller_status = ESP_BT_CONTROLLER_STATUS_IDLE;
|
2018-04-08 07:19:47 -04:00
|
|
|
btdm_lpcycle_us = 0;
|
2017-07-11 09:46:17 -04:00
|
|
|
return ESP_OK;
|
2017-02-17 06:24:58 -05:00
|
|
|
}
|
|
|
|
|
|
|
|
esp_err_t esp_bt_controller_enable(esp_bt_mode_t mode)
|
|
|
|
{
|
2021-03-19 02:59:30 -04:00
|
|
|
int ret = ESP_OK;
|
2017-02-17 06:24:58 -05:00
|
|
|
|
2017-02-20 12:05:37 -05:00
|
|
|
if (btdm_controller_status != ESP_BT_CONTROLLER_STATUS_INITED) {
|
|
|
|
return ESP_ERR_INVALID_STATE;
|
|
|
|
}
|
2017-09-19 08:10:35 -04:00
|
|
|
|
2018-06-15 09:40:51 -04:00
|
|
|
//As the history reason, mode should be equal to the mode which set in esp_bt_controller_init()
|
|
|
|
if (mode != btdm_controller_get_mode()) {
|
2021-03-19 02:59:30 -04:00
|
|
|
ESP_LOGE(BT_LOG_TAG, "invalid mode %d, controller support mode is %d", mode, btdm_controller_get_mode());
|
2017-02-17 06:24:58 -05:00
|
|
|
return ESP_ERR_INVALID_ARG;
|
|
|
|
}
|
2020-05-22 05:15:28 -04:00
|
|
|
|
2021-01-25 04:12:36 -05:00
|
|
|
#if CONFIG_SW_COEXIST_ENABLE
|
2020-08-26 05:51:13 -04:00
|
|
|
coex_enable();
|
2020-05-22 05:15:28 -04:00
|
|
|
#endif
|
2017-11-09 21:54:50 -05:00
|
|
|
|
2021-03-19 02:59:30 -04:00
|
|
|
// enable low power mode
|
|
|
|
do {
|
2018-07-17 03:46:56 -04:00
|
|
|
#ifdef CONFIG_PM_ENABLE
|
2021-03-19 02:59:30 -04:00
|
|
|
if (s_lp_cntl.no_light_sleep) {
|
|
|
|
esp_pm_lock_acquire(s_light_sleep_pm_lock);
|
|
|
|
}
|
|
|
|
esp_pm_lock_acquire(s_pm_lock);
|
|
|
|
s_lp_stat.pm_lock_released = 0;
|
2018-07-17 03:46:56 -04:00
|
|
|
#endif
|
2021-03-19 02:59:30 -04:00
|
|
|
|
|
|
|
if (s_lp_cntl.enable) {
|
|
|
|
btdm_controller_enable_sleep(true);
|
|
|
|
}
|
|
|
|
} while (0);
|
|
|
|
|
|
|
|
if (btdm_controller_enable(mode) != 0) {
|
|
|
|
ret = ESP_ERR_INVALID_STATE;
|
|
|
|
goto error;
|
2017-02-17 06:24:58 -05:00
|
|
|
}
|
|
|
|
|
2017-02-20 12:05:37 -05:00
|
|
|
btdm_controller_status = ESP_BT_CONTROLLER_STATUS_ENABLED;
|
|
|
|
|
2021-03-19 02:59:30 -04:00
|
|
|
return ret;
|
|
|
|
|
|
|
|
error:
|
|
|
|
// disable low power mode
|
|
|
|
do {
|
|
|
|
btdm_controller_enable_sleep(false);
|
|
|
|
#ifdef CONFIG_PM_ENABLE
|
|
|
|
if (s_lp_cntl.no_light_sleep) {
|
|
|
|
esp_pm_lock_release(s_light_sleep_pm_lock);
|
|
|
|
}
|
|
|
|
if (s_lp_stat.pm_lock_released == 0) {
|
|
|
|
esp_pm_lock_release(s_pm_lock);
|
|
|
|
s_lp_stat.pm_lock_released = 1;
|
|
|
|
}
|
|
|
|
#endif
|
|
|
|
} while (0);
|
|
|
|
|
|
|
|
return ret;
|
2017-02-17 06:24:58 -05:00
|
|
|
}
|
|
|
|
|
2017-09-19 08:10:35 -04:00
|
|
|
esp_err_t esp_bt_controller_disable(void)
|
2017-02-17 06:24:58 -05:00
|
|
|
{
|
2017-02-20 12:05:37 -05:00
|
|
|
if (btdm_controller_status != ESP_BT_CONTROLLER_STATUS_ENABLED) {
|
|
|
|
return ESP_ERR_INVALID_STATE;
|
|
|
|
}
|
2021-03-19 02:59:30 -04:00
|
|
|
|
|
|
|
async_wakeup_request(BTDM_ASYNC_WAKEUP_SRC_DISA);
|
|
|
|
while (!btdm_power_state_active()){}
|
2018-07-17 03:46:56 -04:00
|
|
|
btdm_controller_disable();
|
2017-02-17 06:24:58 -05:00
|
|
|
|
2021-03-19 02:59:30 -04:00
|
|
|
async_wakeup_request_end(BTDM_ASYNC_WAKEUP_SRC_DISA);
|
|
|
|
|
2021-01-25 04:12:36 -05:00
|
|
|
#if CONFIG_SW_COEXIST_ENABLE
|
2020-08-26 05:51:13 -04:00
|
|
|
coex_disable();
|
2020-05-22 05:15:28 -04:00
|
|
|
#endif
|
|
|
|
|
2018-07-17 03:46:56 -04:00
|
|
|
btdm_controller_status = ESP_BT_CONTROLLER_STATUS_INITED;
|
2021-03-19 02:59:30 -04:00
|
|
|
|
|
|
|
// disable low power mode
|
|
|
|
do {
|
2017-10-09 03:34:31 -04:00
|
|
|
#ifdef CONFIG_PM_ENABLE
|
2021-03-19 02:59:30 -04:00
|
|
|
if (s_lp_cntl.no_light_sleep) {
|
|
|
|
esp_pm_lock_release(s_light_sleep_pm_lock);
|
|
|
|
}
|
|
|
|
|
|
|
|
if (s_lp_stat.pm_lock_released == 0) {
|
|
|
|
esp_pm_lock_release(s_pm_lock);
|
|
|
|
s_lp_stat.pm_lock_released = 1;
|
|
|
|
} else {
|
|
|
|
assert(0);
|
|
|
|
}
|
2017-10-09 03:34:31 -04:00
|
|
|
#endif
|
2021-03-19 02:59:30 -04:00
|
|
|
} while (0);
|
|
|
|
|
2017-02-17 06:24:58 -05:00
|
|
|
return ESP_OK;
|
2016-10-18 09:49:00 -04:00
|
|
|
}
|
|
|
|
|
2017-02-20 12:05:37 -05:00
|
|
|
esp_bt_controller_status_t esp_bt_controller_get_status(void)
|
|
|
|
{
|
|
|
|
return btdm_controller_status;
|
|
|
|
}
|
|
|
|
|
2017-07-11 09:46:17 -04:00
|
|
|
/* extra functions */
|
|
|
|
esp_err_t esp_ble_tx_power_set(esp_ble_power_type_t power_type, esp_power_level_t power_level)
|
|
|
|
{
|
2021-03-19 02:59:30 -04:00
|
|
|
esp_err_t stat = ESP_FAIL;
|
|
|
|
|
|
|
|
switch (power_type) {
|
|
|
|
case ESP_BLE_PWR_TYPE_ADV:
|
|
|
|
case ESP_BLE_PWR_TYPE_SCAN:
|
|
|
|
case ESP_BLE_PWR_TYPE_DEFAULT:
|
|
|
|
if (ble_txpwr_set(power_type, power_level) == 0) {
|
|
|
|
stat = ESP_OK;
|
|
|
|
}
|
|
|
|
break;
|
|
|
|
default:
|
|
|
|
stat = ESP_ERR_NOT_SUPPORTED;
|
|
|
|
break;
|
|
|
|
}
|
|
|
|
|
|
|
|
return stat;
|
|
|
|
|
2017-07-11 09:46:17 -04:00
|
|
|
}
|
|
|
|
|
|
|
|
esp_power_level_t esp_ble_tx_power_get(esp_ble_power_type_t power_type)
|
|
|
|
{
|
2021-03-19 02:59:30 -04:00
|
|
|
esp_power_level_t lvl;
|
|
|
|
|
|
|
|
switch (power_type) {
|
|
|
|
case ESP_BLE_PWR_TYPE_ADV:
|
|
|
|
case ESP_BLE_PWR_TYPE_SCAN:
|
|
|
|
lvl = (esp_power_level_t)ble_txpwr_get(power_type);
|
|
|
|
break;
|
|
|
|
case ESP_BLE_PWR_TYPE_CONN_HDL0:
|
|
|
|
case ESP_BLE_PWR_TYPE_CONN_HDL1:
|
|
|
|
case ESP_BLE_PWR_TYPE_CONN_HDL2:
|
|
|
|
case ESP_BLE_PWR_TYPE_CONN_HDL3:
|
|
|
|
case ESP_BLE_PWR_TYPE_CONN_HDL4:
|
|
|
|
case ESP_BLE_PWR_TYPE_CONN_HDL5:
|
|
|
|
case ESP_BLE_PWR_TYPE_CONN_HDL6:
|
|
|
|
case ESP_BLE_PWR_TYPE_CONN_HDL7:
|
|
|
|
case ESP_BLE_PWR_TYPE_CONN_HDL8:
|
|
|
|
case ESP_BLE_PWR_TYPE_DEFAULT:
|
|
|
|
lvl = (esp_power_level_t)ble_txpwr_get(ESP_BLE_PWR_TYPE_DEFAULT);
|
|
|
|
break;
|
|
|
|
default:
|
|
|
|
lvl = ESP_PWR_LVL_INVALID;
|
|
|
|
break;
|
|
|
|
}
|
|
|
|
|
|
|
|
return lvl;
|
|
|
|
|
2018-04-19 05:22:49 -04:00
|
|
|
}
|
|
|
|
|
2018-04-08 07:19:47 -04:00
|
|
|
esp_err_t esp_bt_sleep_enable (void)
|
|
|
|
{
|
|
|
|
esp_err_t status;
|
|
|
|
if (btdm_controller_status != ESP_BT_CONTROLLER_STATUS_ENABLED) {
|
|
|
|
return ESP_ERR_INVALID_STATE;
|
|
|
|
}
|
2020-07-09 08:58:13 -04:00
|
|
|
if (btdm_controller_get_sleep_mode() == ESP_BT_SLEEP_MODE_1) {
|
2018-04-08 07:19:47 -04:00
|
|
|
btdm_controller_enable_sleep (true);
|
|
|
|
status = ESP_OK;
|
|
|
|
} else {
|
|
|
|
status = ESP_ERR_NOT_SUPPORTED;
|
|
|
|
}
|
|
|
|
|
|
|
|
return status;
|
|
|
|
}
|
|
|
|
|
|
|
|
esp_err_t esp_bt_sleep_disable (void)
|
|
|
|
{
|
|
|
|
esp_err_t status;
|
|
|
|
if (btdm_controller_status != ESP_BT_CONTROLLER_STATUS_ENABLED) {
|
|
|
|
return ESP_ERR_INVALID_STATE;
|
|
|
|
}
|
2020-07-09 08:58:13 -04:00
|
|
|
if (btdm_controller_get_sleep_mode() == ESP_BT_SLEEP_MODE_1) {
|
2018-04-08 07:19:47 -04:00
|
|
|
btdm_controller_enable_sleep (false);
|
|
|
|
status = ESP_OK;
|
|
|
|
} else {
|
|
|
|
status = ESP_ERR_NOT_SUPPORTED;
|
|
|
|
}
|
|
|
|
|
|
|
|
return status;
|
|
|
|
}
|
|
|
|
|
2020-07-09 08:58:13 -04:00
|
|
|
bool esp_bt_controller_is_sleeping(void)
|
2018-05-20 23:33:30 -04:00
|
|
|
{
|
2020-07-09 08:58:13 -04:00
|
|
|
if (btdm_controller_status != ESP_BT_CONTROLLER_STATUS_ENABLED ||
|
|
|
|
btdm_controller_get_sleep_mode() != ESP_BT_SLEEP_MODE_1) {
|
|
|
|
return false;
|
2018-05-20 23:33:30 -04:00
|
|
|
}
|
2020-07-09 08:58:13 -04:00
|
|
|
|
|
|
|
return !btdm_power_state_active();
|
2018-05-20 23:33:30 -04:00
|
|
|
}
|
|
|
|
|
2020-07-09 08:58:13 -04:00
|
|
|
void esp_bt_controller_wakeup_request(void)
|
2018-08-20 03:04:37 -04:00
|
|
|
{
|
2020-07-09 08:58:13 -04:00
|
|
|
if (btdm_controller_status != ESP_BT_CONTROLLER_STATUS_ENABLED ||
|
|
|
|
btdm_controller_get_sleep_mode() != ESP_BT_SLEEP_MODE_1) {
|
|
|
|
return;
|
2018-08-20 03:04:37 -04:00
|
|
|
}
|
2020-07-09 08:58:13 -04:00
|
|
|
|
2021-03-19 02:59:30 -04:00
|
|
|
btdm_wakeup_request();
|
|
|
|
|
2020-07-09 08:58:13 -04:00
|
|
|
}
|
|
|
|
|
|
|
|
int IRAM_ATTR esp_bt_h4tl_eif_io_event_notify(int event)
|
|
|
|
{
|
|
|
|
return btdm_hci_tl_io_event_post(event);
|
|
|
|
}
|
|
|
|
|
|
|
|
uint16_t esp_bt_get_tx_buf_num(void)
|
|
|
|
{
|
|
|
|
return l2c_ble_link_get_tx_buf_num();
|
|
|
|
}
|
|
|
|
|
2021-01-25 04:12:36 -05:00
|
|
|
static void coex_wifi_sleep_set_hook(bool sleep)
|
2020-07-09 08:58:13 -04:00
|
|
|
{
|
|
|
|
|
2018-08-20 03:04:37 -04:00
|
|
|
}
|
2017-09-12 10:36:17 -04:00
|
|
|
#endif /* CONFIG_BT_ENABLED */
|