esp-idf/components/efuse/esp32c2/esp_efuse_table.csv

1	# field_name, | efuse_block, | bit_start, | bit_count, |comment #
2	# | (EFUSE_BLK0 | (0..255) | (1-256) | #
3	# | EFUSE_BLK1 | | | #
4	# | ...) | | | #
5	##########################################################################
6	# !!!!!!!!!!! #
7	# this will generate new source files, next rebuild all the sources.
8	# !!!!!!!!!!! #
9	# This file was generated by regtools.py based on the efuses.yaml file with the version: 897499b0349a608b895d467abbcf006b
10	WR_DIS, EFUSE_BLK0, 0, 8, [] Disable programming of individual eFuses
11	WR_DIS.RD_DIS, EFUSE_BLK0, 0, 1, [] wr_dis of RD_DIS
12	WR_DIS.WDT_DELAY_SEL, EFUSE_BLK0, 1, 1, [] wr_dis of WDT_DELAY_SEL
13	WR_DIS.DIS_PAD_JTAG, EFUSE_BLK0, 1, 1, [] wr_dis of DIS_PAD_JTAG
14	WR_DIS.DIS_DOWNLOAD_ICACHE, EFUSE_BLK0, 1, 1, [] wr_dis of DIS_DOWNLOAD_ICACHE
15	WR_DIS.DIS_DOWNLOAD_MANUAL_ENCRYPT, EFUSE_BLK0, 2, 1, [] wr_dis of DIS_DOWNLOAD_MANUAL_ENCRYPT
16	WR_DIS.SPI_BOOT_CRYPT_CNT, EFUSE_BLK0, 2, 1, [] wr_dis of SPI_BOOT_CRYPT_CNT
17	WR_DIS.XTS_KEY_LENGTH_256, EFUSE_BLK0, 2, 1, [] wr_dis of XTS_KEY_LENGTH_256
18	WR_DIS.SECURE_BOOT_EN, EFUSE_BLK0, 2, 1, [] wr_dis of SECURE_BOOT_EN
19	WR_DIS.UART_PRINT_CONTROL, EFUSE_BLK0, 3, 1, [] wr_dis of UART_PRINT_CONTROL
20	WR_DIS.FORCE_SEND_RESUME, EFUSE_BLK0, 3, 1, [] wr_dis of FORCE_SEND_RESUME
21	WR_DIS.DIS_DOWNLOAD_MODE, EFUSE_BLK0, 3, 1, [] wr_dis of DIS_DOWNLOAD_MODE
22	WR_DIS.DIS_DIRECT_BOOT, EFUSE_BLK0, 3, 1, [] wr_dis of DIS_DIRECT_BOOT
23	WR_DIS.ENABLE_SECURITY_DOWNLOAD, EFUSE_BLK0, 3, 1, [] wr_dis of ENABLE_SECURITY_DOWNLOAD
24	WR_DIS.FLASH_TPUW, EFUSE_BLK0, 3, 1, [] wr_dis of FLASH_TPUW
25	WR_DIS.SECURE_VERSION, EFUSE_BLK0, 4, 1, [] wr_dis of SECURE_VERSION
26	WR_DIS.CUSTOM_MAC_USED, EFUSE_BLK0, 4, 1, [WR_DIS.ENABLE_CUSTOM_MAC] wr_dis of CUSTOM_MAC_USED
27	WR_DIS.DISABLE_WAFER_VERSION_MAJOR, EFUSE_BLK0, 4, 1, [] wr_dis of DISABLE_WAFER_VERSION_MAJOR
28	WR_DIS.DISABLE_BLK_VERSION_MAJOR, EFUSE_BLK0, 4, 1, [] wr_dis of DISABLE_BLK_VERSION_MAJOR
29	WR_DIS.CUSTOM_MAC, EFUSE_BLK0, 5, 1, [WR_DIS.MAC_CUSTOM WR_DIS.USER_DATA_MAC_CUSTOM] wr_dis of CUSTOM_MAC
30	WR_DIS.MAC, EFUSE_BLK0, 6, 1, [WR_DIS.MAC_FACTORY] wr_dis of MAC
31	WR_DIS.WAFER_VERSION_MINOR, EFUSE_BLK0, 6, 1, [] wr_dis of WAFER_VERSION_MINOR
32	WR_DIS.WAFER_VERSION_MAJOR, EFUSE_BLK0, 6, 1, [] wr_dis of WAFER_VERSION_MAJOR
33	WR_DIS.PKG_VERSION, EFUSE_BLK0, 6, 1, [] wr_dis of PKG_VERSION
34	WR_DIS.BLK_VERSION_MINOR, EFUSE_BLK0, 6, 1, [] wr_dis of BLK_VERSION_MINOR
35	WR_DIS.BLK_VERSION_MAJOR, EFUSE_BLK0, 6, 1, [] wr_dis of BLK_VERSION_MAJOR
36	WR_DIS.OCODE, EFUSE_BLK0, 6, 1, [] wr_dis of OCODE
37	WR_DIS.TEMP_CALIB, EFUSE_BLK0, 6, 1, [] wr_dis of TEMP_CALIB
38	WR_DIS.ADC1_INIT_CODE_ATTEN0, EFUSE_BLK0, 6, 1, [] wr_dis of ADC1_INIT_CODE_ATTEN0
39	WR_DIS.ADC1_INIT_CODE_ATTEN3, EFUSE_BLK0, 6, 1, [] wr_dis of ADC1_INIT_CODE_ATTEN3
40	WR_DIS.ADC1_CAL_VOL_ATTEN0, EFUSE_BLK0, 6, 1, [] wr_dis of ADC1_CAL_VOL_ATTEN0
41	WR_DIS.ADC1_CAL_VOL_ATTEN3, EFUSE_BLK0, 6, 1, [] wr_dis of ADC1_CAL_VOL_ATTEN3
42	WR_DIS.DIG_DBIAS_HVT, EFUSE_BLK0, 6, 1, [] wr_dis of DIG_DBIAS_HVT
43	WR_DIS.DIG_LDO_SLP_DBIAS2, EFUSE_BLK0, 6, 1, [] wr_dis of DIG_LDO_SLP_DBIAS2
44	WR_DIS.DIG_LDO_SLP_DBIAS26, EFUSE_BLK0, 6, 1, [] wr_dis of DIG_LDO_SLP_DBIAS26
45	WR_DIS.DIG_LDO_ACT_DBIAS26, EFUSE_BLK0, 6, 1, [] wr_dis of DIG_LDO_ACT_DBIAS26
46	WR_DIS.DIG_LDO_ACT_STEPD10, EFUSE_BLK0, 6, 1, [] wr_dis of DIG_LDO_ACT_STEPD10
47	WR_DIS.RTC_LDO_SLP_DBIAS13, EFUSE_BLK0, 6, 1, [] wr_dis of RTC_LDO_SLP_DBIAS13
48	WR_DIS.RTC_LDO_SLP_DBIAS29, EFUSE_BLK0, 6, 1, [] wr_dis of RTC_LDO_SLP_DBIAS29
49	WR_DIS.RTC_LDO_SLP_DBIAS31, EFUSE_BLK0, 6, 1, [] wr_dis of RTC_LDO_SLP_DBIAS31
50	WR_DIS.RTC_LDO_ACT_DBIAS31, EFUSE_BLK0, 6, 1, [] wr_dis of RTC_LDO_ACT_DBIAS31
51	WR_DIS.RTC_LDO_ACT_DBIAS13, EFUSE_BLK0, 6, 1, [] wr_dis of RTC_LDO_ACT_DBIAS13
52	WR_DIS.ADC_CALIBRATION_3, EFUSE_BLK0, 6, 1, [] wr_dis of ADC_CALIBRATION_3
53	WR_DIS.BLOCK_KEY0, EFUSE_BLK0, 7, 1, [WR_DIS.KEY0] wr_dis of BLOCK_KEY0
54	RD_DIS, EFUSE_BLK0, 32, 2, [] Disable reading from BlOCK3
55	RD_DIS.KEY0, EFUSE_BLK0, 32, 2, [] Read protection for EFUSE_BLK3. KEY0
56	RD_DIS.KEY0.LOW, EFUSE_BLK0, 32, 1, [] Read protection for EFUSE_BLK3. KEY0 lower 128-bit key
57	RD_DIS.KEY0.HI, EFUSE_BLK0, 33, 1, [] Read protection for EFUSE_BLK3. KEY0 higher 128-bit key
58	DIS_PAD_JTAG, EFUSE_BLK0, 36, 1, [] Set this bit to disable pad jtag
59	DIS_DOWNLOAD_ICACHE, EFUSE_BLK0, 37, 1, [] The bit be set to disable icache in download mode
60	DIS_DOWNLOAD_MANUAL_ENCRYPT, EFUSE_BLK0, 38, 1, [] The bit be set to disable manual encryption
61	FORCE_SEND_RESUME, EFUSE_BLK0, 45, 1, [] Set this bit to force ROM code to send a resume command during SPI boot
62	DIS_DOWNLOAD_MODE, EFUSE_BLK0, 46, 1, [] Set this bit to disable download mode (boot_mode[3:0] = 0; 1; 2; 4; 5; 6; 7)
63	DIS_DIRECT_BOOT, EFUSE_BLK0, 47, 1, [] This bit set means disable direct_boot mode
64	ENABLE_SECURITY_DOWNLOAD, EFUSE_BLK0, 48, 1, [] Set this bit to enable secure UART download mode
65	FLASH_TPUW, EFUSE_BLK0, 49, 4, [] Configures flash waiting time after power-up; in unit of ms. If the value is less than 15; the waiting time is the configurable value. Otherwise; the waiting time is twice the configurable value
66	SECURE_BOOT_EN, EFUSE_BLK0, 53, 1, [] The bit be set to enable secure boot
67	SECURE_VERSION, EFUSE_BLK0, 54, 4, [] Secure version for anti-rollback
68	CUSTOM_MAC_USED, EFUSE_BLK0, 58, 1, [ENABLE_CUSTOM_MAC] True if MAC_CUSTOM is burned
69	DISABLE_WAFER_VERSION_MAJOR, EFUSE_BLK0, 59, 1, [] Disables check of wafer version major
70	DISABLE_BLK_VERSION_MAJOR, EFUSE_BLK0, 60, 1, [] Disables check of blk version major
71	USER_DATA, EFUSE_BLK1, 0, 88, [] User data block
72	USER_DATA.MAC_CUSTOM, EFUSE_BLK1, 0, 48, [MAC_CUSTOM CUSTOM_MAC] Custom MAC address
73	MAC, EFUSE_BLK2, 40, 8, [MAC_FACTORY] MAC address
74	, EFUSE_BLK2, 32, 8, [MAC_FACTORY] MAC address
75	, EFUSE_BLK2, 24, 8, [MAC_FACTORY] MAC address
76	, EFUSE_BLK2, 16, 8, [MAC_FACTORY] MAC address
77	, EFUSE_BLK2, 8, 8, [MAC_FACTORY] MAC address
78	, EFUSE_BLK2, 0, 8, [MAC_FACTORY] MAC address
79	WAFER_VERSION_MINOR, EFUSE_BLK2, 48, 4, [] WAFER_VERSION_MINOR
80	WAFER_VERSION_MAJOR, EFUSE_BLK2, 52, 2, [] WAFER_VERSION_MAJOR
81	PKG_VERSION, EFUSE_BLK2, 54, 3, [] EFUSE_PKG_VERSION
82	BLK_VERSION_MAJOR, EFUSE_BLK2, 60, 2, [] Major version of BLOCK2
83	OCODE, EFUSE_BLK2, 62, 7, [] OCode
84	TEMP_CALIB, EFUSE_BLK2, 69, 9, [] Temperature calibration data
85	ADC1_INIT_CODE_ATTEN0, EFUSE_BLK2, 78, 8, [] ADC1 init code at atten0
86	ADC1_INIT_CODE_ATTEN3, EFUSE_BLK2, 86, 5, [] ADC1 init code at atten3
87	ADC1_CAL_VOL_ATTEN0, EFUSE_BLK2, 91, 8, [] ADC1 calibration voltage at atten0
88	ADC1_CAL_VOL_ATTEN3, EFUSE_BLK2, 99, 6, [] ADC1 calibration voltage at atten3
89	DIG_DBIAS_HVT, EFUSE_BLK2, 105, 5, [] BLOCK2 digital dbias when hvt
90	DIG_LDO_SLP_DBIAS2, EFUSE_BLK2, 110, 7, [] BLOCK2 DIG_LDO_DBG0_DBIAS2
91	DIG_LDO_SLP_DBIAS26, EFUSE_BLK2, 117, 8, [] BLOCK2 DIG_LDO_DBG0_DBIAS26
92	DIG_LDO_ACT_DBIAS26, EFUSE_BLK2, 125, 6, [] BLOCK2 DIG_LDO_ACT_DBIAS26
93	DIG_LDO_ACT_STEPD10, EFUSE_BLK2, 131, 4, [] BLOCK2 DIG_LDO_ACT_STEPD10
94	RTC_LDO_SLP_DBIAS13, EFUSE_BLK2, 135, 7, [] BLOCK2 DIG_LDO_SLP_DBIAS13
95	RTC_LDO_SLP_DBIAS29, EFUSE_BLK2, 142, 9, [] BLOCK2 DIG_LDO_SLP_DBIAS29
96	RTC_LDO_SLP_DBIAS31, EFUSE_BLK2, 151, 6, [] BLOCK2 DIG_LDO_SLP_DBIAS31
97	RTC_LDO_ACT_DBIAS31, EFUSE_BLK2, 157, 6, [] BLOCK2 DIG_LDO_ACT_DBIAS31
98	RTC_LDO_ACT_DBIAS13, EFUSE_BLK2, 163, 8, [] BLOCK2 DIG_LDO_ACT_DBIAS13
99	ADC_CALIBRATION_3, EFUSE_BLK2, 192, 11, [] Store the bit [86:96] of ADC calibration data
100	KEY0, EFUSE_BLK3, 0, 256, [BLOCK_KEY0] BLOCK_BLOCK_KEY0 - 256-bits. 256-bit key of Flash Encryption
101	KEY0.FE_256BIT, EFUSE_BLK3, 0, 256, [] 256bit FE key
102	KEY0.FE_128BIT, EFUSE_BLK3, 0, 128, [] 128bit FE key
103	KEY0.SB_128BIT, EFUSE_BLK3, 128, 128, [] 128bit SB key