esp-idf/components/soc
Konstantin Kondrashov f339b3fc96 efuse(esp32): Deprecate esp_efuse_burn_new_values() & esp_efuse_write_random_key()
These functions were used only for esp32 in secure_boot and flash encryption.
Use idf efuse APIs instead of efuse regs.
2021-06-17 07:21:36 +08:00
..
esp32 Merge branch 'bugfix/esp32_u4wdh_quad_io' into 'master' 2021-06-07 04:50:54 +00:00
esp32c3 efuse(esp32): Deprecate esp_efuse_burn_new_values() & esp_efuse_write_random_key() 2021-06-17 07:21:36 +08:00
esp32s2 efuse(esp32): Deprecate esp_efuse_burn_new_values() & esp_efuse_write_random_key() 2021-06-17 07:21:36 +08:00
esp32s3 efuse(esp32): Deprecate esp_efuse_burn_new_values() & esp_efuse_write_random_key() 2021-06-17 07:21:36 +08:00
include/soc Merge branch 'feature/bringup_esp32s3beta_cmake_sdmmc' into 'master' 2021-05-20 04:22:11 +00:00
CMakeLists.txt esp32: move common fragment definitions 2021-03-31 19:17:33 +08:00
component.mk Whitespace: Automated whitespace fixes (large commit) 2020-11-11 07:36:35 +00:00
linker.lf soc: move implementations to esp_hw_support 2020-10-28 22:38:50 +08:00
lldesc.c crypto: initial S3 Beta 3 bringup and testing for SHA/AES/RSA/flash enc 2021-05-18 11:25:41 +08:00
memory_layout_utils.c Support ESP32S3 Beta 3 target 2021-03-18 10:24:22 +08:00
README.md soc: descriptive part occupy whole component 2020-10-28 07:21:29 +08:00
soc_include_legacy_warn.c Whitespace: Automated whitespace fixes (large commit) 2020-11-11 07:36:35 +00:00

soc

The soc component provides hardware description for targets supported by ESP-IDF.

- `xxx_reg.h`   - defines registers related to the hardware
- `xxx_struct.h` - hardware description in C `struct`
- `xxx_channel.h` - definitions for hardware with multiple channels
- `xxx_caps.h`  - features/capabilities of the hardware
- `xxx_pins.h`  - pin definitions
- `xxx_periph.h/*.c`  - includes all headers related to a peripheral; declaration and definition of IO mapping for that hardware