esp-idf/components/soc
2022-03-03 13:47:22 +08:00
..
esp32 RTC WDT: refactor code to remove duplicated code 2022-03-03 13:47:22 +08:00
esp32c2 uart: Provide support for esp32c2 and esp32h2 2022-03-02 11:29:13 +08:00
esp32c3 Merge branch 'bugfix/bootloader_uart_custom_gpio' into 'master' 2022-03-02 02:35:14 +08:00
esp32h2 uart: Provide support for esp32c2 and esp32h2 2022-03-02 11:29:13 +08:00
esp32s2 RTC WDT: refactor code to remove duplicated code 2022-03-03 13:47:22 +08:00
esp32s3 Merge branch 'bugfix/bootloader_uart_custom_gpio' into 'master' 2022-03-02 02:35:14 +08:00
include/soc Merge branch 'feature/efuse_hal' into 'master' 2022-02-28 13:38:43 +08:00
linux/include/soc build-system: include soc_caps defines into kconfig 2021-12-06 12:37:07 +08:00
CMakeLists.txt soc: move peripheral base address into reg_base.h 2022-01-06 21:43:12 +08:00
linker.lf soc: move implementations to esp_hw_support 2020-10-28 22:38:50 +08:00
lldesc.c crypto: initial S3 Beta 3 bringup and testing for SHA/AES/RSA/flash enc 2021-05-18 11:25:41 +08:00
README.md soc: descriptive part occupy whole component 2020-10-28 07:21:29 +08:00

soc

The soc component provides hardware description for targets supported by ESP-IDF.

- `xxx_reg.h`   - defines registers related to the hardware
- `xxx_struct.h` - hardware description in C `struct`
- `xxx_channel.h` - definitions for hardware with multiple channels
- `xxx_caps.h`  - features/capabilities of the hardware
- `xxx_pins.h`  - pin definitions
- `xxx_periph.h/*.c`  - includes all headers related to a peripheral; declaration and definition of IO mapping for that hardware