esp-idf/components/soc
Jiang Jiang Jian 4e3a32bc1b Merge branch 'bugfix/bod_glitch_reset_c6' into 'master'
bootloader: fix BOD and glitch reset on C6 and H2

Closes IDF-5990

See merge request espressif/esp-idf!22616
2023-04-11 19:31:02 +08:00
..
esp32 system: add kconfig option for using parts of SRAM1 for IRAM 2023-04-07 07:12:58 +00:00
esp32c2 Merge branch 'bugfix/bod_glitch_reset_c6' into 'master' 2023-04-11 19:31:02 +08:00
esp32c3 Merge branch 'bugfix/bod_glitch_reset_c6' into 'master' 2023-04-11 19:31:02 +08:00
esp32c6 bootloader: fix analog reset on C6 and H2 2023-04-11 10:23:20 +08:00
esp32h2 bootloader: fix analog reset on C6 and H2 2023-04-11 10:23:20 +08:00
esp32h4 bootloader: fix analog reset on C6 and H2 2023-04-11 10:23:20 +08:00
esp32s2 Merge branch 'bugfix/fix_chip_broken_bug_in_monitor_mode_S2' into 'master' 2023-04-11 09:52:02 +08:00
esp32s3 Merge branch 'bugfix/bod_glitch_reset_c6' into 'master' 2023-04-11 19:31:02 +08:00
include/soc ana_cmpr: designed driver layer 2023-03-17 11:38:32 +08:00
linux/include/soc refactor soc CMakeLists 2023-01-20 22:07:50 +08:00
CMakeLists.txt ana_cmpr: designed driver layer 2023-03-17 11:38:32 +08:00
dport_access_common.c dport: Move DPORT workaround to G0 2022-05-31 13:44:18 +08:00
Kconfig mmu: support configurable mmu page size 2023-03-04 02:48:40 +00:00
linker.lf soc: move implementations to esp_hw_support 2020-10-28 22:38:50 +08:00
lldesc.c crypto: initial S3 Beta 3 bringup and testing for SHA/AES/RSA/flash enc 2021-05-18 11:25:41 +08:00
README.md soc: descriptive part occupy whole component 2020-10-28 07:21:29 +08:00

soc

The soc component provides hardware description for targets supported by ESP-IDF.

- `xxx_reg.h`   - defines registers related to the hardware
- `xxx_struct.h` - hardware description in C `struct`
- `xxx_channel.h` - definitions for hardware with multiple channels
- `xxx_caps.h`  - features/capabilities of the hardware
- `xxx_pins.h`  - pin definitions
- `xxx_periph.h/*.c`  - includes all headers related to a peripheral; declaration and definition of IO mapping for that hardware