SalimTerryLi 874a720286 soc/ll: workaround compiler bug that generate 8/16 bits inst instead of 32 bits one ... update all struct headers to be more "standardized": - bit fields are properly wrapped with struct - bitwidth sum should be 32 within same struct, so that it's correctly padded with reserved bits - bit field should be uint32_t - typedef volatile struct xxx{} yyy;: xxx must exists. refer: https://github.com/espressif/esp-idf/pull/3199 added helper macros to force peripheral registers being accessed in 32 bitwidth added a check script into ci		2021-08-30 13:50:58 +08:00
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include/hal	soc/ll: workaround compiler bug that generate 8/16 bits inst instead of 32 bits one	2021-08-30 13:50:58 +08:00
adc_hal.c	adc: support adc2 working with WiFi	2021-07-28 17:50:14 +08:00
brownout_hal.c	esp32c3: Adds support BROWNOUT reset	2021-01-18 15:38:09 +08:00
hmac_hal.c	hal: Add initial ESP32-C3 support	2020-11-30 15:23:15 +11:00
rtc_cntl_hal.c	hal: added HAL_ASSERT	2021-06-22 11:28:01 +08:00