mirror of
https://github.com/espressif/esp-idf.git
synced 2024-10-05 20:47:46 -04:00
3cbac3dd1d
If the TimerGroup 0 clock is disabled and then reenabled, the watchdog registers (Flashboot protection included) will be re-enabled, and some seconds later, will trigger an unintended reset. Signed-off-by: Gustavo Henrique Nihei <gustavo.nihei@espressif.com> |
||
---|---|---|
.. | ||
cache_err_int.c | ||
clk.c | ||
CMakeLists.txt | ||
highint_hdl.S | ||
Kconfig.cache | ||
Kconfig.cpu | ||
Kconfig.memory | ||
Kconfig.system | ||
Kconfig.tracemem | ||
reset_reason.c | ||
system_internal.c | ||
usb_console.c |