Darian Leung 3336b057d6 xtensa: Move saving of a0 register to match upstream ... Upstream xtensa exception handling will save PS, PC, and a0 registers together when saving a minimal context. This commit ppdates the xtensa exception handling to match upstream behavior.		2022-02-03 17:08:14 +08:00
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apb_backup_dma.c	light sleep: add wifi mac sleep support for esp32s3	2021-08-04 21:58:33 +08:00
cache_err_int.c	esp_system: enable "cache disable but cache accessed" interrupt for ESP32-S3	2021-10-20 15:16:25 +05:30
clk.c	esp_clk: refactor target/clk.h to private/esp_clk.h	2021-11-26 14:56:30 +08:00
CMakeLists.txt	IPC: Move ipc sources to esp_system	2021-11-11 10:30:01 +08:00
highint_hdl.S	xtensa: Move saving of a0 register to match upstream	2022-02-03 17:08:14 +08:00
reset_reason.c	soc: add reset reasons in soc component	2021-07-13 10:45:38 +08:00
system_internal.c	esp_hw_support: Removed deprecated CPU util functions	2021-12-28 16:58:37 +05:30
usb_console.c	Support ESP32S3 Beta 3 target	2021-03-18 10:24:22 +08:00