esp-idf/components/soc
chaijie c101fc3e3d fix c3 hardware bug before ECO3 and optimizate bbpll config:
1. deepsleep poweron reset bug in high temperature before ECO3;
2. brownout reset bug before ECO2;
3. bbpll voltage low bug before ECO3;
4. need xpd iph for xtal before ECO3;
2021-03-31 13:08:56 +00:00
..
esp32 Merge branch 'refactor/using_isr_callback_in_timer_example' into 'master' 2021-03-22 06:36:32 +00:00
esp32c3 fix c3 hardware bug before ECO3 and optimizate bbpll config: 2021-03-31 13:08:56 +00:00
esp32s2 TWAI: FIFO overrun handling and errata workarounds 2021-03-30 14:17:31 +08:00
esp32s3 TWAI: FIFO overrun handling and errata workarounds 2021-03-30 14:17:31 +08:00
include/soc Merge branch 'bugfix/fix_coredump_fake_stack_bug' into 'master' 2021-03-24 06:55:42 +00:00
CMakeLists.txt soc: move implementations to esp_hw_support 2020-10-28 22:38:50 +08:00
component.mk Whitespace: Automated whitespace fixes (large commit) 2020-11-11 07:36:35 +00:00
linker.lf soc: move implementations to esp_hw_support 2020-10-28 22:38:50 +08:00
lldesc.c soc: descriptive part occupy whole component 2020-10-28 07:21:29 +08:00
memory_layout_utils.c Support ESP32S3 Beta 3 target 2021-03-18 10:24:22 +08:00
README.md soc: descriptive part occupy whole component 2020-10-28 07:21:29 +08:00
soc_include_legacy_warn.c Whitespace: Automated whitespace fixes (large commit) 2020-11-11 07:36:35 +00:00

soc

The soc component provides hardware description for targets supported by ESP-IDF.

- `xxx_reg.h`   - defines registers related to the hardware
- `xxx_struct.h` - hardware description in C `struct`
- `xxx_channel.h` - definitions for hardware with multiple channels
- `xxx_caps.h`  - features/capabilities of the hardware
- `xxx_pins.h`  - pin definitions
- `xxx_periph.h/*.c`  - includes all headers related to a peripheral; declaration and definition of IO mapping for that hardware