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esp-idf/components/soc
History
Mahavir Jain e173895618 fix(soc): change debug addr range to CPU subsystem range 
For C6/H2/P4/C5, there is no SoC specific debug range. Instead the same
address range is part of CPU Subsystem range which contains debug mode
specific code and interrupt config registers (CLINT, PLIC etc.).

For now the PMP entry is provided with RWX permission for both machine
and user mode but we can save this entry and allow the access to only
machine mode for this range.

For P4/C5 case, this PMP entry can have RW permission as the debug mode
specific code is not present in this memory range.
2024-01-29 13:57:04 +08:00
..
esp32 change(soc): Add SOC_HP_CPU_HAS_MULTIPLE_CORES 2023-12-07 17:53:18 +08:00
esp32c2 fix(nimble): Added periodic_adv_enh soc_caps for c2, h2 2023-12-26 10:09:12 +05:30
esp32c3 Merge branch 'contrib/github_pr_12559_v5.2' into 'release/v5.2' 2023-12-11 16:01:48 +08:00
esp32c6 fix(soc): change debug addr range to CPU subsystem range 2024-01-29 13:57:04 +08:00
esp32h2 fix(soc): change debug addr range to CPU subsystem range 2024-01-29 13:57:04 +08:00
esp32p4 fix(soc): change debug addr range to CPU subsystem range 2024-01-29 13:57:04 +08:00
esp32s2 Merge branch 'contrib/github_pr_12559_v5.2' into 'release/v5.2' 2023-12-11 16:01:48 +08:00
esp32s3 fix(gdma): reserve the SOC_GDMA_PAIRS_PER_GROUP 2023-12-21 15:17:54 +08:00
include/soc feat(sdmmc): supported sd2.0 on esp32p4 2023-10-18 11:57:55 +00:00
linux/include/soc fix(console): enable to select UART1 port for console output 2023-11-30 11:26:09 +08:00
CMakeLists.txt fix(soc): fix wrong freq definition for 26Mhz version esp32c2 soc 2023-07-15 01:54:48 +08:00
dport_access_common.c dport: Move DPORT workaround to G0 2022-05-31 13:44:18 +08:00
Kconfig mmu: support configurable mmu page size 2023-03-04 02:48:40 +00:00
linker.lf soc: move implementations to esp_hw_support 2020-10-28 22:38:50 +08:00
lldesc.c crypto: initial S3 Beta 3 bringup and testing for SHA/AES/RSA/flash enc 2021-05-18 11:25:41 +08:00
README.md soc: descriptive part occupy whole component 2020-10-28 07:21:29 +08:00

README.md

soc

The soc component provides hardware description for targets supported by ESP-IDF.

- `xxx_reg.h`   - defines registers related to the hardware
- `xxx_struct.h` - hardware description in C `struct`
- `xxx_channel.h` - definitions for hardware with multiple channels
- `xxx_caps.h`  - features/capabilities of the hardware
- `xxx_pins.h`  - pin definitions
- `xxx_periph.h/*.c`  - includes all headers related to a peripheral; declaration and definition of IO mapping for that hardware