Song Ruo Jing 5276cd4f1d refactor(uart): add support to be able to test LP_UART port
Increase LP_UART_EMPTY_THRESH_DEFAULT value to 4. The original value
could cause the FIFO become empty before filling next data into the FIFO
when the buadrate is high. TX_DONE interrupt would raise before actual
transmission complete in such case.
2024-02-07 14:37:48 +08:00
..
2021-11-08 16:14:51 +08:00
2020-11-30 11:12:56 +11:00
2021-06-24 13:16:14 +03:00
2022-07-20 14:59:50 +08:00
2022-11-04 17:40:29 +08:00