Jiang Jiang Jian 7cf952e928 Merge branch 'fix/fix_p4_mpll_disable_order' into 'master' ... fix(esp_hw_support): disable P4 mpll clock after L1 dcache writeback Closes PM-138 See merge request espressif/esp-idf!31587		2024-07-08 14:06:07 +08:00
..
esp32	feat(clk): support ESP32C5 XTAL 40M/48M selection	2024-06-11 17:42:43 +08:00
esp32c2	fix(startup): move rtc initialization before MSPI timing tuning to improve stability	2024-06-18 01:16:24 +08:00
esp32c3	feat(clk): support ESP32C5 XTAL 40M/48M selection	2024-06-11 17:42:43 +08:00
esp32c5	fix(pmp): fixed alignment of PMP addr for RTC mem on C5	2024-07-04 16:24:46 +08:00
esp32c6	fix(pmp): fixed alignment of PMP addr for RTC mem on C5	2024-07-04 16:24:46 +08:00
esp32c61	Merge branch 'fix/remove_esp32c6_h2_solved_todos' into 'master'	2024-06-24 13:35:04 +08:00
esp32h2	feat(clk): Add basic clock support for esp32c5 mp	2024-06-26 14:26:34 +08:00
esp32p4	Merge branch 'fix/fix_p4_mpll_disable_order' into 'master'	2024-07-08 14:06:07 +08:00
esp32s2	feat(clk): support ESP32C5 XTAL 40M/48M selection	2024-06-11 17:42:43 +08:00
esp32s3	fix(startup): move rtc initialization before MSPI timing tuning to improve stability	2024-06-18 01:16:24 +08:00
include	feat(async_memcpy): refactor driver code to support different DMA backen	2023-08-03 12:02:09 +08:00
linux	feat(efuse): Support Linux target	2024-05-15 16:54:45 +03:00
esp_clk_tree_common.c	feat(clk): Add basic clock support for esp32c5 mp	2024-06-26 14:26:34 +08:00
esp_memprot_conv.c	System/Security: Memprot API unified (ESP32S3)	2022-07-09 22:57:51 +02:00
pau_regdma.c	change(hal): control PAU bus clock by hal layer	2024-03-29 00:36:46 +08:00
regdma_link.c	feat(esp_hw_support): optimize retention link info dump	2024-05-28 15:19:26 +08:00