Armando c331c85318 mspi: make cpu clock source switch safe ... For some of the MSPI high frequency setting (e.g. 80M DDR mode Flash or PSRAM), timing tuning is required. Certain delays will be added to the MSPI RX direction. When system clock switches down, the delays should be cleared. When system clock switches up, the delays should be restored.		2021-10-19 21:47:27 +08:00
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flash_ops_esp32s3.c	Support ESP32S3 Beta 3 target	2021-03-18 10:24:22 +08:00
mspi_timing_tuning_configs.h	mspi: support 120MHz Quad Flash and PSRAM on ESP32S3	2021-08-31 16:06:44 +08:00
opi_flash_cmd_format_mxic.h	mspi: support auto detect octal flash vendor	2021-10-08 15:59:57 +08:00
opi_flash_private.h	mspi: support auto detect octal flash vendor	2021-10-08 15:59:57 +08:00
spi_flash_oct_flash_init.c	mspi: support auto detect octal flash vendor	2021-10-08 15:59:57 +08:00
spi_flash_rom_patch.c	spiflash: add octal spi psram support on 727	2021-06-25 19:41:57 +08:00
spi_timing_config.c	mspi: make cpu clock source switch safe	2021-10-19 21:47:27 +08:00
spi_timing_config.h	mspi: make cpu clock source switch safe	2021-10-19 21:47:27 +08:00