mirror of
https://github.com/espressif/esp-idf.git
synced 2024-10-05 20:47:46 -04:00
c55a07bf57
Increase LP_UART_EMPTY_THRESH_DEFAULT value to 4. The original value could cause the FIFO become empty before filling next data into the FIFO when the buadrate is high. TX_DONE interrupt would raise before actual transmission complete in such case. |
||
---|---|---|
.. | ||
main | ||
CMakeLists.txt | ||
pytest_uart.py | ||
README.md | ||
sdkconfig.ci.iram_safe | ||
sdkconfig.ci.release | ||
sdkconfig.defaults |
Supported Targets | ESP32 | ESP32-C2 | ESP32-C3 | ESP32-C6 | ESP32-H2 | ESP32-S2 | ESP32-S3 |
---|