wuzhenghui 29b51468e1

fix(esp_hw_support): fix bad power parameter if PSRAM is enabled during sleep

2024-08-01 14:33:31 +08:00

..

esp32

feat(clk): support ESP32C5 XTAL 40M/48M selection

2024-06-11 17:42:43 +08:00

esp32c2

fix(startup): move rtc initialization before MSPI timing tuning to improve stability

2024-06-18 01:16:24 +08:00

esp32c3

feat(clk): support ESP32C5 XTAL 40M/48M selection

2024-06-11 17:42:43 +08:00

esp32c5

refactor(regi2c): add LL function to control analog i2c master clock

2024-07-24 12:26:59 +08:00

esp32c6

refactor(regi2c): add LL function to control analog i2c master clock

2024-07-24 12:26:59 +08:00

esp32c61

refactor(regi2c): add LL function to control analog i2c master clock

2024-07-24 12:26:59 +08:00

esp32h2

refactor(regi2c): add LL function to control analog i2c master clock

2024-07-24 12:26:59 +08:00

esp32p4

fix(esp_hw_support): fix bad power parameter if PSRAM is enabled during sleep

2024-08-01 14:33:31 +08:00

esp32s2

feat(clk): support ESP32C5 XTAL 40M/48M selection

2024-06-11 17:42:43 +08:00

esp32s3

feat(spiram): Add temperature support for psram adjustment on esp32c5

2024-07-25 13:48:41 +08:00

include

feat(async_memcpy): refactor driver code to support different DMA backen

2023-08-03 12:02:09 +08:00

linux

feat(efuse): Support Linux target

2024-05-15 16:54:45 +03:00

esp_clk_tree_common.c

feat(clk): Add basic clock support for esp32c5 mp

2024-06-26 14:26:34 +08:00

esp_memprot_conv.c

System/Security: Memprot API unified (ESP32S3)

2022-07-09 22:57:51 +02:00

pau_regdma.c

change(hal): control PAU bus clock by hal layer

2024-03-29 00:36:46 +08:00

regdma_link.c

feat(esp_hw_support): optimize retention link info dump

2024-05-28 15:19:26 +08:00