esp-idf/components/esp_system/port/soc/esp32
Gustavo Henrique Nihei 24484887a9 esp_system: Ensure TIMG0 clock is always enabled during normal operation
If the TimerGroup 0 clock is disabled and then reenabled, the watchdog
registers (Flashboot protection included) will be re-enabled, and some
seconds later, will trigger an unintended reset.

Signed-off-by: Gustavo Henrique Nihei <gustavo.nihei@espressif.com>
2023-03-07 10:02:06 +08:00
..
cache_err_int.c hal: Deprecate interrupt_controller_hal.h, cpu_hal.h and cpu_ll.h interfaces 2022-07-22 00:06:06 +08:00
clk.c esp_system: Ensure TIMG0 clock is always enabled during normal operation 2023-03-07 10:02:06 +08:00
CMakeLists.txt IPC: Move ipc sources to esp_system 2021-11-11 10:30:01 +08:00
highint_hdl.S dport: Move DPORT workaround to G0 2022-05-31 13:44:18 +08:00
intr.c esp_system: support riscv panic 2020-11-13 07:49:11 +11:00
Kconfig.cpu soc: moved kconfig options out of the target component. 2022-04-21 12:09:43 +08:00
Kconfig.memory kconfig: move remaining kconfig options out of target component 2022-05-23 17:57:45 +08:00
Kconfig.system kconfig: move remaining kconfig options out of target component 2022-05-23 17:57:45 +08:00
Kconfig.tracemem kconfig: move remaining kconfig options out of target component 2022-05-23 17:57:45 +08:00
reset_reason.c soc: add reset reasons in soc component 2021-07-13 10:45:38 +08:00
system_internal.c wifi/bt: fix part of modem module not reset when power up 2022-12-01 21:08:57 +08:00