esp-idf

mirror of https://github.com/espressif/esp-idf.git synced 2024-10-05 20:47:46 -04:00

History

Marius Vikhammer 19a492bc8d soc: add base support for ESP32-S3 Updates the following with changes from verification branches: * esp_rom linker files * rtc_cntl and system reg and struct headers Also updates: * GDMA driver with new register layout * esptool submodule commit		2021-06-07 10:40:14 +08:00
..
esp32	soc: add esp32s3 sdmmc support	2021-05-10 23:21:27 +02:00
esp32c3	Merge branch 'feature/support_auto_adjust_voltage_storingInEfuse_openGlitchRst' into 'master'	2021-05-13 03:49:59 +00:00
esp32s2	soc: esp32s2: remove SDMMC header files	2021-05-10 23:21:27 +02:00
esp32s3	soc: add base support for ESP32-S3	2021-06-07 10:40:14 +08:00
include/soc	Merge branch 'feature/bringup_esp32s3beta_cmake_sdmmc' into 'master'	2021-05-20 04:22:11 +00:00
CMakeLists.txt	esp32: move common fragment definitions	2021-03-31 19:17:33 +08:00
component.mk	Whitespace: Automated whitespace fixes (large commit)	2020-11-11 07:36:35 +00:00
linker.lf	soc: move implementations to esp_hw_support	2020-10-28 22:38:50 +08:00
lldesc.c	crypto: initial S3 Beta 3 bringup and testing for SHA/AES/RSA/flash enc	2021-05-18 11:25:41 +08:00
memory_layout_utils.c	Support ESP32S3 Beta 3 target	2021-03-18 10:24:22 +08:00
README.md	soc: descriptive part occupy whole component	2020-10-28 07:21:29 +08:00
soc_include_legacy_warn.c	Whitespace: Automated whitespace fixes (large commit)	2020-11-11 07:36:35 +00:00

README.md

`soc`

The soc component provides hardware description for targets supported by ESP-IDF.

- `xxx_reg.h`   - defines registers related to the hardware
- `xxx_struct.h` - hardware description in C `struct`
- `xxx_channel.h` - definitions for hardware with multiple channels
- `xxx_caps.h`  - features/capabilities of the hardware
- `xxx_pins.h`  - pin definitions
- `xxx_periph.h/*.c`  - includes all headers related to a peripheral; declaration and definition of IO mapping for that hardware