Jiang Jiang Jian 1ed40720d6 Merge branch 'bugfix/lp_active_slow_clock_domain_default_power_down_v5.1' into 'release/v5.1'
backport v5.1: In the LP ACTIVE state, the slow clock power domain is by default in a powered-off state

See merge request espressif/esp-idf!26601
2023-11-14 15:09:02 +08:00
..
2022-11-23 15:32:34 +08:00