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Power Management: fix REGDMA clock issue when wake up form light sleep

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This commit is contained in:
Lou Tianhao 2023-05-19 15:39:12 +08:00
parent e5e0a0918a
commit 3b40ce4d9b
5 changed files with 32 additions and 0 deletions
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10
components/esp_hw_support/port/pau_regdma.c
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@ -26,6 +26,9 @@ pau_context_t * __attribute__((weak)) IRAM_ATTR PAU_instance(void)
static pau_hal_context_t pau_hal = { .dev = NULL };
static pau_context_t pau_context = { .hal = &pau_hal };
/* periph_module_enable don not need to be put in iram because it is
* called before the flash is powered off and will not be called again. */
if (pau_hal.dev == NULL) {
pau_hal.dev = &PAU;
periph_module_enable(PERIPH_REGDMA_MODULE);
@ -62,6 +65,13 @@ void pau_regdma_trigger_modem_link_restore(void)
#if SOC_PM_RETENTION_HAS_REGDMA_POWER_BUG
void IRAM_ATTR pau_regdma_set_system_link_addr(void *link_addr)
{
/* ESP32H2 use software to trigger REGDMA to restore instead of PMU,
* because regdma has power bug, so we need to manually set the clock
* for regdma before using it after the chip wakes up. We use
* pau_hal_clock_configure because periph_module_enable will consume
* a relatively large amount of memory space. */
pau_hal_regdma_clock_configure(PAU_instance()->hal, true);
pau_hal_set_regdma_system_link_addr(PAU_instance()->hal, link_addr);
}

8
components/hal/esp32h2/pau_hal.c
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@ -7,7 +7,9 @@
// The HAL layer for PAU (ESP32-H2 specific part)
#include "soc/soc.h"
#include "soc/pcr_struct.h"
#include "esp_attr.h"
#include "hal/misc.h"
#include "hal/pau_hal.h"
#include "hal/pau_types.h"
@ -57,3 +59,9 @@ void pau_hal_stop_regdma_extra_link(pau_hal_context_t *hal)
pau_ll_select_regdma_entry_link(hal->dev, 0); /* restore link select to default */
pau_ll_clear_regdma_backup_done_intr_state(hal->dev);
}
void IRAM_ATTR pau_hal_regdma_clock_configure(pau_hal_context_t *hal, bool enable)
{
HAL_FORCE_MODIFY_U32_REG_FIELD(PCR.regdma_conf, regdma_rst_en, !enable);
HAL_FORCE_MODIFY_U32_REG_FIELD(PCR.regdma_conf, regdma_clk_en, enable);
}

9
components/hal/include/hal/pau_hal.h
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@ -100,6 +100,15 @@ void pau_hal_start_regdma_extra_link(pau_hal_context_t *hal, bool backup_or_rest
*/
void pau_hal_stop_regdma_extra_link(pau_hal_context_t *hal);
#if SOC_PM_RETENTION_HAS_REGDMA_POWER_BUG
/**
* @brief Enable or disable PAU module clock
*
* @param hal regdma hal context
*/
void pau_hal_regdma_clock_configure(pau_hal_context_t *hal, bool enable);
#endif
#ifdef __cplusplus
}
#endif

4
components/soc/esp32h2/include/soc/Kconfig.soc_caps.in
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@ -1111,6 +1111,10 @@ config SOC_PM_RETENTION_HAS_REGDMA_POWER_BUG
bool
default y
config SOC_PM_RETENTION_HAS_CLOCK_BUG
bool
default y
config SOC_CLK_RC_FAST_SUPPORT_CALIBRATION
bool
default y

1
components/soc/esp32h2/include/soc/soc_caps.h
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@ -460,6 +460,7 @@
#define SOC_PM_MODEM_RETENTION_BY_REGDMA (1)
#define SOC_PM_SUPPORT_DEEPSLEEP_CHECK_STUB_ONLY (1) /*!<Supports CRC only the stub code in RTC memory */
#define SOC_PM_RETENTION_HAS_REGDMA_POWER_BUG (1)
#define SOC_PM_RETENTION_HAS_CLOCK_BUG (1)
/*-------------------------- CLOCK SUBSYSTEM CAPS ----------------------------------------*/
#define SOC_CLK_RC_FAST_SUPPORT_CALIBRATION (1)