Commit Graph

191 Commits

Author SHA1 Message Date
Omar Chebib
0714847552 C/Cxx: unify static assertions with the macro ESP_STATIC_ASSERT
Closes https://github.com/espressif/esp-idf/issues/9938
2022-12-19 15:06:15 +01:00
Armando
6fd80903de adc: added a soc macro indicating digital controller supported unit 2022-12-16 12:07:38 +08:00
zwl
e8555efe5b Renamed BAH 2022-12-13 18:05:00 +08:00
Zim Kalinowski
759f7ec13d Merge branch 'feature/add_int_task_wdt_esp32c2_v5.0' into 'release/v5.0'
WDT: implement interrupt wdt and task wdt for ESP32-C2 (backport v5.0)

See merge request espressif/esp-idf!20980
2022-12-05 16:38:35 +08:00
jingli
21c9ec5eee esp_hw_support/sleep: fix current leakage when hold digital io during deep sleep 2022-12-02 12:24:52 +00:00
Jiang Jiang Jian
df80bc864d Merge branch 'bugfix/fix_xtal_related_rtc_params_for_esp32_backport_v5.0' into 'release/v5.0'
esp32/rtc: fix xtal unstable in some cases when sleep(backport v5.0)

See merge request espressif/esp-idf!20799
2022-12-02 20:24:25 +08:00
Omar Chebib
b675bb2a4d WDT: implement interrupt wdt and task wdt for ESP32-C2
ESP32-C2 has a single group timer, thus it will use it for the interrupt watchdog,
which is more critical than the task watchdog. The latter is implement in
software thanks to the `esp_timer`component.
2022-12-01 10:45:35 +00:00
morris
b1c856022c Merge branch 'bugfix/spi2_add_device_cs_more_than_3_v5.0' into 'release/v5.0'
spi_master:fix error when use `spi_bus_add_device` more than 3 device(v5.0)

See merge request espressif/esp-idf!20073
2022-10-31 11:46:16 +08:00
jingli
e04c8505e1 esp32/rtc: fix xtal unstable in some cases when sleep
1. add xtal buf wait to fix high temperature restart issue
2. add min sleep value to fix xtal stop due to too short sleep time issue
2022-10-26 16:11:27 +08:00
jingli
9fa4bb272e esp_hw_support/clk_cali: fix xtal32k error detect 2022-09-21 16:21:11 +08:00
wangjialiang
ddc294c79f ble_mesh: docs: Remove BLE Mesh related reference for C2 2022-09-19 21:11:17 +08:00
wanlei
3cc3455ca6 spi_master:fix error when use spi_bus_add_device more than 3 device
update gpio_sig at `spics_out` array in each spi_periph.c of chips later than s2
then `spi_bus_add_device` can correctly distribute gpio_signals for cs_signal

Closes https://github.com/espressif/esp-idf/issues/8876
2022-09-09 15:57:13 +08:00
Michael (XIAO Xufeng)
6ed15178b6 uart: move frequency of clock sources out of HAL 2022-08-22 14:28:12 +08:00
Geng Yuchao
5524c772e6 Fix soc caps define for all chips 2022-08-18 16:27:06 +08:00
jingli
8cd7c30bc7 kconfig: refactor xtal freq kconfig to common configuration item 2022-08-08 13:53:02 +08:00
wuzhenghui
7cb9304b65 Clean IRAM and DRAM address space conversion macros 2022-07-29 17:07:39 +08:00
wuzhenghui
21a4eda4d4 Use the entire sharedbuffer space as the heap of the D/IRAM attribute 2022-07-29 10:51:47 +08:00
morris
d94432fea8 systimer: refactor hal to accomodate more xtal choices 2022-07-25 16:08:52 +08:00
morris
741b031e83 soc: added SOC_TOUCH_SENSE_SUPPORTED macro 2022-07-22 00:12:36 +00:00
laokaiyao
edee3ee3cd i2s: add slot sequence table
Closes: https://github.com/espressif/esp-idf/issues/9208

When I2S is configured into different modes, the slot sequence varies.
This commit updates slot sequence tables and corresponding descriptions
in (both code and programming guide).
2022-07-21 15:52:39 +08:00
laokaiyao
90866e99fb i2s: add basic examples for STD/TDM/PDM mode 2022-07-21 15:52:39 +08:00
morris
4154eaec93 sdm: clean up soc/hal/ll code 2022-07-20 14:59:50 +08:00
Song Ruo Jing
4734b1433b Merge branch 'bugfix/gpio_hal_coverity_fix' into 'master'
gpio: Fix ESP32S3 GPIO48 does not support hold function bug and Fix coverity report

Closes IDF-4901

See merge request espressif/esp-idf!18805
2022-07-19 21:37:15 +08:00
Armando (Dou Yiwen)
9f6f61345b Merge branch 'feature/adc_driver_ng' into 'master'
ADC Driver NG

Closes IDF-4560, IDF-3908, IDF-4225, IDF-2482, IDF-4111, IDF-3610, IDF-4058, IDF-3801, IDF-3636, IDF-2537, IDF-4310, IDF-5150, IDF-5151, and IDF-4979

See merge request espressif/esp-idf!17960
2022-07-19 21:28:31 +08:00
Cao Sen Miao
53580a62b5 I2C: Fullfill the I2C clock tree, and support 26M XTAL on ESP32-C2 2022-07-19 11:41:42 +08:00
Armando
5b523a3313 esp_adc: new esp_adc component and adc drivers 2022-07-15 18:31:00 +08:00
songruojing
145454356b gpio: Fix ESP32S3 GPIO48 does not support hold function bug
GPIO_HOLD_MASK array was missing the last item

Add __Static_assert to check array sizes for all gpio_periph.c files to prevent same mistake in the future.
2022-07-15 16:51:25 +08:00
Jiang Jiang Jian
3630713e5f Merge branch 'docs/esp32c2_sys_feature_api_guides' into 'master'
docs: update system API-guides for ESP32-C2

Closes IDF-4202, IDF-4213, and IDF-4222

See merge request espressif/esp-idf!18979
2022-07-12 10:59:12 +08:00
Marius Vikhammer
d62421619c docs: update system API-guides for ESP32-C2 2022-07-12 09:32:43 +08:00
songruojing
b3d8db3ae2 bootloader, esp_system: esp32c2 console uart to support 26MHz xtal
Gets the XTAL frequency from the RTC storage register, remove UART_CLK_FREQ_ROM macro from soc.h
2022-07-11 12:24:58 +08:00
Ivan Grokhotkov
5b54ae76d4 esp_timer, hal: add support for non-integer systimer frequency
When ESP32-C2 is paired with a 26 MHz XTAL, the systimer tick
frequency becomes equal to 26 / 2.5 = 10.4 MHz. Previously we always
assumed that systimer tick frequency is integer (and 1 MHz * power of
two, above that!).
This commit introduces a new LL macro, SYSTIMER_LL_TICKS_PER_US_DIV.
It should be set in such a way that:

1. SYSTIMER_LL_TICKS_PER_US / SYSTIMER_LL_TICKS_PER_US_DIV equals the
   actual systimer tick frequency,
2. and SYSTIMER_LL_TICKS_PER_US is integer.

For ESP32-C2 this means that SYSTIMER_LL_TICKS_PER_US = 52 and
SYSTIMER_LL_TICKS_PER_US_DIV = 5.

This introduced two possible issues:

1. Overflow when multiplying systimer counter by 5
   - Should not be an issue, since systimer counter is 52-bit, so
     counter * 5 is no more than 55-bit.
2. The code needs to perform:
   - divide by 5: when converting from microseconds to ticks
   - divide by 52: when converting from ticks to microseconds
   The latter potentially introduces a performance issue for the
   esp_timer_get_time function.
2022-07-11 12:24:37 +08:00
GengYuchao
d145c337e0 Enable rpa_moudle reset function 2022-07-05 20:50:31 +08:00
morris
7863c1bc45 Merge branch 'bugfix/fix_rtc_freq_err_for_h2_beta1' into 'master'
Bugfix/fix rtc freq err for h2 beta1

See merge request espressif/esp-idf!18682
2022-07-04 16:46:17 +08:00
Omar Chebib
cd48baf979 Refactor: move regi2c_*.h header files from esp_hw_support to soc component
When creating G0 layer, some regi2c_*.h headers were moved out from
esp_hw_support (G1) to soc (G0). In order to be consistent with that change,
move all the remaining regi2c_*.h headers to soc too.
2022-06-30 09:40:44 +00:00
GengYuchao
10fd1daa10 Add ETM clk gate defines for h2 2022-06-30 17:02:00 +08:00
Armando
31b3f31ef4 ext_mem: make memory region check strict 2022-06-28 14:17:44 +08:00
Mahavir Jain
dd24639215 Merge branch 'esp32h2/enable_ecc_accelerator' into 'master'
esp32h2: Enable ECC accelerator

Closes IDF-3397

See merge request espressif/esp-idf!18647
2022-06-23 20:06:26 +08:00
Cao Sen Miao
3a820462ac temperature_sensor: Add temperature sensor support for ESP32-C2 2022-06-23 15:36:43 +08:00
Sachin Parekh
6cfc9c365f esp32h2: Enable ECC accelerator 2022-06-23 12:59:13 +05:30
Ivan Grokhotkov
3973db7664
soc: make register access macros compatible with C++20
In C++20, using the result of an assignment to a 'volatile' value is
deprecated.

Breaking change: register "setter" or modification macros can no
longer be used as expressions.

Closes https://github.com/espressif/esp-idf/issues/9170
2022-06-17 18:09:22 +02:00
Omar Chebib
752026a174 Merge branch 'refactor/remove_g0_dep_on_g1_riscv' into 'master'
G0: RISC-V targets have now an independent G0 layer

See merge request espressif/esp-idf!17926
2022-06-16 11:53:39 +08:00
laokaiyao
28b8fc6a7e i2s: update documents for driver-NG 2022-06-15 10:30:04 +08:00
Darian
e213e66ba3 Merge branch 'refactor/esp_hw_support_cpu' into 'master'
esp_hw_support: Add new esp_cpu.h abstraction

Closes IDF-4769

See merge request espressif/esp-idf!17091
2022-06-14 21:11:30 +08:00
Omar Chebib
5bcd9b2db8 G0: RISC-V targets have now an independent G0 layer
G0 doesn't depend on any G1+ layer for RISC-V based targets
2022-06-14 15:00:53 +08:00
Darian Leung
61eb7baa6b esp_hw_support: Add esp_cpu.h abstraction and API
This commit updates the esp_cpu.h API. The new API presents a new
abstraction of the CPU where CPU presents the following interfaces:

- CPU Control (to stall/unstall/reset the CPU)
- CPU Registers (to read registers commonly used in SW such as SP, PC)
- CPU Interrupts (to inquire/allocate/control the CPUs 32 interrupts)
- Memory Port (to configure the CPU's memory bus for memory protection)
- Debugging (to configure/control the CPU's debugging port)

Note: Also added FORCE_INLINE_ATTR to the DoxyFile in order to pass doc
        builds for esp_cpu.h
2022-06-14 14:30:58 +08:00
songruojing
c8752cee6a clk_tree: Refactor rtc_clk.c by adding HAL layer for clock subsystem 2022-06-13 17:47:50 +08:00
Cao Sen Miao
6589daabb9 MMU: Add configurable mmu page size support on ESP32C2 2022-06-08 19:34:31 +08:00
Geng Yuchao
8012af37d1 Fix soc caps for BT 2022-06-03 21:45:40 +08:00
KonstantinKondrashov
ac4c7d99fe dport: Move DPORT workaround to G0 2022-05-31 13:44:18 +08:00
Island
74b7a3fc83 Merge branch 'feature/final_h2_bluedroid_skc_common' into 'master'
Feature/final h2 bluedroid skc common

See merge request espressif/esp-idf!17710
2022-05-30 21:20:52 +08:00