alex/esp-idf
alex/esp-idf
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25,963 Commits 20 Branches 148 Tags 384 MiB
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137 Commits

Author SHA1 Message Date
Omar Chebib
0714847552 C/Cxx: unify static assertions with the macro ESP_STATIC_ASSERT 
Closes https://github.com/espressif/esp-idf/issues/9938
 2022-12-19 15:06:15 +01:00
Armando
6fd80903de adc: added a soc macro indicating digital controller supported unit 2022-12-16 12:07:38 +08:00
Zim Kalinowski
759f7ec13d Merge branch 'feature/add_int_task_wdt_esp32c2_v5.0' into 'release/v5.0' 
WDT: implement interrupt wdt and task wdt for ESP32-C2 (backport v5.0)

See merge request espressif/esp-idf!20980
 2022-12-05 16:38:35 +08:00
Jiang Jiang Jian
77333d2d64 Merge branch 'bugfix/fix_current_leakage_when_hold_digital_io_during_deep_sleep_backport_v5.0' into 'release/v5.0' 
esp_hw_support/sleep: fix current leakage when hold digital io during deep sleep(backport v5.0)

See merge request espressif/esp-idf!20806
 2022-12-05 14:00:59 +08:00
Jiang Jiang Jian
3290fc1a6d Merge branch 'bugfix/multiple_bugfixes_v5.0' into 'release/v5.0' 
Add multiple bugfixes (Backport v5.0)

See merge request espressif/esp-idf!20997
 2022-12-05 11:16:27 +08:00
Jiang Jiang Jian
b48971317f Merge branch 'bugfix/fix_part_of_modem_not_reset_when_power_on_backport_v5.0' into 'release/v5.0' 
Coexistence: fix part of modem module not reset when power up(backport v5.0)

See merge request espressif/esp-idf!20807
 2022-12-02 20:25:21 +08:00
jingli
21c9ec5eee esp_hw_support/sleep: fix current leakage when hold digital io during deep sleep 2022-12-02 12:24:52 +00:00
Jiang Jiang Jian
df80bc864d Merge branch 'bugfix/fix_xtal_related_rtc_params_for_esp32_backport_v5.0' into 'release/v5.0' 
esp32/rtc: fix xtal unstable in some cases when sleep(backport v5.0)

See merge request espressif/esp-idf!20799
 2022-12-02 20:24:25 +08:00
jingli
54046ee4bf soc: remove unused DR_REG_DPORT_END macro for c2/c3/s2/s3 2022-12-01 21:09:05 +08:00
Omar Chebib
b675bb2a4d WDT: implement interrupt wdt and task wdt for ESP32-C2 
ESP32-C2 has a single group timer, thus it will use it for the interrupt watchdog,
which is more critical than the task watchdog. The latter is implement in
software thanks to the `esp_timer`component.
 2022-12-01 10:45:35 +00:00
alex.li
9bbe6e7fa3 Support external coexist formal code for C2 & S3, 
and optimize RX category in external coex.
 2022-11-08 19:10:38 +05:30
morris
b1c856022c Merge branch 'bugfix/spi2_add_device_cs_more_than_3_v5.0' into 'release/v5.0' 
spi_master:fix error when use `spi_bus_add_device` more than 3 device(v5.0)

See merge request espressif/esp-idf!20073
 2022-10-31 11:46:16 +08:00
jingli
e04c8505e1 esp32/rtc: fix xtal unstable in some cases when sleep 
1. add xtal buf wait to fix high temperature restart issue
2. add min sleep value to fix xtal stop due to too short sleep time issue
 2022-10-26 16:11:27 +08:00
Jiang Jiang Jian
b9495f85cf Merge branch 'bugfix/fix_c2_xtal_unstable_when_wakeup_from_sleep_backport_v5.0' into 'release/v5.0' 
esp_hw_support/esp32c2/rtc: fix c2 xtal unstable when wakeup from sleep(backport v5.0)

See merge request espressif/esp-idf!20273
 2022-09-21 22:38:24 +08:00
jingli
9fa4bb272e esp_hw_support/clk_cali: fix xtal32k error detect 2022-09-21 16:21:11 +08:00
jingli
b8b7a0d8dd esp_hw_support/esp32c2/rtc: take a safer xtal buf wait 2022-09-21 14:16:34 +08:00
wangjialiang
ddc294c79f ble_mesh: docs: Remove BLE Mesh related reference for C2 2022-09-19 21:11:17 +08:00
wanlei
3cc3455ca6 spi_master:fix error when use spi_bus_add_device more than 3 device 
update gpio_sig at `spics_out` array in each spi_periph.c of chips later than s2
then `spi_bus_add_device` can correctly distribute gpio_signals for cs_signal

Closes https://github.com/espressif/esp-idf/issues/8876
 2022-09-09 15:57:13 +08:00
Michael (XIAO Xufeng)
69be7c4cc2 Merge branch 'feat/support_esp32c2_uart_v5.0' into 'release/v5.0' 
uart: update console docs about frequency for ESP32-C2, move frequency of clock sources out of HAL (v5.0)

See merge request espressif/esp-idf!19690
 2022-08-25 02:03:26 +08:00
Michael (XIAO Xufeng)
4a68f9e064 Merge branch 'feature/support_7.2.9_soc/pvt_dig_v5.0' into 'release/v5.0' 
ESP32C2:support auto adjust LDO voltage based on pvt-dig(backport 5.0)

See merge request espressif/esp-idf!19628
 2022-08-23 09:30:06 +08:00
Jiang Jiang Jian
b84f9dd5cc Merge branch 'bugfix/fix_c2_rtc_ldo_too_low_bug_v5.0' into 'release/v5.0' 
ESP32C2: Fix system not stable bug when rtc voltage too low (backport v5.0)

See merge request espressif/esp-idf!19599
 2022-08-22 19:48:36 +08:00
Michael (XIAO Xufeng)
6ed15178b6 uart: move frequency of clock sources out of HAL 2022-08-22 14:28:12 +08:00
Geng Yuchao
5524c772e6 Fix soc caps define for all chips 2022-08-18 16:27:06 +08:00
zlq
3dc89437cc support auto adjust LDO voltage based on pvt-dig 2022-08-17 17:25:59 +08:00
cje
7243032123 set fosc div to 1 to make chip run stablly for C2 2022-08-17 10:58:14 +08:00
jingli
8cd7c30bc7 kconfig: refactor xtal freq kconfig to common configuration item 2022-08-08 13:53:02 +08:00
Wan Lei
1265a2db9d Merge branch 'refactor/add_missing_include_path_for_soc_struct_files' into 'master' 
Fix check_public_headers violations for soc component

Closes IDF-5397

See merge request espressif/esp-idf!19158
 2022-08-01 10:14:04 +08:00
wuzhenghui
7cb9304b65 Clean IRAM and DRAM address space conversion macros 2022-07-29 17:07:39 +08:00
wanlei
bb5a95f1aa soc: fix register header files not self-contain 2022-07-29 11:18:06 +08:00
wuzhenghui
31183270fb bugfix: fix SOC_ROM_STACK_START defines 2022-07-29 10:51:47 +08:00
wuzhenghui
21a4eda4d4 Use the entire sharedbuffer space as the heap of the D/IRAM attribute 2022-07-29 10:51:47 +08:00
morris
d94432fea8 systimer: refactor hal to accomodate more xtal choices 2022-07-25 16:08:52 +08:00
morris
c4e84751a5 driver: fix public header exceptions for driver 2022-07-22 00:12:36 +00:00
morris
741b031e83 soc: added SOC_TOUCH_SENSE_SUPPORTED macro 2022-07-22 00:12:36 +00:00
morris
bec44ca2e9 gptimer: test on c2 with xtal 26mhz 2022-07-20 04:40:28 +00:00
Song Ruo Jing
4734b1433b Merge branch 'bugfix/gpio_hal_coverity_fix' into 'master' 
gpio: Fix ESP32S3 GPIO48 does not support hold function bug and Fix coverity report

Closes IDF-4901

See merge request espressif/esp-idf!18805
 2022-07-19 21:37:15 +08:00
Armando (Dou Yiwen)
9f6f61345b Merge branch 'feature/adc_driver_ng' into 'master' 
ADC Driver NG

Closes IDF-4560, IDF-3908, IDF-4225, IDF-2482, IDF-4111, IDF-3610, IDF-4058, IDF-3801, IDF-3636, IDF-2537, IDF-4310, IDF-5150, IDF-5151, and IDF-4979

See merge request espressif/esp-idf!17960
 2022-07-19 21:28:31 +08:00
Cao Sen Miao
53580a62b5 I2C: Fullfill the I2C clock tree, and support 26M XTAL on ESP32-C2 2022-07-19 11:41:42 +08:00
Armando
5b523a3313 esp_adc: new esp_adc component and adc drivers 2022-07-15 18:31:00 +08:00
songruojing
145454356b gpio: Fix ESP32S3 GPIO48 does not support hold function bug 
GPIO_HOLD_MASK array was missing the last item

Add __Static_assert to check array sizes for all gpio_periph.c files to prevent same mistake in the future.
 2022-07-15 16:51:25 +08:00
songruojing
b3d8db3ae2 bootloader, esp_system: esp32c2 console uart to support 26MHz xtal 
Gets the XTAL frequency from the RTC storage register, remove UART_CLK_FREQ_ROM macro from soc.h
 2022-07-11 12:24:58 +08:00
songruojing
ef813b23fa rtc: esp32c2 support 26MHz xtal in startup code and rtc_clk.c 2022-07-11 12:24:58 +08:00
Ivan Grokhotkov
2e37218ce5 soc, hal: remove XTAL_CLK_FREQ 
XTAL_CLK_FREQ now depends on the actual XTAL used, remove this macro
and get the XTAL frequency from the RTC register instead.
No uses of XTAL_CLK_FREQ found, other than in the UART LL.
 2022-07-11 12:24:58 +08:00
Ivan Grokhotkov
5b54ae76d4 esp_timer, hal: add support for non-integer systimer frequency 
When ESP32-C2 is paired with a 26 MHz XTAL, the systimer tick
frequency becomes equal to 26 / 2.5 = 10.4 MHz. Previously we always
assumed that systimer tick frequency is integer (and 1 MHz * power of
two, above that!).
This commit introduces a new LL macro, SYSTIMER_LL_TICKS_PER_US_DIV.
It should be set in such a way that:

1. SYSTIMER_LL_TICKS_PER_US / SYSTIMER_LL_TICKS_PER_US_DIV equals the
   actual systimer tick frequency,
2. and SYSTIMER_LL_TICKS_PER_US is integer.

For ESP32-C2 this means that SYSTIMER_LL_TICKS_PER_US = 52 and
SYSTIMER_LL_TICKS_PER_US_DIV = 5.

This introduced two possible issues:

1. Overflow when multiplying systimer counter by 5
   - Should not be an issue, since systimer counter is 52-bit, so
     counter * 5 is no more than 55-bit.
2. The code needs to perform:
   - divide by 5: when converting from microseconds to ticks
   - divide by 52: when converting from ticks to microseconds
   The latter potentially introduces a performance issue for the
   esp_timer_get_time function.
 2022-07-11 12:24:37 +08:00
Michael (XIAO Xufeng)
a58362a429 Merge branch 'feature/efuse_rev_major_minor' into 'master' 
efuse: Adds major and minor versions

See merge request espressif/esp-idf!18255
 2022-07-07 11:48:54 +08:00
Song Ruo Jing
b662f4b74f Merge branch 'feature/support_26M_32M_xtal_bbpll_c2' into 'master' 
support c2 26M/32M xtal for bbpll

Closes IDF-5485

See merge request espressif/esp-idf!18769
 2022-07-06 21:17:52 +08:00
cje
e16165f263 support c2 26M/32M xtal for bbpll 2022-07-05 17:45:03 +08:00
KonstantinKondrashov
0f8ff5aa15 efuse: Adds major and minor versions and others 2022-07-05 14:38:27 +08:00
Omar Chebib
cd48baf979 Refactor: move regi2c_*.h header files from esp_hw_support to soc component 
When creating G0 layer, some regi2c_*.h headers were moved out from
esp_hw_support (G1) to soc (G0). In order to be consistent with that change,
move all the remaining regi2c_*.h headers to soc too.
 2022-06-30 09:40:44 +00:00
Armando
31b3f31ef4 ext_mem: make memory region check strict 2022-06-28 14:17:44 +08:00