Commit Graph

504 Commits

Author SHA1 Message Date
Ivan Grokhotkov
300a4a16a5 Merge branch 'bugfix/add_signature_in_image_len_v4.4' into 'release/v4.4'
bootloader_support: consider signature sector in image length validation (v4.4)

See merge request espressif/esp-idf!19484
2022-08-23 20:19:52 +08:00
Mahavir Jain
58d93a89af
bootloader_support: consider signature sector in image length validation
For secure boot enabled cases, bootloader and firmware images have signature
appended and size is variable based on scheme being used. This appended data
must be considered while verifying image length against allocated partition
size to avoid any possibilities of going beyond reserved size.

Closes IDF-5617
2022-08-10 10:38:15 +05:30
Marius Vikhammer
f8f93d936e ulp-riscv: add support for using ADC as well as an example show-casing it. 2022-08-09 09:21:15 +08:00
jingli
236bd27134 further fix spi flash/ram current leakage
Currently, we pull up cs io for spi flash/ram to reduce current leakage during
light sleep. But some kind of spi flash/ram chip need all io pull up. Otherwise,
current leakage will still exist.
2022-07-28 13:11:55 +08:00
KonstantinKondrashov
dcc706280d reset_reasons: EFUSE_RST is treated as POWERON_RST
ESP32 does not have the EFUSE_RST, the rest chips has this reset reason.
2022-06-22 16:39:02 +08:00
KonstantinKondrashov
c9bec434aa bootloader_efuse: Adds IRAM_ATTR for efuse API
Fixes startup of app for case:
bootloader with 40Mhz and app with 80Mhz (ESPTOOLPY_FLASHFREQ)

Closes https://github.com/espressif/esp-idf/issues/9156
2022-06-19 14:32:15 +00:00
Michael (XIAO Xufeng)
f20d229390 Merge branch 'refactor/flash_qio_overidable_v4.4' into 'release/v4.4'
spi_flash: refact that flash qio can be overidable(backport v4.4)

See merge request espressif/esp-idf!18036
2022-06-08 12:37:55 +08:00
Wu Zheng Hui
2e4784611d efuse: update efuse name (backport v4.4) 2022-05-30 11:15:16 +08:00
Gustavo Henrique Nihei
477d11e9c1 bootloader: Create option for enabling memory region protection
Signed-off-by: Gustavo Henrique Nihei <gustavo.nihei@espressif.com>
2022-05-16 09:39:51 -03:00
Cao Sen Miao
ea4b3fdfe5 spi_flash: refact that flash qio can be overidable 2022-05-09 11:08:53 +08:00
rudi ;-)
04959af635 add support for Flash 32MB..128MB (S2, S3)
ESP32-S2 and ESP32-S3
supports up to 1 GB of external flash and RAM
add support for
-    32MB
-    64MB
-    128MB ( example NOR spiFLASH 1G-BIT W25Q01JVZEIQ Winbond 0xEF 0x40 0x21 )

Merges https://github.com/espressif/esp-idf/pull/7688

Signed-off-by: Ivan Grokhotkov <ivan@espressif.com>
2022-04-19 14:00:11 +00:00
Armando
d53ea1166d rng: fix rng adc digital inpu not disabled issue 2022-03-07 11:39:27 +08:00
Michael (XIAO Xufeng)
eff03cbbd9 Merge branch 'feat/support_mxic_unlock_v4.4' into 'release/v4.4'
spi_flash: support unlock MXIC flash chips (v4.4)

See merge request espressif/esp-idf!17251
2022-03-03 11:13:09 +08:00
Michael (XIAO Xufeng)
8543d1b88a bootloader: fixed the issue custom_uart_gpio doesn't take effect 2022-03-02 02:40:45 +08:00
Michael (XIAO Xufeng)
e835599979 bootloader: support unlock MXIC flash chips 2022-02-23 16:23:34 +08:00
Jiang Jiang Jian
71b81e4a01 Merge branch 'bugfix/support_esp32s2_eco1_v4.4' into 'release/v4.4'
esp_phy: Update ESP32S2 phy lib to support eco1 chip(V4.4)

See merge request espressif/esp-idf!16715
2022-02-14 05:55:29 +00:00
Michael (XIAO Xufeng)
954d52ff3a Merge branch 'flash/add_th_support_v4.4' into 'release/v4.4'
spi_flash: add support for th 1M flash(backport v4.4)

See merge request espressif/esp-idf!16714
2022-02-10 09:40:40 +00:00
chenjianxing
50302e4157 esp_phy: Update ESP32S2 phy lib to support eco1 chip 2022-02-10 14:13:02 +08:00
KonstantinKondrashov
0b5d4edbc6 bootloader: Fixes bootloader_common_get_sha256_of_partition. Adds hash check.
Closes https://github.com/espressif/esp-idf/issues/8274
2022-01-25 19:58:29 +08:00
Cao Sen Miao
67b4ba33dd spi_flash: add support for th 1M flash 2022-01-10 12:39:09 +08:00
Jakob Hasse
ee24264c75 feat (bootloader): added rng sampling
Set maximum RNG query frequency to save value known from tests
2022-01-03 16:24:41 +05:30
Aditya Patwardhan
2a2d8f5cbc efuse_example_test: Fix the example test
*Unify the log messages when UART ROM Download mode is kept enabled
2021-12-08 16:11:59 +08:00
Aditya Patwardhan
2c0081b286 secure_boot: Fix warning when UART ROM DL mode is disabled
*Additionally use updated calls to enable rom secure download mode
2021-12-08 16:11:59 +08:00
Mahavir Jain
5f7037d143 bootloader: add anti-FI checks around secure version in anti-rollback scheme 2021-11-29 18:49:22 +05:30
Gustavo Henrique Nihei
6f6538f053 bootloader_support: Fix unused-but-set-variable compiler warning
When building with BOOTLOADER_LOG_LEVEL lesser then VERBOSE, an error
code variable was being set but not consumed, resulting in a compiler
warning.

Signed-off-by: Gustavo Henrique Nihei <gustavo.nihei@espressif.com>
2021-11-26 01:34:42 -03:00
Gustavo Henrique Nihei
d21ef9b10a bootloader_support: Fix unused-variable compiler warning
Builds for every chip other than ESP32 resulted in a compiler warning
due to "drom_load_addr_aligned" and "irom_load_addr_aligned" not being
used, besides being possible to actually reuse them.
Furthermore, extended the logic for the other similar variables.

Signed-off-by: Gustavo Henrique Nihei <gustavo.nihei@espressif.com>
2021-11-26 01:34:40 -03:00
Gustavo Henrique Nihei
18dc2cfcc2 bootloader_support: Fix and re-enable bootloader_debug_buffer function
The body of the bootloader_debug_buffer function was conditioned to
macros that were never defined, resulting in deactivated code.

Signed-off-by: Gustavo Henrique Nihei <gustavo.nihei@espressif.com>
2021-11-23 09:01:24 -03:00
Mahavir Jain
214d2eeba7 Merge branch 'bugfix/manual_secure_boot_v2_multiple_digest_issue_v4.4' into 'release/v4.4'
secure_boot_v2: fix issue in pre-flashed digest (manual) workflow (v4.4)

See merge request espressif/esp-idf!15780
2021-11-10 04:22:55 +00:00
Sachin Parekh
2f39639c20 secure_boot: Do not allow key revocation in bootloader 2021-11-09 15:19:47 +05:30
Mahavir Jain
4ac351247d secure_boot_v2: fix issue in pre-flashed digest (manual) workflow
This commit fixes issue where empty (unprogrammed) digest slot out of
multiple supported (e.g. 3 for ESP32-C3) could cause issue in
workflow enablement process.

Notes:

1. This issue was applicable for chips supporting "secure-boot-v2"
scheme with multiple digests slots
2. This issue was affecting only manual workflow, where digest of
public was pre-flashed in efuse
3. Change in "flash_encrypt.c" is only for additional safety purpose
2021-11-08 12:48:12 +08:00
Wu Zheng Hui
1080e4f6a2 rename APB_CTRL ro SYS_CON
save
2021-09-16 20:57:57 +08:00
chenjianqiang
9b53e18c44 add flash and PSRAM CS IO acquire function 2021-09-15 20:34:17 +08:00
Sachin Parekh
bf1dde7233 bootloader: Enable clock glitch detection
Reset the device when clock glitch detected. Clock glitch detection is
only active in bootloader
2021-09-02 12:25:12 +05:30
Yuriy Shestakov
87b958c814 Fixed GLITCH_RTC_RST for esp32-c3 revision 3
* Issue: https://github.com/espressif/esp-idf/issues/7082

Signed-off-by: Yuriy Shestakov <yshestakov@gmail.com>

Closes https://github.com/espressif/esp-idf/issues/7082
Closes https://github.com/espressif/esp-idf/pull/7441
2021-09-02 12:25:12 +05:30
Armando
a3dc625da6 mspi: support 120MHz Quad Flash and PSRAM on ESP32S3 2021-08-31 16:06:44 +08:00
wuzhenghui
6ab495b4dc esp32h2: chip env support
brownout init fixed
2021-08-25 11:02:47 +08:00
Armando (Dou Yiwen)
3e172289b0 Merge branch 'feature/support_octal_flash_120m_str_mode_on_esp32s3' into 'master'
mspi: support octal flash 120MHz STR mode on esp32s3

Closes IDF-3146

See merge request espressif/esp-idf!14668
2021-08-20 08:40:02 +00:00
Mahavir Jain
85e1258178 Merge branch 'esp32s3/secure_boot' into 'master'
bootloader: Enable Secure boot V2 for ESP32-S3

Closes IDF-1787

See merge request espressif/esp-idf!14873
2021-08-20 06:44:19 +00:00
Michael (XIAO Xufeng)
7649db9712 draft: another patch.. 2021-08-19 17:02:58 +08:00
Sachin Parekh
2d82560ed5 bootloader: Enable Secure boot V2 for ESP32-S3 2021-08-19 14:08:12 +05:30
Armando
d325f4d557 mspi: support octal flash 120M STR mode on esp32s3 2021-08-19 10:44:30 +08:00
Michael (XIAO Xufeng)
8dcfa1b384 spi_flash: fix the corruption of ROM after calling bootloader_execute_flash_command
The user register, especially dummy related ones, needs to be restored, otherwise the ROM function will not work.

Introduced in dd40123129.
2021-08-18 23:55:39 +08:00
Mahavir Jain
012c9e26a4 Merge branch 'fixes/secure_boot' into 'master'
secure_boot/esp32(s2,c3): Disable read protecting of efuses

See merge request espressif/esp-idf!14769
2021-08-17 05:05:00 +00:00
Michael (XIAO Xufeng)
a0d2efe1be Merge branch 'bugfix/xmc_overerase' into 'master'
bootloader: add xmc spi_flash startup flow to improve reliability

See merge request espressif/esp-idf!13895
2021-08-13 15:27:48 +00:00
Sachin Parekh
f430e86c0f secure_boot/esp32(s2,c3): Disable read protecting of efuses
When secure boot is enabled, disable the ability to read protect
efuses that contain the digest.
2021-08-13 13:41:59 +05:30
Michael (XIAO Xufeng)
dd40123129 bootloader: add xmc spi_flash startup flow to improve reliability 2021-08-12 17:22:42 +08:00
KonstantinKondrashov
3cf4fbc150 efuse(esp32s2): Added flash_ver, psram_ver, pkg_ver efuses 2021-08-06 13:14:54 +08:00
Omar Chebib
779e7400b0 uart: uart_set_pin function will now use IOMUX whenever possible
By using IOMUX instead of GPIO Matrix for UART, it is now possible
on ESP32 boards to use the UART as a wake up source even if it is
not used as a console.
For other boards where this issue was not present, using IOMUX has
the advantage to be faster than using GPIO matrix, so a highest
baudrate can be used
2021-08-04 12:48:30 +08:00
Cao Sen Miao
c29b3e2e36 spi_flash: move the unlock patch to bootloader and add support for GD 2021-07-29 10:46:33 +08:00
KonstantinKondrashov
92448e7bd7 secure_boot: Whole 3 bits are set for SOFT_DIS_JTAG eFuse 2021-07-21 17:19:01 +05:00