Michael (XIAO Xufeng)
254870c3c4
rtc: fixed 8MD256 can't be used as RTC slow src on ESP32
...
Sync configuration from other chips
Closes: https://github.com/espressif/esp-idf/issues/8007 , https://github.com/espressif/esp-idf/pull/8089
2022-06-05 02:33:50 +08:00
morris
c0dcebc41c
Merge branch 'feat/esp32s3_support_gpio_deepsleep_wakeup_v4.4' into 'release/v4.4'
...
example/deep_sleep: add example of EXT0 and using internal pullups (v4.4)
See merge request espressif/esp-idf!18119
2022-06-01 19:56:17 +08:00
Jiang Jiang Jian
fc30369909
Merge branch 'bugfix/update_efuse_name_v4.4' into 'release/v4.4'
...
efuse: update efuse name (backport v4.4)
See merge request espressif/esp-idf!18195
2022-05-30 11:15:16 +08:00
Wu Zheng Hui
2e4784611d
efuse: update efuse name (backport v4.4)
2022-05-30 11:15:16 +08:00
morris
0340c2f2bc
Merge branch 'bugfix/keep_rtc8m_in_lightsleep_v4.4' into 'release/v4.4'
...
pm: fixed RTC8M domain power down issue when used as RTC source (v4.4)
See merge request espressif/esp-idf!18075
2022-05-30 09:54:39 +08:00
laokaiyao
9b0f7b657b
i2s: fixed write timeout while setting the clock (v4.4)
2022-05-24 10:14:44 +08:00
chaijie
d222adbeeb
solve memory error bug when in lightsleep mode
2022-05-18 17:43:13 +08:00
Cao Sen Miao
04f7c342f0
I2C: patch for solving watchdog timeout issue
2022-05-17 16:36:40 +08:00
Michael (XIAO Xufeng)
4efab0d0ff
soc/esp32s3: merge gpio caps into soc_caps.h
2022-05-16 22:01:11 +08:00
Michael (XIAO Xufeng)
e119d6cb06
pm: add powerdown for int_8m on ESP32-H2
...
Also move the xtal fpu logic to sleep_modes.c
2022-05-16 00:59:36 +08:00
Michael (XIAO Xufeng)
17b9cc6b4a
pm: fixed RTC8M domain power issues
...
introduced in e44ead5356
1. The int8M power domain config by default is PD. While LEDC is using
RTC8M as clock source, this power domain will be kept on.
But when 8MD256 is used as RTC clock source, the power domain should
also be kept on.
On ESP32, there was protection for it, but broken by commit
e44ead5356
. Currently the power domain
will be forced on when LEDC is using RTC8M as clock source &&
!int8m_pd_en (user enable ESP_PDP_DOMAIN_RTC8M in lightsleep). Otherwise
the power domain will be powered off, regardless of RTC clock source.
In other words, int8M domain will be forced off (even when 8MD256
used as RTC clock source) if LEDC not using RTC8M as clock source, user
doesn't enable ESP_PDP_DOMAIN_RTC8M, or in deep sleep.
On later chips, there's no such protection, so 8MD256 could't be used as
RTC clock source in sleep modes.
This commit adds protection of 8MD256 clock to other chips. Fixes the
incorrect protection logic overriding on ESP32. Now the power domain
will be determiend by the logic below (order by priority):
1. When RTC clock source uses 8MD256, power up
2. When LEDC uses RTC8M clock source, power up
3. In deepsleep, power down
4. Otherwise determined by user config of ESP_PDP_DOMAIN_RTC8M,
power down by default. (This is preferred to have highest
priority, but it's kept as is because of current code structure.)
2. Before, after the macro `RTC_SLEEP_CONFIG_DEFAULT` decides dbias, the
protection above may force the int8m PU. This may cause the inconsistent
of dbias and the int8m PU status.
This commit lifts the logic of pd int8m/xtal fpu logic to upper layer
(sleep_modes.c).
Related: https://github.com/espressif/esp-idf/issues/8007 , https://github.com/espressif/esp-idf/pull/8089
temp
2022-05-12 15:57:09 +08:00
morris
3e7448d0f3
i80_lcd: support I2S1 LCD mode for esp32
2022-04-19 13:01:13 +00:00
Jiang Jiang Jian
f0e894e540
Merge branch 'bugfix/remove_c_series_chips_unsupported_efuse_field_backport_v4.4' into 'release/v4.4'
...
efuse: free esp32c3/esp32h2 unused efuse field (backport v4.4)
See merge request espressif/esp-idf!17292
2022-03-02 18:36:13 +08:00
morris
5f56bbd2d0
Merge branch 'bugfix/rtcio_increase_size_v4.4' into 'release/v4.4'
...
sleep: fixed ext1 cannot wakeup via RTCIO >= 18 issue (v4.4)
See merge request espressif/esp-idf!17201
2022-03-02 16:53:05 +08:00
songruojing
2ef6b8845b
uart: fixed reset logic on ESP32-S3
2022-03-02 02:42:46 +08:00
songruojing
bdd7610e66
uart: fixed incorrect channel number on ESP32S2, S3 and C3
2022-03-02 02:42:06 +08:00
wuzhenghui
c6aa1cf732
remove esp32c3 unsupported efuse field
2022-02-28 17:26:28 +08:00
Michael (XIAO Xufeng)
21b80a969f
soc: updated soc_caps about rtc_io and the format
2022-02-18 11:44:43 +08:00
Jiang Jiang Jian
f9927119b8
Merge branch 'bugfix/efuse_timesettings_for_esp32s3_v4.4' into 'release/v4.4'
...
efuse: Fixes eFuse timesettings issue on esp32S3 (v4.4)
See merge request espressif/esp-idf!17177
2022-02-17 04:00:14 +00:00
Jiang Jiang Jian
174bd31bc0
Merge branch 'bugfix/usb_no_rom_log_v4.4' into 'release/v4.4'
...
USB_SERIAL_JTAG: Fix the issue that there is no rom log when restarting(backport v4.4)
See merge request espressif/esp-idf!17073
2022-02-17 03:59:36 +00:00
KonstantinKondrashov
5c7b597594
efuse: Fixes eFuse timesettings issue on esp32S3
2022-02-16 15:15:27 +08:00
songruojing
41e452e7d8
gpio: Fix the bug that gpio interrupt cannot be triggered on app cpu on ESP32S3
...
Closes https://github.com/espressif/esp-idf/issues/7885
(cherry picked from commit 91f1159f9c
)
2022-02-16 14:50:51 +08:00
Cao Sen Miao
a74e06560b
USB_SERIAL_JTAG: Fix the issue that there is no rom log when restarting
2022-02-15 18:56:06 +08:00
Michael (XIAO Xufeng)
c2c4b126f7
Merge branch 'feature/support_new_psram_v4.4' into 'release/v4.4'
...
psram: add ESP32-D0WD-R2-V3 support(backport v4.4)
See merge request espressif/esp-idf!16705
2022-02-13 14:13:38 +00:00
Michael (XIAO Xufeng)
730ca0ea43
Merge branch 'bugfix/cpu_reset_perip_clk_disable_v4.4' into 'release/v4.4'
...
esp_system: change range comparsion for reset reason to specifc cpu reset reason comparison (backport v4.4)
See merge request espressif/esp-idf!15898
2022-02-10 10:32:09 +00:00
Michael (XIAO Xufeng)
8b86834a72
Merge branch 'bugfix/gpio_pin_num_fix_v4.4' into 'release/v4.4'
...
gpio: Fix some gpio pin num errors on esp32s2 and esp32c3 (backport v4.4)
See merge request espressif/esp-idf!16594
2022-02-10 10:21:52 +00:00
Omar Chebib
63afc84de5
LEDC: improved support for ESP32-C3 and refactored divisor calculation
...
As ESP32C3 does not have support for REF_TICK source clock, it is now not
possible to select it anymore.
Auto cfg clock has been improved for all boards.
2022-02-10 16:54:00 +08:00
morris
956c6b889f
rmt: do not support rx wrap on esp32s2
...
Closes https://github.com/espressif/esp-idf/issues/8354
2022-02-09 17:29:09 +08:00
songruojing
b80a070395
esp_system: replace the range comparsion for reset reason in perip clk init with specific reset reason check, also add a test case in LEDC to check for the perip clk not being disabled after cpu reset
...
(cherry picked from commit f57456e9dd919e5eea1d3cd0caa64b5c97a4df73)
2022-01-27 09:51:00 +00:00
Martin Vychodil
7d9652dccf
System/Security: Memprot API unified (ESP32C3,ESP32S3)
...
Unified Memory protection API for all PMS-aware chips
Closes JIRA IDF-3849
2022-01-27 12:40:27 +08:00
Roland Dobai
a59e3ab59d
Merge branch 'feature/esp32s3_apptrace_v4.4' into 'release/v4.4'
...
Feature/esp32s3 apptrace v4.4
See merge request espressif/esp-idf!16649
2022-01-26 09:58:35 +00:00
KonstantinKondrashov
1638b36804
efuse: Fixes eFuse timesettings issue on esp32c3
2022-01-25 19:14:31 +08:00
laokaiyao
816b0ce878
i2s: impove the apll and clock division calculation
2022-01-13 11:06:40 +08:00
Cao Sen Miao
e2ef65e117
psram: add ESP32-D0WD-R2-V3 support
2022-01-10 10:39:00 +08:00
Alexey Gerenkov
8c2990fcea
trax: Adds ESP32-S3 support
2022-01-05 19:34:28 +01:00
songruojing
b25fb1111d
gpio: Fix some gpio pin num errors on esp32s2 and esp32c3
2021-12-30 12:27:14 +08:00
Armando
1ec46ad3b8
adc: support adc dma driver on all chips
2021-12-23 17:13:46 +08:00
Armando
2aed35b804
adc: fix adc1 channel 8 and 9 not defined bug on s3
2021-12-14 20:10:47 +08:00
weitianhua
1383785aa1
Remove dummy defines of Classic BT
2021-10-29 14:21:26 +08:00
weitianhua
f4aad85f8b
Make Classic BT related document links only visible for ESP32
2021-10-29 14:21:12 +08:00
Li Shuai
e8188e5d8f
ci: replacing old header with new SPDX header style
2021-10-20 11:36:23 +08:00
Li Shuai
881e1b0fd5
deep sleep: add deep sleep support for esp32s3
2021-10-20 11:36:20 +08:00
alex.li
26d8b7ee17
Add HW external coexist api.
...
Simplify the external coex flow.
And replace gpio of driver interface with hal one.
2021-10-12 14:05:14 +08:00
Kevin (Lao Kaiyao)
a9faafee3c
Merge branch 'feature/touch_sensor_driver_support_for_esp32s3' into 'master'
...
driver(touch): support touch sensor for esp32s3 platform
Closes IDF-1784 and IDF-3302
See merge request espressif/esp-idf!14102
2021-10-12 05:50:58 +00:00
laokaiyao
f4705f8eb4
touch sensor: update copyright notice
2021-10-08 11:45:57 +08:00
laokaiyao
a1cadba191
touch_sensor: apply general check
2021-10-08 11:32:12 +08:00
fuzhibo
589646a31e
update touch with review advice
2021-10-08 10:39:46 +08:00
fuzhibo
057b9d61b5
driver(touch): support touch sensor for esp32s3 platform
2021-10-08 10:39:46 +08:00
morris
e09e39c94f
lcd: unify callback prototype
2021-10-02 14:23:31 +08:00
Jiang Jiang Jian
f5ae8b0533
Merge branch 'feature/ledc_use_rtc8m_or_xtal_lightsleep' into 'master'
...
support RTC8M and XTAL power domain in light sleep mode
Closes IDF-3419
See merge request espressif/esp-idf!15152
2021-09-27 04:02:29 +00:00
SalimTerryLi
bd89dcc683
RMT: add loop_autostop driver support for esp32s3
2021-09-24 15:24:45 +08:00
morris
20ef511d0a
Merge branch 'bugfix/fix_reg_name_charactor_err' into 'master'
...
bugfix: fix reg name character error
See merge request espressif/esp-idf!14169
2021-09-18 07:10:57 +00:00
Jiang Jiang Jian
3b48b7e663
Merge branch 'Fix/update_reset_reason' into 'master'
...
update reset reason for c3/s3/h2
See merge request espressif/esp-idf!14747
2021-09-18 07:03:50 +00:00
Wu Zheng Hui
85651b4791
efuse: remove DIS_RTC_RAM_BOOT efuse bit
2021-09-18 14:58:43 +08:00
Wu Zheng Hui
27241e8213
Merge branch 'bugfix/fix_efuse_err_address' into 'master'
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fix efuse err address in block0
See merge request espressif/esp-idf!14790
2021-09-17 02:17:09 +00:00
Wu Zheng Hui
1080e4f6a2
rename APB_CTRL ro SYS_CON
...
save
2021-09-16 20:57:57 +08:00
wuzhenghui
9c5d1c7fcf
fix s3 efuse err address in block0
2021-09-16 20:08:59 +08:00
wuzhenghui
8e1b8194f5
fix s2 efuse err address in block0
2021-09-16 20:08:59 +08:00
wuzhenghui
61b2c2d458
fix h2 efuse err address in block0
2021-09-16 20:08:59 +08:00
wuzhenghui
352ffbb78d
fix c3 efuse err address in block0
2021-09-16 20:08:59 +08:00
Li Shuai
b3e27403f3
esp_hw_support: keep external 40 MHz xtal related analog circuit power on during sleep
2021-09-16 14:46:21 +08:00
Li Shuai
58292a7d22
Power Management: add XTAL power domain to control whether external 40MHz xtal is powered down during sleep
2021-09-16 14:43:43 +08:00
Li Shuai
f5b39a7cde
esp_hw_support: No voltage drop during light sleep to ensure stable output clock of rtc8m oscillator
2021-09-16 14:40:46 +08:00
wuzhenghui
b2c028085a
fix reg name character error
2021-09-15 21:51:20 +08:00
Armando (Dou Yiwen)
13b63cd9d2
Merge branch 'feature/support_adc_calibration_s3' into 'master'
...
adc: support adc calibration on s3
Closes IDF-1950, IDF-3730, and IDF-3036
See merge request espressif/esp-idf!15031
2021-09-14 08:51:03 +00:00
morris
502e132e5d
Merge branch 'feature/fast_gpio_c3' into 'master'
...
fast gpio support on esp32-c3
Closes IDF-3783
See merge request espressif/esp-idf!14986
2021-09-14 06:09:34 +00:00
Song Ruo Jing
10b848327b
Merge branch 'feature/usb_phy' into 'master'
...
usb: Add usb_phy driver to support operations on USB PHY
Closes IDF-3574 and IDF-1882
See merge request espressif/esp-idf!14879
2021-09-14 06:06:06 +00:00
Armando
c45c6f52f1
adc: support adc efuse-based calibration on esp32s3
2021-09-14 11:42:50 +08:00
Li Shuai
e44ead5356
Power Management: add RTC8M power domain to control whether internal 8m oscillator is powered down during sleep
2021-09-13 17:36:54 +08:00
songruojing
1fcd639224
usb: Add usb_phy driver to support operations on USB PHY
2021-09-13 12:39:56 +08:00
morris
9d97d01679
Merge branch 'bugfix/mcpwm_cpp_reserved_word' into 'master'
...
bugfix/mcpwm: rename invalid keyword 'operator'
Closes IDFGH-5840
See merge request espressif/esp-idf!15159
2021-09-13 03:10:04 +00:00
Bao Hong De
7fc071e133
Merge branch 'feature/high_level_interrupt_in_bluetooth' into 'master'
...
Bluetooth: High level interrupt in bluetooth
See merge request espressif/esp-idf!11156
2021-09-10 09:50:39 +00:00
SalimTerryLi
d9f4ae02f1
mcpwm: rename keyword 'operator' which is not valid in cpp
...
Closes https://github.com/espressif/esp-idf/issues/7542
2021-09-10 12:41:42 +08:00
morris
25f723765e
Merge branch 'feature/lcd_driver_follow_up' into 'master'
...
lcd: add PM lock
Closes IDF-3631, IDF-3704, and IDF-3317
See merge request espressif/esp-idf!14880
2021-09-10 03:14:50 +00:00
baohongde
006a10b050
components/doc: Update doc about high-level interrupt
...
some bugfix.
2021-09-09 20:40:09 +08:00
SalimTerryLi
932d4d13f0
MCPWM/sync: expose API for configuring timer sync
...
removed example: mcpwm_basic_config
Closes https://github.com/espressif/esp-idf/issues/5429
Co-authored-by: wubowen <wubowen@espressif.com>
2021-09-09 17:33:37 +08:00
baohongde
6d63fe06fa
components/os: add config option to choose system check intterupt level.
2021-09-09 11:29:12 +08:00
baohongde
d1db2df316
components/bt: High level interrupt in bluetooth
...
components/os: Move ETS_T1_WDT_INUM, ETS_CACHEERR_INUM and ETS_DPORT_INUM to l5 interrupt
components/os: high level interrupt(5)
components/os: hli_api: meta queue: fix out of bounds access, check for overflow
components/os: hli: don't spill registers, instead save them to a separate region
Level 4 interrupt has a chance of preempting a window overflow or underflow exception.
Therefore it is not possible to use standard context save functions,
as the SP on entry to Level 4 interrupt may be invalid (e.g. in WindowUnderflow4).
Instead, mask window overflows and save the entire general purpose register file,
plus some of the special registers.
Then clear WindowStart, allowing the C handler to execute without spilling the old windows.
On exit from the interrupt handler, do everything in reverse.
components/bt: using high level interrupt in lc
components/os: Add DRAM_ATTR to avoid feature `Allow .bss segment placed in external memory`
components/bt: optimize code structure
components/os: Modify the BT assert process to adapt to coredump and HLI
components/os: Disable exception mode after saving special registers
To store some registers first, avoid stuck due to live lock after disabling exception mode
components/os: using dport instead of AHB in BT to fix live lock
components/bt: Fix hli queue send error
components/bt: Fix CI fail
# Conflicts:
# components/bt/CMakeLists.txt
# components/bt/component.mk
# components/bt/controller/bt.c
# components/bt/controller/lib
# components/esp_common/src/int_wdt.c
# components/esp_system/port/soc/esp32/dport_panic_highint_hdl.S
# components/soc/esp32/include/soc/soc.h
2021-09-09 11:29:06 +08:00
Cao Sen Miao
e85e9dc824
Merge branch 'feature/esp_flash_octal_api_support_xmic' into 'master'
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esp_flash: Add new octal flash chip support in new chip driver (for MXIC)
Closes IDF-2859
See merge request espressif/esp-idf!14185
2021-09-08 03:59:34 +00:00
morris
02e470bc50
lcd: add pm lock
2021-09-08 11:34:46 +08:00
Mahavir Jain
d504ca614c
Merge branch 'feature/clock_glitch_enable' into 'master'
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bootloader: Enable clock glitch detection
Closes IDF-2453, IDF-1720, IDFGH-5721, and IDFGH-5327
See merge request espressif/esp-idf!14868
2021-09-07 11:38:18 +00:00
Cao Sen Miao
6c0aebe279
esp_flash: add opi flash support in esp_flash chip driver, for MXIC
2021-09-07 14:44:40 +08:00
morris
6cec256a34
fast_gpio: driver support on esp32c3
2021-09-06 19:39:09 +08:00
Sachin Parekh
fd5a7df404
esp32h2: Replicated HMAC JTAG downstream enable mode implementation
2021-09-06 11:06:50 +05:30
Sachin Parekh
fa2707f1f3
hmac: Added Downstream JTAG enable mode for esp32c3 and esp32s3
...
If JTAG is disabled temporarily by burning SOFT_DIS_JTAG, it can be
re-enabled temporarily through esp_hmac_jtag_enable API
2021-09-06 11:06:50 +05:30
Jiang Jiang Jian
316988bd2d
Merge branch 'feature/support_esp32s3_cpu_tagmem_retention' into 'master'
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support esp32s3 cpu + tagmem retention
See merge request espressif/esp-idf!14579
2021-09-06 03:47:44 +00:00
Kevin (Lao Kaiyao)
2991eea97d
Merge branch 'refactor/i2s_driver' into 'master'
...
driver/i2s: bugfix and refactor for i2s
Closes IDF-3656 and IDF-3738
See merge request espressif/esp-idf!14704
2021-09-06 02:07:40 +00:00
laokaiyao
c5afd7ce34
i2s: fix write failure on ESP32 in 32bit slave mode
2021-09-03 17:36:44 +08:00
Sachin Parekh
bf1dde7233
bootloader: Enable clock glitch detection
...
Reset the device when clock glitch detected. Clock glitch detection is
only active in bootloader
2021-09-02 12:25:12 +05:30
laokaiyao
b26da6f115
driver/i2s: refactor for i2s driver layer
2021-09-02 14:33:36 +08:00
Sachin Billore
f80d6f8c21
Digital Signature support for S3
...
Closes IDF-1791
2021-09-02 11:59:24 +05:30
Marius Vikhammer
bdf3a8ff29
Merge branch 'feature/xtwdt' into 'master'
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WDT: Add support for XTAL32K Watchdog timer
Closes IDF-2575
See merge request espressif/esp-idf!15000
2021-09-02 02:44:47 +00:00
Marius Vikhammer
4869b3cd4a
WDT: Add support for XTAL32K Watchdog timer
2021-09-02 09:09:00 +08:00
Armando (Dou Yiwen)
5f38b766a8
Merge branch 'feature/support_120mhz_quad_psram_quad_flash' into 'master'
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mspi: support 120MHz clock freq on QSPI flash/psram on ESP32-S3
Closes IDF-3711
See merge request espressif/esp-idf!14849
2021-09-01 02:46:05 +00:00
Armando
a3dc625da6
mspi: support 120MHz Quad Flash and PSRAM on ESP32S3
2021-08-31 16:06:44 +08:00
morris
2e0ffbd543
Merge branch 'bugfix/fix-driver-8_16bit-reg-access' into 'master'
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bugfix/driver: fix and cleanup soc/ll stuffs
Closes IDF-3722
See merge request espressif/esp-idf!14829
2021-08-30 10:27:05 +00:00
Michael (XIAO Xufeng)
d910d42a8d
Merge branch 'bugfix/soc_interrupt_source' into 'master'
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soc: remove outdated description of interrupts on RISCV CPUs
See merge request espressif/esp-idf!14974
2021-08-30 09:38:24 +00:00
Michael (XIAO Xufeng)
59cedcb748
soc: remove outdated description of interrupts on RISCV CPUs
2021-08-30 17:38:16 +08:00
SalimTerryLi
892f5e7df3
timer_group: fix wrongly generated reg header that introduced in 443845fd54
2021-08-30 13:51:25 +08:00
SalimTerryLi
874a720286
soc/ll: workaround compiler bug that generate 8/16 bits inst instead of 32 bits one
...
update all struct headers to be more "standardized":
- bit fields are properly wrapped with struct
- bitwidth sum should be 32 within same struct, so that it's correctly padded with reserved bits
- bit field should be uint32_t
- typedef volatile struct xxx{} yyy;: xxx must exists. refer: https://github.com/espressif/esp-idf/pull/3199
added helper macros to force peripheral registers being accessed in 32 bitwidth
added a check script into ci
2021-08-30 13:50:58 +08:00