esp-idf

mirror of https://github.com/espressif/esp-idf.git synced 2024-09-20 10:46:02 -04:00

History

Sachin Parekh bf1dde7233 bootloader: Enable clock glitch detection Reset the device when clock glitch detected. Clock glitch detection is only active in bootloader		2021-09-02 12:25:12 +05:30
..
esp32	soc/ll: workaround compiler bug that generate 8/16 bits inst instead of 32 bits one	2021-08-30 13:50:58 +08:00
esp32c3	Merge branch 'feature/xtwdt' into 'master'	2021-09-02 02:44:47 +00:00
esp32h2	Merge branch 'bugfix/fix-driver-8_16bit-reg-access' into 'master'	2021-08-30 10:27:05 +00:00
esp32s2	Merge branch 'feature/xtwdt' into 'master'	2021-09-02 02:44:47 +00:00
esp32s3	bootloader: Enable clock glitch detection	2021-09-02 12:25:12 +05:30
include/soc	soc/ll: workaround compiler bug that generate 8/16 bits inst instead of 32 bits one	2021-08-30 13:50:58 +08:00
CMakeLists.txt	Merge branch 'refactor/move_ldscript_to_soc' into 'master'	2021-07-23 11:54:56 +00:00
component.mk	soc: move peripheral linker scripts out of target component	2021-07-22 12:55:01 +08:00
linker.lf	soc: move implementations to esp_hw_support	2020-10-28 22:38:50 +08:00
lldesc.c	crypto: initial S3 Beta 3 bringup and testing for SHA/AES/RSA/flash enc	2021-05-18 11:25:41 +08:00
README.md	soc: descriptive part occupy whole component	2020-10-28 07:21:29 +08:00
soc_include_legacy_warn.c	Whitespace: Automated whitespace fixes (large commit)	2020-11-11 07:36:35 +00:00

README.md

`soc`

The soc component provides hardware description for targets supported by ESP-IDF.

- `xxx_reg.h`   - defines registers related to the hardware
- `xxx_struct.h` - hardware description in C `struct`
- `xxx_channel.h` - definitions for hardware with multiple channels
- `xxx_caps.h`  - features/capabilities of the hardware
- `xxx_pins.h`  - pin definitions
- `xxx_periph.h/*.c`  - includes all headers related to a peripheral; declaration and definition of IO mapping for that hardware