Commit Graph

961 Commits

Author SHA1 Message Date
morris
a65db35c13 Merge branch 'bugfix/bod_threshold_v5.2' into 'release/v5.2'
fix(bod): Fix BOD threshold value on ESP32H2(backport v5.2)

See merge request espressif/esp-idf!28622
2024-02-18 11:00:47 +08:00
Mahavir Jain
4c95aa445d fix(ota): additional checks for secure version in anti-rollback case
Some additional checks related to secure version of the application in
anti-rollback case have been added to avoid any attempts to boot lower
security version but valid application (e.g., passive partition image).

- Read secure_version under sha256 protection

- First check has been added in the bootloader to ensure correct secure
  version after application verification and loading stage. This check
  happens before setting up the flash cache mapping and handling over
  the final control to application. This check ensures that application
  was not swapped (e.g., to lower security version but valid image) just
  before the load stage in bootloader.

- Second check has been added in the application startup code to ensure
  that currently booting app has higher security version than the one
  programmed in the eFuse for anti-rollback scenario. This will ensure
  that only the legit application boots-up on the device for
  anti-rollback case.
2024-02-15 15:08:26 +02:00
Cao Sen Miao
6e31efce7f fix(bod): Fix BOD threshold value on ESP32H2 2024-01-23 09:57:59 +08:00
Xiao Xufeng
ea45c22a5c fix(rtc): fixed bbpll not calibrated from bootloader issue 2024-01-05 10:24:49 +08:00
Jiang Jiang Jian
499625be33 Merge branch 'save_twdt_to_coredump_v5.2' into 'release/v5.2'
feat(coredump): save twdt panic output to coredump elf file (v5.2)

See merge request espressif/esp-idf!27756
2023-12-11 14:51:33 +08:00
wuzhenghui
debcb50fd2
fix(esp_hw_support): re-initialize icg map in modem_clock_module_enable 2023-12-08 14:18:45 +08:00
Erhan Kurubas
d9d388dae7 feat(coredump): save twdt panic output to coredump elf file 2023-12-07 15:21:24 +01:00
Marius Vikhammer
8005821b09 Merge branch 'change/deprecate_legacy_xtensa_include_path_v5.2' into 'release/v5.2'
change(xtensa): Deprecate legacy include paths (v5.2)

See merge request espressif/esp-idf!27673
2023-12-07 17:27:38 +08:00
Jiang Jiang Jian
90d69b38b2 Merge branch 'bugfix/bod_reset_c6_h2_v5.2' into 'release/v5.2'
fix(bod): Reset brownout in configuration to avoid RF cannot be enabled again(backport v5.2)

See merge request espressif/esp-idf!27722
2023-12-07 10:51:29 +08:00
Cao Sen Miao
191466d824 fix(bod): Reset brownout in configuration to avoid RF cannot be enabled again 2023-12-06 19:46:44 +08:00
wuzhenghui
d07bd19ba6
fix(esp_system): fix uart clock disabled in driver cause esp_restart stuck 2023-12-06 10:36:48 +08:00
Darian Leung
555bd367e1 change(xtensa): Deprecate ".../xtensa_context.h" include path
This commit deprecates the "freertos/xtensa_context.h" and "xtensa/xtensa_context.h"
include paths. Users should use "xtensa_context.h" instead.

- Replace legacy include paths
- Removed some unnecessary includes of "xtensa_api.h"
- Add warning to compatibility header
2023-12-05 18:04:52 +08:00
Darian Leung
c2e134b775 change(xtensa): Deprecate ".../xtensa_api.h" include path
This commit deprecates the "freertos/xtensa_api.h" and "xtensa/xtensa_api.h"
include paths. Users should use "xtensa_api.h" instead.

- Replace legacy include paths
- Removed some unnecessary includes of "xtensa_api.h"
- Replaced some calls with "esp_cpu_..." equivalents
- Add warning to compatibility header
2023-12-05 18:04:52 +08:00
Marius Vikhammer
0818b1fca1 Merge branch 'feature/misc_core_build_tests_p4_v5.2' into 'release/v5.2'
ci(system): fixed and enabled misc system build tests (v5.2)

See merge request espressif/esp-idf!27476
2023-12-04 12:16:58 +08:00
Song Ruo Jing
55ed548cc6 fix(console): enable to select UART1 port for console output
This feature was only enabled for esp32, esp32s2, esp32s3 previously.
Now, enabling this feature for all targets.
2023-11-30 11:26:09 +08:00
Marius Vikhammer
faf6bc933e ci(system): fixed and enabled misc system build tests 2023-11-29 16:59:15 +08:00
Mahavir Jain
d3b4acf7a0 fix(esp32h2): program use_hardware_k efuse bit for ECDSA key purpose
In ESP32-H2, the ECDSA peripheral by default uses the TRNG (hardware)
generated k value but it can be overridden to software supplied k.
This can happen through by overriding the `ECDSA_SOFTWARE_SET_K` bit
in the configuration register. Even though the HAL API is not exposed
for this but still it could be achieved by direct register
programming. And for this scenario, if sufficiently random k is not
supplied by the software then it could posses a security risk.

In this change, we are unconditionally programming the efuse
`ESP_EFUSE_ECDSA_FORCE_USE_HARDWARE_K` bit during startup security
checks itself. Additionally, same is ensured in the `esp_efuse_write_key`
API as well. This always enforces the hardware k mode in the ECDSA
peripheral and ensures strongest possible security.
2023-11-17 07:13:53 +00:00
muhaidong
2b6feac67c change(wifi): update esp_coexist_internal.h and esp_modem_wrapper.h 2023-11-16 11:03:44 +08:00
wuzhenghui
3207599b6d fix(esp_system): increase esp32h2 slow clock calibration timeout watchdog threshold 2023-11-03 19:08:28 +08:00
Djordje Nedic
e32bdb66e3 fix: Fix ESP32-P4 lp_reserved_seg origin
Apparently, this part of the linker script was copied from elsewhere
and the origin was not corrected.
2023-10-25 08:09:33 +02:00
Marius Vikhammer
22091c8744 feat(wdt): add multicore support for WDTs on RISCV 2023-10-23 18:26:08 +08:00
Omar Chebib
a8b1475fe7 feat(riscv): implement coprocessors save area and FPU support
This commit mainly targets the ESP32-P4. It adds supports for coprocessors on
RISC-V based targets. The coprocessor save area, describing the used coprocessors
is stored at the end of the stack of each task (highest address) whereas each
coprocessor save area is allocated at the beginning of the task (lowest address).
The context of each coprocessor is saved lazily, by the task that want to use it.
2023-10-23 11:10:28 +08:00
Erhan Kurubas
6cd8030160 Merge branch 'check_debug_aware_config' into 'master'
fix(esp_hw_support): re-enable CONFIG_ESP_DEBUG_OCDAWARE functionality

Closes IDF-5881

See merge request espressif/esp-idf!26533
2023-10-21 15:20:26 +08:00
Erhan Kurubas
2d55270006 fix(esp_hw_support): re-enable CONFIG_ESP_DEBUG_OCDAWARE functionality 2023-10-18 08:48:45 +02:00
Erhan Kurubas
bde8ff8b67 feat(panic): send pseudo exccause to openocd 2023-10-17 12:34:24 +02:00
Xu Xiao
ed9f9021cc Merge branch 'revert_tcpip_task_priority_macro' into 'master'
revert(lwip): Revert changes to LWIP task priority macro from MR 25020

See merge request espressif/esp-idf!26420
2023-10-17 13:28:19 +08:00
Jiang Jiang Jian
59417a4049 Merge branch 'feature/free_bt_memory' into 'master'
feat(bt): Frees BLE memory when no longer in use

See merge request espressif/esp-idf!22795
2023-10-12 18:35:15 +08:00
xuxiao
31bb66813a revert(lwip): Revert changes to LWIP task priority macro from MR 25020 2023-10-11 17:54:27 +08:00
KonstantinKondrashov
a2802ef121 feat(tools): Enables unicore_bootloader test for ESP32P4 2023-10-10 11:11:32 +00:00
Alexey Lapshin
2585e53d54 Merge branch 'feature/update-toolchain-to-esp-13.1.0_new_newlib' into 'master'
Update toolchain to esp-13.2.0_20230919

Closes GCC-250, GCC-322, GCC-324, GCC-327, GCC-330, and IDF-8287

See merge request espressif/esp-idf!25073
2023-10-10 08:18:33 +08:00
Gao Xu
d52040a86d Merge branch 'esp32p4/add_uart_support' into 'master'
UART: Add uart support for ESP32P4

Closes IDF-6511 and IDF-7506

See merge request espressif/esp-idf!25388
2023-10-09 18:11:10 +08:00
Alexey Lapshin
a43c509d4b change(newlib): update newlib according to new internal structures 2023-10-09 12:13:02 +04:00
Alexey Lapshin
76dfcac597 fix(esp_system): fix gcc 13.1.0 warnings 2023-10-09 12:13:02 +04:00
Alexey Lapshin
295f9cdd56 fix(esp_system): add no_sanitize_undefined for init functions
Something wrong with -Og optimization. It started to fail without
reason.
2023-10-09 12:13:02 +04:00
zhaokeke
a39869416c feat(bt): Frees BLE memory when no longer in use
It will free libble.a & libbt all txt, data and bss segment memory.
This memory is combined into one large memory and put into the heap
pool.
2023-10-08 16:08:47 +08:00
gaoxu
bc2a6bd730 feat(uart): spilt LP and HP uart set_baudrate function 2023-10-08 10:10:02 +08:00
gaoxu
4f24f805cc feat(uart): add LP-UART GPIO support 2023-10-08 10:10:02 +08:00
gaoxu
4541ad134d feat(uart): add RCC atomic block to uart/lp-uart peripheral 2023-10-08 10:10:02 +08:00
Darian Leung
9968a48c36 refactor(freertos/task_snapshot): Make task snapshot private
Task snapshot API were never intended to be called from user code. This commit
makes task snapshot a private API thus moves `#include "freertos/task_snapshot.h"`
to `#include "esp_private/freertos_debug.h"`.

Task snapshot related Kconfig options have also been hidden.

Note: Added 'freertos_common' mapping to ldgen mapping execptions lists due to
inlining of 'freertos_debug.h' functions.
2023-10-07 13:14:55 +08:00
Konstantin Kondrashov
3166056078 Merge branch 'bugfix/log_mixing_at_startup' into 'master'
fix(esp_system): Fixes mixing logs when two cores use esp_rom_printf

Closes IDF-7891

See merge request espressif/esp-idf!25996
2023-10-05 21:06:14 +08:00
KonstantinKondrashov
28b8a5d9b4 fix(esp_system): Fix mixing logs, remove early info logs for 2nd CPU
Fixes mixing logs when two cores use esp_rom_printf
2023-10-02 12:50:40 +00:00
Mahavir Jain
be2c591129 fix(startup): flip the security configuration check order
For cases where the bootloader is not enabled with the security features
ends up receiving an incorrect application with flash encryption enabled
should not really program any security efuses.

In the startup sequence, we first used to program the ROM DL mode
configuration but now we check for the flash encryption related checks
first. If the flash encryption related checks finds that flash
encryption is not enabled on the device then it aborts the boot process.
This is the case with `CONFIG_SECURE_FLASH_CHECK_ENC_EN_IN_APP` enabled.

This would at-least ensure that accidental program of security enabled
application does not really program any ROM DL mode efuses and there is
chance to recover the device.
2023-09-29 03:44:00 +00:00
Armando (Dou Yiwen)
b58a2ea6a6 Merge branch 'feature/support_cache_p4' into 'master'
cache: support cache driver on esp32p4

Closes IDF-7516

See merge request espressif/esp-idf!25490
2023-09-25 15:21:46 +08:00
Armando
ec27891af6 change(cache): swap cache hal arg 'type' and 'level' 2023-09-22 14:19:41 +08:00
Armando
ea38a2e9a4 feat(cache): support cache driver on esp32p4 2023-09-22 14:19:41 +08:00
Chen Yudong
2e11919f70 fix(ci): change build-test-rules files folder 2023-09-20 19:17:06 +08:00
KonstantinKondrashov
7a878bdc50 feat(esp_system): Support IPC_ISR for ESP32P4 2023-09-15 23:38:12 +08:00
Marius Vikhammer
e58becec0a feat(esp-system): support reset reasons on P4 2023-09-15 08:11:34 +08:00
Wu Zheng Hui
2319f2a59e Merge branch 'bugfix/suppress_compiler_warning_if_silent_reboot_is_enabled' into 'master'
fix(esp_system): suppress compiler warning if ESP_SYSTEM_PANIC_SILENT_REBOOT is enabled

See merge request espressif/esp-idf!25909
2023-09-13 10:45:31 +08:00
Marius Vikhammer
573404b328 Merge branch 'bugfix/use_xtal_for_c3_wdt' into 'master'
fix(wdt): changed ESP32-C3 WDT to use XTAL as clock

Closes IDF-6729

See merge request espressif/esp-idf!25867
2023-09-13 10:44:38 +08:00