alex/esp-idf
alex/esp-idf
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26,174 Commits 20 Branches 148 Tags 384 MiB
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Commit Graph

1989 Commits

Author SHA1 Message Date
laokaiyao
8ef9fd4623 dac: optimize the dma stratege 2022-10-25 17:14:59 +08:00
laokaiyao
f9f9a09dfb dac: update unit-test docs and examples for driver-NG 2022-10-25 17:00:41 +08:00
laokaiyao
351a18415c dac: driver-ng framework 2022-10-25 17:00:41 +08:00
Cao Sen Miao
9777c9d5b1 dac: refactor to new api on esp32s2 2022-10-25 17:00:41 +08:00
Cao Sen Miao
9e4ff3d374 dac_dma: Support DAC_DMA on esp32s2 2022-10-25 17:00:41 +08:00
morris
4176cb68de twai: remove deprecated code and add hint 
name "CAN" has been deprecated for a long time, this commit just remove
it from the code base.

Please use "TWAI" driver instead.
 2022-10-22 18:20:07 +08:00
laokaiyao
cf528deeb1 test: add a script for supporting multi-dev and multi-stage case 2022-10-20 18:35:51 +08:00
Xue Yun Fei
c941691711 Merge branch 'Bugfix/increase_ping_task_stack_size' into 'master' 
lwip:bugfix for increase ping task stack size

Closes WIFI-4903

See merge request espressif/esp-idf!20664
 2022-10-19 19:19:25 +08:00
Song Ruo Jing
c8c9ce0a8b Merge branch 'feature/esp32c6_gpio_support' into 'master' 
gpio: bringup driver on esp32c6 FPGA

Closes IDF-5870 and IDF-5937

See merge request espressif/esp-idf!20364
 2022-10-19 18:44:30 +08:00
xueyunfei
8c17b04cef lwip:bugfix for increase ping task stack size 2022-10-19 10:49:13 +08:00
morris
ab20e3e5d5 Merge branch 'bugfix/2nd_bootloader_uart1_baudrate_issues' into 'master' 
esp_rom: fix 2nd bootloader custom uart1 baudrate issue

See merge request espressif/esp-idf!20630
 2022-10-18 17:18:08 +08:00
Song Ruo Jing
6d24e8bcf4 gpio: Add support for esp32c6 2022-10-18 12:38:36 +08:00
Jiang Jiang Jian
e08e2f071f Merge branch 'bugfix/fix_part_of_modem_not_reset_when_power_on' into 'master' 
Coexistence: fix part of modem module not reset when power up

See merge request espressif/esp-idf!19849
 2022-10-18 11:13:10 +08:00
jiangguangming
7daadc5a92 esp_rom: fix 2nd bootloader custom uart1 baudrate issue 2022-10-18 11:04:01 +08:00
David Čermák
950800be9e Merge branch 'update/lwip_sntp_comment_i32_timestamp' into 'master' 
lwip: Document 32 bit NTP timestamp converstion to 64b time_t

Closes IDF-5956 and IDF-5592

See merge request espressif/esp-idf!20283
 2022-10-12 20:06:42 +08:00
Ivan Grokhotkov
5f6f4ef3ac Merge branch 'bugfix/build_rules_check_ignore' into 'master' 
ci: ignore build_test_app when checking build_test_rules

See merge request espressif/esp-idf!20517
 2022-10-10 22:28:53 +08:00
Fu Hanxi
2d27e09b4f ci: make bringup process for check_build_test_rules.py more friendly 2022-10-10 16:58:11 +08:00
Fu Hanxi
27e199605a ci: remove unused rules 2022-10-10 16:58:11 +08:00
Marius Vikhammer
6f5beb70e4 ci: ignore build_test_app when checking build_test_rules 2022-10-10 16:23:03 +08:00
Alexey Lapshin
e6f7b1a3a0 tools: cmake: check tool supported version with idf_tools.py 2022-10-03 19:01:32 +04:00
Michael (XIAO Xufeng)
9bc18ba480 Merge branch 'feat/sdio_slave_disable_hs' into 'master' 
sdio_slave: allow disabling highspeed mode

Closes IDF-5994

See merge request espressif/esp-idf!20312
 2022-10-01 01:52:47 +08:00
Martin Gaňo
41742c2369 fatfs: enabled reading sector size and sectors count from boot sector in rawflash 2022-09-29 16:16:36 +02:00
Jakob Hasse
f33ac0a037 Merge branch 'feature/freertos_sim' into 'master' 
FreeRTOS Single Core Simulator PoC

See merge request espressif/esp-idf!19256
 2022-09-29 20:03:23 +08:00
Jakob Hasse
bfbbd9d790 feat(freertos): Added FreeRTOS POSIX/Linux Simulator 
* Added port layer from the FreeRTOS POSIX port, added
  additional port code for ESP-IDF.
* Created another hello world example using that POSIX
  port in tools/test_apps.
* Removed old linux app
 2022-09-27 16:23:54 +02:00
Michael (XIAO Xufeng)
507864c4f1 sdio_slave: allow disabling highspeed mode 2022-09-27 18:38:35 +08:00
wuzhenghui
fca7d70e05 esp32c6: add minimal ci support 
- enable build_template_app
- enable check public headers
- enable g0 components dependency check
 2022-09-26 20:32:13 +08:00
jingli
cce2af9193 wifi/bt: fix part of modem module not reset when power up 2022-09-22 11:45:20 +08:00
David Cermak
9e31c5077d lwip: Document 32 bit NTP timestamp converstion to 64b time_t 2022-09-21 17:38:37 +02:00
Euripedes Rocha
736424c366 [MQTT] Simplifies MQTT CMakeLists file 
- Uses mocks from tools instead of creating them.
- Move host based definition to test code.
 2022-09-19 09:11:15 +00:00
Darian
03b25c6a0d Merge branch 'bugfix/riscv_interrupt_function_naming' into 'master' 
riscv: Fix interrupt function naming and redundancy

See merge request espressif/esp-idf!19251
 2022-09-17 00:33:33 +08:00
Jiang Jiang Jian
40d13002d0 Merge branch 'ci/optimize_ats_ci_flow' into 'master' 
CI: optimize ATS ci flow

See merge request espressif/esp-idf!20131
 2022-09-16 20:34:03 +08:00
Darian Leung
0c97fbd5ba riscv: Remove redundant riscv_interrupts.h header 
This commit removes the riscv_interrupts.h header is it has become redundant. The previously
exposed API has been handled as follows:

- "riscv_interrupt_enable()" and "riscv_interrupt_disable()" have been removed. These functions
  were declarations only and never had any implementation.
- "riscv_global_interrupts_enable()" and "riscv_global_interrupts_disable()" renamed to
  "rv_utils_intr_global_enable()" and "rv_utils_intr_global_disable()" respectively and now
  placed in rv_utils.h
 2022-09-16 16:45:43 +08:00
Omar Chebib
53c7dd4efc WDT: implement interrupt wdt and task wdt for ESP32-C2 
ESP32-C2 has a single group timer, thus it will use it for the interrupt watchdog,
which is more critical than the task watchdog. The latter is implement in
software thanks to the `esp_timer`component.
 2022-09-15 14:37:59 +08:00
Chen Yudong
bfa96bc597 CI: optimize ATS ci flow 2022-09-14 13:39:12 +08:00
Wan Lei
f7748beb4d Merge branch 'bugfix/spi2_add_device_cs_more_than_3' into 'master' 
spi_master: fix error when use `spi_bus_add_device` add more than 3 devices

Closes IDFGH-7288

See merge request espressif/esp-idf!19798
 2022-09-14 10:33:37 +08:00
Aditya Patwardhan
ce32183749 tcp_transport: Add support of setting the common name fot the TLS 
context
 2022-09-13 05:31:43 +00:00
wanlei
96aa2792f8 spi_master:fix error when use spi_bus_add_device more than 3 device 
update gpio_sig at `spics_out` array in each spi_periph.c of chips later than s2
then `spi_bus_add_device` can correctly distribute gpio_signals for cs_signal

Closes https://github.com/espressif/esp-idf/issues/8876
 2022-09-05 12:10:22 +08:00
Fu Hanxi
7d9dd41cbf ci: run build check for all apps when soc header changed 2022-09-05 11:17:02 +08:00
Fu Hanxi
74619b04e1 ci: add esp32c6 target 2022-09-05 10:30:04 +08:00
simon.chupin
92ef2a4c83 Tools: Add unit tests for idf.py hints 2022-09-01 17:09:46 +02:00
wuzhenghui
1d299a8976 esp32c6: add hal support 2022-09-01 12:37:51 +08:00
songruojing
9d515185d0 esp32c6: clean up existing soc files and header file inclusion in IDF to be compatible with the new chip 2022-09-01 12:28:06 +08:00
Ivan Grokhotkov
4d9018e925 Merge branch 'feature/ulp_cmake_cleanups' into 'master' 
ulp: CMake and python cleanups

See merge request espressif/esp-idf!19817
 2022-08-31 17:59:05 +08:00
wuzhenghui
c31aaeda2a ll: add reset interface to rtc_cntl_ll 2022-08-31 01:59:36 +00:00
Aditya Patwardhan
6c7fd1edc0 mqtt/ssl_ds: Remove unwanted references to configure_ds.py, Also updated 
the DS documentation
 2022-08-30 10:54:15 +05:30
Ivan Grokhotkov
2916bf9b6c
ulp: esp32ulp_mapgen: remove the special case for RISC-V, cleanup 
There are multiple changes in this commit:

1. Unify the RISC-V and ULP-FSM code paths in esp32ulp_mapgen.py.
   It seems that these were originally introduced because `nm` output
   for the RISC-V case contained symbol sizes, while for the ULP-FSM
   no symbol sizes were reported. This makes sense, because the
   ULP-FSM object files are produced from assembly source, symbol
   sizes have to be added manually using the .size directive.
   In the case of RISC-V, the object files are built from C sources
   and the sizes are automatically added by the compiler.

   Now 'posix' output format is used for both RISC-V and ULP-FSM.

2. Move BASE_ADDR out of esp32ulp_mapgen.py. This now has to be passed
   from CMake, which should make it easier to modify if a new chip
   with a different RTC RAM base address is added.

3. Add C++ guards to the generated header file.

4. Switch from optparse to argparse for similarity with other IDF
   tools.

5. Add type annotations.
 2022-08-30 02:34:28 +02:00
Fu Hanxi
4f3610f957 Merge branch 'ci/upload_elf_map_to_minio' into 'master' 
ci: upload elf map file to s3 server to reduce artifacts size

Closes IDFCI-1385

See merge request espressif/esp-idf!19756
 2022-08-30 01:06:11 +08:00
Fu Hanxi
2484e00a94 ci: move LDGEN_CHECK_MAPPING to configure_ci_environment.sh 2022-08-29 16:57:31 +08:00
morris
b82d6ce928 md5_hash: fix copyright checker 2022-08-29 15:40:37 +08:00
wuzhenghui
fbeb6195c2 esp_rom: add esp32c6 header files 2022-08-29 15:40:37 +08:00