Cao Sen Miao
4df78f9cff
fix(temperature_sensor): Cannot switch the range smmothly on esp32h2
2024-02-21 18:51:29 +08:00
Jiang Jiang Jian
3c7c5829b7
Merge branch 'h2_auto_dbias_master_hsq_v5.2' into 'release/v5.2'
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ESP32H2: Active & sleep dbias get from efuse to fix the voltage (v5.2)
See merge request espressif/esp-idf!28714
2024-02-21 10:49:16 +08:00
morris
81dc597d1f
Merge branch 'bugfix/fix_incorrect_regbase_name_of_i2s_v5.2' into 'release/v5.2'
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fix(i2s): fixed incorrect reg base name on C3 (v5.2)
See merge request espressif/esp-idf!28629
2024-02-18 11:29:42 +08:00
Mahavir Jain
e173895618
fix(soc): change debug addr range to CPU subsystem range
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For C6/H2/P4/C5, there is no SoC specific debug range. Instead the same
address range is part of CPU Subsystem range which contains debug mode
specific code and interrupt config registers (CLINT, PLIC etc.).
For now the PMP entry is provided with RWX permission for both machine
and user mode but we can save this entry and allow the access to only
machine mode for this range.
For P4/C5 case, this PMP entry can have RW permission as the debug mode
specific code is not present in this memory range.
2024-01-29 13:57:04 +08:00
laokaiyao
66d7410051
fix(i2s): fixed incorrect reg base name on C3
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Closes https://github.com/espressif/esp-idf/issues/12643
2024-01-26 18:44:38 +08:00
KonstantinKondrashov
bc6072c754
feat(efuse): Adds new efuse for esp32h2
2024-01-26 11:36:56 +08:00
Roshan Bangar
962b105be5
fix(nimble): Added periodic_adv_enh soc_caps for c2, h2
2023-12-26 10:09:12 +05:30
Jiang Jiang Jian
99d10ca3d2
Merge branch 'change/change_regdma_power_issue_macro_v5.2' into 'release/v5.2'
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change(pm): change macro SOC_PM_RETENTION_HAS_REGDMA_POWER_BUG (backport v5.2)
See merge request espressif/esp-idf!27992
2023-12-25 20:38:48 +08:00
Xu Si Yu
6b8740ae8d
feat(ieee802154): add tx/rx report for IEEE802.15.4 debug
2023-12-21 15:01:44 +08:00
Lou Tianhao
7b5799830c
change(pm): change macro SOC_PM_RETENTION_HAS_REGDMA_POWER_BUG
2023-12-19 11:52:25 +08:00
Jiang Jiang Jian
6a34106488
Merge branch 'contrib/github_pr_12559_v5.2' into 'release/v5.2'
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fix(spi): correct macro REG_SPI_BASE(i) for all targets (GitHub PR) (v5.2)
See merge request espressif/esp-idf!27708
2023-12-11 16:01:48 +08:00
morris
61bd19b446
Merge branch 'bugfix/fix_adc_cali_error_after_light_sleep_wake_on_h2_v5.2' into 'release/v5.2'
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adc: fix calibration error when waking up from light sleep on H2 and enable test (v5.2)
See merge request espressif/esp-idf!27602
2023-12-07 14:29:55 +08:00
wanlei
572a66b62e
fix(spi): correct some signals and dummy bits docs
2023-12-06 16:05:36 +08:00
TD-er
a4bfa19ebd
fix(spi): Correct REG_SPI_BASE(i) macro for all targets
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The existing formula can never match these registers.
Closes https://github.com/espressif/esp-idf/pull/12559
Closes https://github.com/espressif/esp-idf/pull/12562
2023-12-06 14:44:26 +08:00
harshal.patil
a168fde297
fix(soc/esp32h2): Fix llperi_rng_data field discrepancy
2023-12-05 21:08:33 +05:30
gaoxu
44f266693a
fix(adc): restore cali registers after light sleep wake up on H2 and enable test
2023-12-04 12:03:49 +08:00
Song Ruo Jing
55ed548cc6
fix(console): enable to select UART1 port for console output
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This feature was only enabled for esp32, esp32s2, esp32s3 previously.
Now, enabling this feature for all targets.
2023-11-30 11:26:09 +08:00
Mahavir Jain
d3b4acf7a0
fix(esp32h2): program use_hardware_k efuse bit for ECDSA key purpose
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In ESP32-H2, the ECDSA peripheral by default uses the TRNG (hardware)
generated k value but it can be overridden to software supplied k.
This can happen through by overriding the `ECDSA_SOFTWARE_SET_K` bit
in the configuration register. Even though the HAL API is not exposed
for this but still it could be achieved by direct register
programming. And for this scenario, if sufficiently random k is not
supplied by the software then it could posses a security risk.
In this change, we are unconditionally programming the efuse
`ESP_EFUSE_ECDSA_FORCE_USE_HARDWARE_K` bit during startup security
checks itself. Additionally, same is ensured in the `esp_efuse_write_key`
API as well. This always enforces the hardware k mode in the ECDSA
peripheral and ensures strongest possible security.
2023-11-17 07:13:53 +00:00
wuzhenghui
4379d26f65
change(soc): rename SOC_CPU_WATCHPOINT_SIZE to SOC_CPU_WATCHPOINT_MAX_REGION_SIZE
2023-11-16 20:23:57 +08:00
gaoxu
7f3221aa09
feat(adc_cali): Add ADC calibration support for ESP32H2
2023-11-06 10:57:36 +08:00
morris
80997d5860
fix(i2c): read write FIFO memory by volatile
2023-10-30 10:34:43 +08:00
Konstantin Kondrashov
a304cc230e
Merge branch 'feature/esp32h2_adds_adc_calib_efuses' into 'master'
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feat(efuse): Adds efuse ADC calibration data for ESP32H2
See merge request espressif/esp-idf!26305
2023-10-25 15:58:24 +08:00
Cao Sen Miao
8d639492f2
feat(i2c_slave): Add new implementation and API for I2C slave
2023-10-24 18:44:49 +08:00
wuzhenghui
6a436286dc
feat(esp_hw_support): add api to gpio driver to support output internal clock on GPIO
2023-10-20 14:35:26 +08:00
Mahavir Jain
2407813a67
Merge branch 'feature/update_esp32c6-h2_apm_api' into 'master'
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apm: updated APM HAL/LL APIs.
See merge request espressif/esp-idf!26368
2023-10-18 12:26:38 +08:00
Sachin Billore
c106f5caf6
apm: updated APM HAL/LL APIs.
2023-10-17 18:20:36 +05:30
Armando
17063b51e0
feat(soc): added flash operation range macros in ext_mem_defs.h
2023-10-16 17:19:04 +08:00
Michael (XIAO Xufeng)
2308292ca3
Merge branch 'bugfix/revert_pvt' into 'master'
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Revert "feat(volt): chip auto adjust volt for esp32c6 & esp32h2"
See merge request espressif/esp-idf!26425
2023-10-16 12:53:07 +08:00
Song Ruo Jing
d73bf72885
Merge branch 'feature/gpio_dump_io_info' into 'master'
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feat(gpio): add a dump API to dump IO configurations
Closes IDFGH-10987
See merge request espressif/esp-idf!26158
2023-10-13 22:35:59 +08:00
C.S.M
e19324b4fa
Merge branch 'bugfix/h2_i2c1_no_signal' into 'master'
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fix(i2c): I2C port 1 doesn't work on esp32h2
See merge request espressif/esp-idf!26416
2023-10-13 15:01:34 +08:00
Song Ruo Jing
321f628ff5
feat(gpio): add a dump API to dump IO configurations
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Closes https://github.com/espressif/esp-idf/issues/12176
2023-10-12 17:34:20 +08:00
zlq
9c2d470465
feat(bootloader): adjust dbias of bootloader, change clock of H2 to 64
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MHz
2023-10-12 14:51:54 +08:00
Xiao Xufeng
28ba080c5e
Revert "feat(volt): chip auto adjust volt for esp32c6 & esp32h2"
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This reverts commit b221f87e00
.
2023-10-12 14:51:54 +08:00
Cao Sen Miao
d7e543583b
fix(i2c): I2C port 1 doesn't work on esp32h2
2023-10-11 17:06:39 +08:00
morris
66497af276
feat(hal): enable hal host test
2023-10-11 11:23:24 +08:00
KonstantinKondrashov
071d1cf865
feat(efuse): Adds efuse ADC calibration data for ESP32H2
2023-10-04 16:00:01 +08:00
wuzhenghui
c8083b07bf
feat(modem_clock): separate management of modem_adc_common_fe clock and modem_private_fe
2023-09-28 17:41:42 +00:00
Kevin (Lao Kaiyao)
4c6f4b39f1
Merge branch 'feature/support_i2s_on_p4' into 'master'
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feat(i2s): support i2s on esp32p4
Closes IDF-6508
See merge request espressif/esp-idf!24280
2023-09-29 00:50:04 +08:00
laokaiyao
0b0f25c30d
feat(i2s): supported getting the tx sync count and specify interrupt flags
2023-09-28 15:03:27 +08:00
laokaiyao
cf889f3c6d
feat(i2s): support i2s on esp32p4
2023-09-28 15:03:27 +08:00
zlq
b221f87e00
feat(volt): chip auto adjust volt for esp32c6 & esp32h2
2023-09-28 05:55:42 +00:00
Kevin (Lao Kaiyao)
9a239b8367
Merge branch 'feature/support_analog_comparator_on_p4' into 'master'
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feat(ana_cmpr): supported analog comparator on esp32p4
Closes IDF-7479
See merge request espressif/esp-idf!24873
2023-09-27 04:24:09 +08:00
Jiang Jiang Jian
17ae394fd1
Merge branch 'feature/update_esp32h2_sleep_logic' into 'master'
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feat(pm): remove SOC_PM_RETENTION_HAS_CLOCK_BUG for esp32h2
See merge request espressif/esp-idf!26081
2023-09-26 16:11:25 +08:00
laokaiyao
ff7a11e539
feat(ana_cmpr): supported etm in analog comparator example
2023-09-25 19:57:34 +08:00
laokaiyao
a989ce4ab1
feat(ana_cmpr): supported analog comparator on esp32p4
2023-09-25 19:57:34 +08:00
Ivan Grokhotkov
2ac972e2c7
fix(soc): update SOC_IROM_MASK_HIGH for esp32, c6, h2 for consistency
2023-09-22 16:13:41 +02:00
cjin
40996f804a
change: remove has clock bug macro for esp32h2
2023-09-21 11:31:53 +08:00
Planck (Lu Zeyu)
255d499884
fix(ll): fix cpp compile error
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Merges https://github.com/espressif/esp-idf/pull/12093
fix(ll): remove FLAG_ATTR macro
Such kind of operator overload will not work because C++ thinks such overload is ambiguous and it still prefer the built-in one which accepts and returns integer. Manually force type conversion seems to be unavoidable.
2023-09-14 14:48:12 +08:00
Konstantin Kondrashov
054d4943c5
Merge branch 'feature/esp32p4_update_systimer' into 'master'
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feat(esp_timer): Support systimer for ESP32P4
Closes IDF-7486 and IDF-7487
See merge request espressif/esp-idf!25688
2023-09-13 19:13:39 +08:00
Konstantin Kondrashov
cbdb799b6f
feat(esp_timer): Support systimer for ESP32P4
2023-09-13 19:13:38 +08:00