Commit Graph

20 Commits

Author SHA1 Message Date
Zhang Zhao Xiang
f48ecb8613 Add a new i2s feature to expand the original i2s width 2018-03-22 18:52:55 +08:00
Angus Gratton
63ddae5087 Merge branch 'bugfix/i2s_driver' into 'master'
i2s: add support fixed_mclk configuration

See merge request idf/esp-idf!1600
2018-02-22 12:03:26 +08:00
Tuan PM
7cda34c626 i2s: add support fixed_mclk configuration 2018-02-22 09:00:23 +07:00
h3ndrik
dcc466a673 i2s: fix type mismatch of intr_alloc_flags
Merges https://github.com/espressif/esp-idf/pull/1589
2018-02-16 16:20:12 +11:00
Wangjialin
451f69cc2e driver(i2s): fix broken i2s adc mode
1. Move i2s reset code from i2s_stop to i2s_start.
2. add RTC API to set sw mode for ADC
3. add description for adc_power_always_on()
4. add lock for i2s dma and RTC ADC functions.
5. add ADC read task in example

reported from bbs:  https://esp32.com/viewtopic.php?f=13&t=3490&p=17522#p17522
reported from github: https://github.com/espressif/esp-idf/issues/1333
2018-02-07 17:17:20 +08:00
Ivan Grokhotkov
f039aac1e5 Merge branch 'bugfix/i2s_bck_polariy' into 'master'
bugfix(i2s): fix bck polarity issue when using pll clock.

See merge request !1428
2017-10-22 12:36:27 +08:00
Ivan Grokhotkov
b6f37bda97 Merge branch 'feature/i2s_built_in_adc' into 'master'
feature(I2S-ADC): add ADC mode for I2S.

See merge request !1077
2017-10-20 15:52:56 +08:00
Wangjialin
a84db78eb1 bugfix(i2s): fix bck polarity issue when using pll clock.
reported from github: https://github.com/espressif/esp-idf/issues/1119

Digital team think it is due to the decimal divider.
We can reset the i2s tx and rx when calling i2s_stop to avoid this.
2017-10-19 23:23:01 +08:00
Jiang Jiang Jian
8e47c355fa Merge branch 'feature/i2s_apll' into 'master'
driver/i2s: add support apll clock

See merge request !1115
2017-10-12 19:06:50 +08:00
Tuan PM
9d39881981 i2s: add support apll clock
using apll_param to setup APLL

new apll calculation method, much faster

validate freq calculation

Ensure that the i2s frequency is greater than the hardware limit

Add description of how to calculate apll clock, support apll for other 16-bits audio, check rev0 chip

correct space
2017-10-06 15:36:24 +07:00
Kewal Shah
379320bdb2 change to GPIO_IS_VALID_OUTPUT_GPIO for data out pin 2017-09-14 13:33:39 +08:00
Wangjialin
2fceec4d85 feature(I2S-ADC): add ADC mode for I2S.
1. Support built-in ADC for I2S.
2. Modify code of ADC, made no change to the original APIs.
3. Add APIs in I2S:
esp_err_t i2s_set_adc_mode(adc_unit_t adc_unit, adc1_channel_t adc_channel);
4. Add I2S ADC/DAC example code.
5. add old-fashion definition to make it more compatible
6. replase spi_flash_ APIs with esp_partition_ APIs
7. add example of generating audio table from wav
8. change example sound
2017-09-14 13:24:08 +08:00
Ivan Grokhotkov
1cfe96b1d7 Merge branch 'bugfix/i2s_dac_channel' into 'master'
fix(i2s_dac): fix the disable function which only disables DAC_CHANNEL_1.

See merge request !1169
2017-08-31 10:45:30 +08:00
Quentin Thérond
36eccee213 i2s: fix leak in i2s_create_dma_queue if we have a malloc issue. 2017-08-30 12:11:03 +10:00
michael
9ec3757349 fix(i2s_dac): fix the disable function which only disables DAC_CHANNEL_1. 2017-08-29 15:31:39 +08:00
Tuan PM
f91715438a i2s: return error code if register isr error, resolve #587 (github)
set p_i2s_obj = NULL when return error
2017-06-13 14:28:47 +07:00
Wangjialin
f68c5baea6 bugfix(i2s): fix error when changing changel number in i2s_set_clk function 2017-05-23 19:32:10 +08:00
Wangjialin
1f055d28b8 Driver update: I2S pdm and built-in DAC
1. Modify I2S DAC built-in mode settings
2. Add I2S pdm mode
3. Correct I2S signal index in full-duplex mode
4. Modify dac output function
5. Add dac pad init functions
6. Modify DAC documentation
7. Add i2s_set_dac_mode API
2017-05-12 16:21:02 +08:00
Tuan PM
fc1ee2666a I2S: fixed support for 24 and 32-bits, fixed tx/rx at the same time and others in log:
Add support 24, 32 bits

@jxmao optimize i2s_zero_buffer

@jxmao correct config support slave mode

@jxmao correct setup pin support tx/rx at the same time

Enhance pin power

@jxmao add dynamic change number of channels

remove nvs_init

remove start log and enhance power pin setup

using enum for i2s_channel and i2s_bits_per_sample, return ESP_ERR_INVALID_ARG when check params

validate i2s_bits_per_sample and channel

check tx & rx buffer before fill zero

remove checking channel as @jxmao suggest

limit dma buffer

modify i2s pin back to gpio mux before configure gpio matrix, resolve github issue #512

Add support 24, 32 bits

reduce push function

Modify sample can test with 24, 32-bits

Add i2s sample README

Fixed i2s_set_clk got reset sometime

can changes bit-wide while running

Fix sample rate calculation for DAC mode from @jeroen

modify example can change bits per sample every 5 seconds

cleanup

add comment for bytes_per_sample

update as @angus suggestions

Add i2s_set_clk api

I2S driver bug fixed as following log:

@jxmao optimize i2s_zero_buffer

@jxmao correct config support slave mode

@jxmao correct setup pin support tx/rx at the same time

Enhance pin power

@jxmao add dynamic change number of channels

remove nvs_init

remove start log and enhance power pin setup

using enum for i2s_channel and i2s_bits_per_sample, return ESP_ERR_INVALID_ARG when check params

validate i2s_bits_per_sample and channel

check tx & rx buffer before fill zero

remove checking channel as @jxmao suggest

limit dma buffer

modify i2s pin back to gpio mux before configure gpio matrix, resolve github issue #512

limit dma buffer to 4092

change gpio_matrix_*_check to inline function, remove some comments and rename test_i2s function to setup_triangle_sine_waves

for change commit title
2017-04-27 10:00:10 +07:00
Tuan PM
5462d98e5a Add i2s driver 2016-12-29 17:29:14 +08:00