Commit Graph

128 Commits

Author SHA1 Message Date
morris
c39476d699 esp_rom: added esp_rom_install_uart_printf 2020-12-11 11:45:10 +08:00
Angus Gratton
5228d9f9ce esp32c3: Apply one-liner/small changes for ESP32-C3 2020-12-01 10:58:50 +11:00
Armando
05a4a8d864 uart: seperate sclk and baudrate setting 2020-11-24 19:12:52 +08:00
chaijie
a48b5246cc ESP32: Fix xtal 32k not oscillate or oscillate too slowly issue
ESP32 in revision0 and revision1 uses touchpad to provide
current to oscillate xtal 32k. But revision2 and revision3
do not need to do that.
Note: touchpad can not work and toupad/ULP wakeup sources
are not available when toupad provides current to xtal 32k
2020-11-23 19:38:11 +08:00
morris
115069386b async_mcp: add DMA capability to allocated memory 2020-11-17 20:09:14 +08:00
morris
e039a28821 console: support create REPL over USB CDC 2020-11-13 10:51:40 +08:00
Renz Bagaporo
4cc6b5571b esp_system: support riscv panic 2020-11-13 07:49:11 +11:00
Angus Gratton
420aef1ffe Updates for riscv support
* Target components pull in xtensa component directly
* Use CPU HAL where applicable
* Remove unnecessary xtensa headers
* Compilation changes necessary to support non-xtensa gcc types (ie int32_t/uint32_t is no
  longer signed/unsigned int).

Changes come from internal branch commit a6723fc
2020-11-13 07:49:11 +11:00
Angus Gratton
66fb5a29bb Whitespace: Automated whitespace fixes (large commit)
Apply the pre-commit hook whitespace fixes to all files in the repo.

(Line endings, blank lines at end of file, trailing whitespace)
2020-11-11 07:36:35 +00:00
Angus Gratton
e82eac4354 cmake: Apply cmakelint fixes 2020-11-11 07:36:35 +00:00
Angus Gratton
0032971311 Merge branch 'bugfix/ulp_wakeup_trigger' into 'master'
ulp risc_v: fix bug about bit for wakeup trigger

Closes IDF-2298

See merge request espressif/esp-idf!11106
2020-11-09 14:57:36 +08:00
Jeroen Domburg
4b444316ab Psram: Do not initialize spiram cache if no chip is found.
Closes https://github.com/espressif/esp-idf/issues/6063
2020-11-06 02:32:39 +00:00
Cao Sen Miao
bd2d70ca0b ulp risc_v: fix bug about bit for wakeup trigger 2020-11-04 10:47:40 +08:00
fuzhibo
93c7cf094e rtc: update rtc related code(rtc_sleep rtc_init) to support esp32s3 2020-11-04 02:43:41 +00:00
morris
9de6cba434 ci: add more build test for esp32-s3 2020-10-27 17:22:17 +08:00
morris
d084ef4473 gdma: fix wrong m2m mode wrong config 2020-10-27 16:53:19 +08:00
Angus Gratton
f806261964 Merge branch 'bugfix/fix_rtc_io_hal_desc' into 'master'
Sleep related minor description fixes

Closes IDFGH-3868

See merge request espressif/esp-idf!10725
2020-10-26 18:48:03 +08:00
Renz Bagaporo
b3a7c6e27e components: remove some unneeded headers from source files 2020-10-22 19:37:10 +08:00
Renz Bagaporo
0aa9ee5b24 esp32s3: delete duplicate esp32s3 2020-10-22 20:01:59 +11:00
Angus Gratton
4df4bd9558 Merge branch 'bugfix/clock_getres_accuracy_resolution' into 'master'
newlib: Fix clock_getres() improves accuracy

See merge request espressif/esp-idf!10743
2020-10-22 16:50:29 +08:00
Michael (XIAO Xufeng)
647dea9395 soc: combine xxx_caps.h into one soc_caps.h
During HAL layer refactoring and new chip bringup, we have several
caps.h for each part, to reduce the conflicts to minimum. But this is
The capabilities headers will be relataive stable once completely
written (maybe after the featues are supported by drivers).

Now ESP32 and ESP32-S2 drivers are relative stable, making it a good
time to combine all these caps.h into one soc_caps.h

This cleanup also move HAL config and pin config into separated files,
to make the responsibilities of these headers more clear. This is
helpful for the stabilities of soc_caps.h because we want to make it
public some day.
2020-10-17 16:10:15 +08:00
Angus Gratton
466ad65cf4 Merge branch 'bugfix/usb_console_critical_section' into 'master'
esp_system: fix incorrect critical section usage in usb_console

Closes IDF-2049

See merge request espressif/esp-idf!10826
2020-10-15 10:36:57 +08:00
Felipe Neves
dfa2d547a7 freertos: pin timer task in core 0 plus fixed in SMP race conditions
freertos: replace the freertos regular malloc to the specific malloc from xtensa port for tcb and stack allocations

freertos: avoid the cpu1 to unwind pended ticks when xTaskResumeAll is called insed of an ISR

freertos: protected the xPortGetCoreID functions with missing critical sections

tests: re-eanble the ignored tests that was failling before race-condition fixes
2020-10-14 16:11:49 +11:00
Felipe Neves
656b706ea4 freertos: added core-ID member to task status structure aloowing its tracing.
Closes https://github.com/espressif/esp-idf/issues/5763
2020-10-14 16:11:39 +11:00
Felipe Neves
f3783ba258 app_trace/sysview: fixed freertos tracing calling plus sync apptrace component with the master branch version
docs: remove reference to backported features in freertos 10 api-reference.
2020-10-13 23:52:03 +00:00
Ivan Grokhotkov
4dc1195ca5 esp_system: fix incorrect critical section usage in usb_console
spinlock_acquire does not disable interrupts, whereas
portENTER_CRITICAL does.

Closes IDF-2049
2020-10-13 17:39:31 +02:00
Angus Gratton
ff8d05466e Merge branch 'bugfix/deep_sleep_stub_heap_rtc_fast_mem' into 'master'
deep sleep: Calculate RTC CRC without using any stack or other RTC heap memory

Closes IDF-2242

See merge request espressif/esp-idf!10741
2020-10-13 06:17:50 +08:00
Angus Gratton
562ab01046 deep sleep: Calculate RTC CRC immediately before deep sleep, without using RAM
Fix for issues where RTC FAST memory is updated as part of going into deep
sleep. Very high risk if heaps are in RTC memory - in particular task stacks
may be in RTC memory, but also other variables.

Also fixes potential concurrency problems as RTC FAST memory is not accessible
by CPU during the CRC calculation itself.

Method:
- Disable interrupts (currently for single core only, will need update for S3)
- Load all registers before calculating CRC or going to sleep
2020-10-12 11:19:56 +11:00
Martin Vychodil
497b730e8f * memprot support for RTC_SLOW
* API upgrade
JIRA IDF-1636
2020-10-08 11:19:23 +08:00
Angus Gratton
e28cd68839 esp_system: Add test case for using deep sleep wake stub when stack is in RTC memory
This test currently fails on ESP32 & ESP32-S2, fix will be in next commit.
2020-10-08 11:17:27 +11:00
KonstantinKondrashov
7ae7adf16a newlib: Fix clock_getres() improves accuracy
Returns not rounded value of resolution for WITH_RTC and !WITH_FRC
2020-10-07 18:01:35 +08:00
Mahavir Jain
20af94ff53 Coredump config option rename throughout IDF 2020-09-30 20:22:27 +05:30
Mahavir Jain
bd19088125 esp_system: initialize coredump for ESP32-S2
This was regression introduced in recent refactoring changes
from startup code.
2020-09-30 20:22:27 +05:30
Felipe Neves
2e826b7a8f intr_alloc: split interrupt allocator into common-code and platform-code
esp_system: removed repeated interrupt allocator code and moved common code to esp_system

xtens: moved xtensa specific code from freertos to the xtensa component

hal/interrupt_controller: added interrupt controller hal and ll files

docs: update the doxyfile with new location of esp_itr_alloc.h file

xtensa: fixed dangerous relocation problem after moving xtensa interrupt files out of freertos

docs: removed Xtensa reference from intr_allocator api-reference

xtensa: pushed the interrupt function that manages non iram interrupts to the xtensa layer

esp_system/test: fixed platform dependent setting for intr_allocator tests

hal: rename the functions used to manage non iram interrupt mask.
2020-09-30 07:44:12 +08:00
Renz Bagaporo
fb749440fd esp_pm: create pm init function 2020-09-25 05:24:10 +00:00
Renz Bagaporo
6462f9bfe1 esp32, esp32s2: create esp_pm component 2020-09-25 05:24:10 +00:00
Jiang Jiang Jian
e093eb064c Merge branch 'feature/run_esp32c3_code_on_esp32_and_esp32s2' into 'master'
Feature/run esp32c3 code on esp32 and esp32s2

See merge request espressif/esp-idf!10213
2020-09-24 13:27:47 +08:00
Xia Xiaotian
bdbe74693f esp_wifi: refactor wifi code in order to adapter to new chips 2020-09-24 10:15:50 +08:00
jiangguangming
28145e0894 support flash instr and rodata copy to SPIRAM 2020-09-22 15:15:03 +08:00
morris
61f89b97c6 bringup esp32-s3 on FPGA 2020-09-22 15:15:03 +08:00
chenjianqiang
f19cabb7e4 psram: support psram for esp32s3 2020-09-22 15:15:03 +08:00
morris
6225932201 bootloader_support: add esp32-s3 initial support 2020-09-22 15:15:03 +08:00
Felipe Neves
e8a276d641 esp_system: revert the esp_system_abort to the IRAM section 2020-09-18 22:18:30 -03:00
Michael (XIAO Xufeng)
3c283b490a Merge branch 'feature/async_memcpy' into 'master'
async_mcp: support async memory copy on esp32s2 and esp32s3

See merge request espressif/esp-idf!10242
2020-09-17 16:54:28 +08:00
morris
a3cc43485f async memcpy: support async memcopy on esp32s2/s3
Added async memory copy API:
on esp32-s2, the implementation is based on CP_DMA
on esp32-s3, the implementation is based on GDMA
2020-09-16 21:30:54 +08:00
Felipe Neves
e67162a7ea startup: namespaced start_app and start_app_other_core to avoid user code collision 2020-09-15 16:05:19 -03:00
Felipe Neves
a1e5dd58b2 startup: moved init core functions out of iram memory 2020-09-15 16:02:12 -03:00
Michael (XIAO Xufeng)
1a1e1911f9 Merge branch 'bugfix/spi_dma_close_before_cpu_reset' into 'master'
spi: fix issue with closing DMA before CPU reset

Closes FCS-484

See merge request espressif/esp-idf!9844
2020-09-14 23:02:05 +08:00
Ivan Grokhotkov
77afbd51ae sleep: fix esp32 light sleep duration
Commit aa43ed8 was fixing the light sleep overhead calculation for
ESP32-S2. However it also changed the overhead values for ESP32,
resulting in incorrect light sleep time. This caused regression in
light sleep example test.

Revert the original values for the ESP32, keep different set of values
for each chip.
2020-09-09 23:34:54 +02:00
ninh
aa43ed8bb8 fix reboot or crash when enable lightsleep on esp32s2 2020-09-07 15:38:00 +08:00