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https://github.com/espressif/esp-idf.git
synced 2024-10-05 20:47:46 -04:00
esp_pm: create pm init function
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@ -26,6 +26,9 @@
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#include "soc/rtc.h"
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#include "hal/uart_ll.h"
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#include "hal/uart_types.h"
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#include "freertos/FreeRTOS.h"
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#include "freertos/task.h"
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#include "freertos/xtensa_timer.h"
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@ -74,13 +77,10 @@
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#define DEFAULT_CPU_FREQ CONFIG_ESP32S2_DEFAULT_CPU_FREQ_MHZ
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#endif
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#define MHZ 1000000
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#ifdef CONFIG_PM_PROFILING
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#define WITH_PROFILING
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#endif
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static portMUX_TYPE s_switch_lock = portMUX_INITIALIZER_UNLOCKED;
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/* The following state variables are protected using s_switch_lock: */
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/* Current sleep mode; When switching, contains old mode until switch is complete */
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@ -200,7 +200,7 @@ esp_err_t esp_pm_configure(const void* vconfig)
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#if CONFIG_IDF_TARGET_ESP32
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const esp_pm_config_esp32_t* config = (const esp_pm_config_esp32_t*) vconfig;
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#elif CONFIG_IDF_TARGET_ESP32S2
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const esp_pm_config_esp32s2_t* config = (const esp_pm_config_esp32s_t*) vconfig;
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const esp_pm_config_esp32s2_t* config = (const esp_pm_config_esp32s2_t*) vconfig;
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#endif
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#ifndef CONFIG_FREERTOS_USE_TICKLESS_IDLE
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@ -669,12 +669,20 @@ void esp_pm_impl_dump_stats(FILE* out)
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void esp_pm_impl_init(void)
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{
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#if defined(CONFIG_ESP_CONSOLE_UART)
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while(!uart_ll_get_txfifo_len(UART_LL_GET_HW(CONFIG_ESP_CONSOLE_UART_NUM)));
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/* When DFS is enabled, override system setting and use REFTICK as UART clock source */
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uart_ll_set_baudrate(UART_LL_GET_HW(CONFIG_ESP_CONSOLE_UART_NUM), UART_SCLK_REF_TICK, CONFIG_ESP_CONSOLE_UART_BAUDRATE);
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#endif // CONFIG_ESP_CONSOLE_UART
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#ifdef CONFIG_PM_TRACE
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esp_pm_trace_init();
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#endif
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ESP_ERROR_CHECK(esp_pm_lock_create(ESP_PM_CPU_FREQ_MAX, 0, "rtos0",
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&s_rtos_lock_handle[0]));
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ESP_ERROR_CHECK(esp_pm_lock_acquire(s_rtos_lock_handle[0]));
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#if portNUM_PROCESSORS == 2
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ESP_ERROR_CHECK(esp_pm_lock_create(ESP_PM_CPU_FREQ_MAX, 0, "rtos1",
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&s_rtos_lock_handle[1]));
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@ -685,10 +693,24 @@ void esp_pm_impl_init(void)
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* This will be modified later by a call to esp_pm_configure.
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*/
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rtc_cpu_freq_config_t default_config;
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if (!rtc_clk_cpu_freq_mhz_to_config(CONFIG_ESP32_DEFAULT_CPU_FREQ_MHZ, &default_config)) {
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if (!rtc_clk_cpu_freq_mhz_to_config(DEFAULT_CPU_FREQ, &default_config)) {
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assert(false && "unsupported frequency");
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}
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for (size_t i = 0; i < PM_MODE_COUNT; ++i) {
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s_cpu_freq_by_mode[i] = default_config;
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}
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}
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#ifdef CONFIG_PM_DFS_INIT_AUTO
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int xtal_freq = (int) rtc_clk_xtal_freq_get();
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#if CONFIG_IDF_TARGET_ESP32
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esp_pm_config_esp32_t cfg = {
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#elif CONFIG_IDF_TARGET_ESP32S2
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esp_pm_config_esp32s2_t cfg = {
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#endif
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.max_freq_mhz = DEFAULT_CPU_FREQ,
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.min_freq_mhz = xtal_freq,
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};
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esp_pm_configure(&cfg);
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#endif //CONFIG_PM_DFS_INIT_AUTO
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}
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@ -48,4 +48,4 @@ void IRAM_ATTR esp_pm_trace_enter(esp_pm_trace_event_t event, int core_id)
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void IRAM_ATTR esp_pm_trace_exit(esp_pm_trace_event_t event, int core_id)
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{
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REG_WRITE(GPIO_OUT_W1TC_REG, s_trace_io[2 * event + core_id]);
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}
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}
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@ -369,29 +369,9 @@ IRAM_ATTR ESP_SYSTEM_INIT_FN(init_components0, BIT(0))
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{
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esp_timer_init();
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#if defined(CONFIG_PM_ENABLE) && defined(CONFIG_ESP_CONSOLE_UART)
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/* When DFS is enabled, use REFTICK as UART clock source */
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uart_ll_set_baudrate(UART_LL_GET_HW(CONFIG_ESP_CONSOLE_UART_NUM), UART_SCLK_REF_TICK, CONFIG_ESP_CONSOLE_UART_BAUDRATE);
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#endif // CONFIG_ESP_CONSOLE_UART_NONE
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#ifdef CONFIG_PM_ENABLE
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#if defined(CONFIG_PM_ENABLE)
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esp_pm_impl_init();
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#ifdef CONFIG_PM_DFS_INIT_AUTO
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int xtal_freq = (int) rtc_clk_xtal_freq_get();
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#ifdef CONFIG_IDF_TARGET_ESP32
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esp_pm_config_esp32_t cfg = {
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.max_freq_mhz = CONFIG_ESP32_DEFAULT_CPU_FREQ_MHZ,
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.min_freq_mhz = xtal_freq,
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};
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#else
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esp_pm_config_esp32s2_t cfg = {
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.max_freq_mhz = CONFIG_ESP32S2_DEFAULT_CPU_FREQ_MHZ,
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.min_freq_mhz = xtal_freq,
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};
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#endif
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esp_pm_configure(&cfg);
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#endif //CONFIG_PM_DFS_INIT_AUTO
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#endif //CONFIG_PM_ENABLE
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#if CONFIG_IDF_TARGET_ESP32
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#if CONFIG_ESP32_ENABLE_COREDUMP
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