alex/esp-idf
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33,732 Commits 19 Branches 147 Tags 378 MiB
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2127 Commits

Author SHA1 Message Date
KonstantinKondrashov
64b1bd6cb2 feat(efuse): Adds new efuses for esp32c6 2024-01-26 11:36:57 +08:00
KonstantinKondrashov
bc6072c754 feat(efuse): Adds new efuse for esp32h2 2024-01-26 11:36:56 +08:00
Roshan Bangar
962b105be5 fix(nimble): Added periodic_adv_enh soc_caps for c2, h2 2023-12-26 10:09:12 +05:30
Jiang Jiang Jian
99d10ca3d2 Merge branch 'change/change_regdma_power_issue_macro_v5.2' into 'release/v5.2' 
change(pm): change macro SOC_PM_RETENTION_HAS_REGDMA_POWER_BUG (backport v5.2)

See merge request espressif/esp-idf!27992
 2023-12-25 20:38:48 +08:00
Jiang Jiang Jian
3139ae0f0e Merge branch 'backport/openthread_related_feature_v52' into 'release/v5.2' 
Backport some openthread related features (backport v5.2)

See merge request espressif/esp-idf!28053
 2023-12-25 20:37:03 +08:00
morris
b893744fd1 fix(gdma): reserve the SOC_GDMA_PAIRS_PER_GROUP 
Closes https://github.com/espressif/esp-idf/issues/12798
 2023-12-21 15:17:54 +08:00
Xu Si Yu
6b8740ae8d feat(ieee802154): add tx/rx report for IEEE802.15.4 debug 2023-12-21 15:01:44 +08:00
Lou Tianhao
7b5799830c change(pm): change macro SOC_PM_RETENTION_HAS_REGDMA_POWER_BUG 2023-12-19 11:52:25 +08:00
Aditya Patwardhan
ff8a6a5bf9 Merge branch 'fix/esp32s3_soc_drom_high_addr_v5.2' into 'release/v5.2' 
fix(soc): esp32s3/Fix the DROM_HIGH_ADDR (v5.2)

See merge request espressif/esp-idf!27821
 2023-12-15 15:48:17 +08:00
Jiang Jiang Jian
6a34106488 Merge branch 'contrib/github_pr_12559_v5.2' into 'release/v5.2' 
fix(spi): correct macro REG_SPI_BASE(i) for all targets (GitHub PR) (v5.2)

See merge request espressif/esp-idf!27708
 2023-12-11 16:01:48 +08:00
Aditya Patwardhan
ebcb490aa9
fix(soc): esp32s3/Fix the DROM_DROM_HIGH limit 
Previously the DROM_HIGH_ADDR for esp32s3 was 0x3D000000, which
    convers only 16 MB of address range. But esp32s3 supports 32 MB
    external memory. So this address should be 0x3E000000
 2023-12-11 12:17:12 +05:30
Darian Leung
a7e2ea76d8 change(soc): Add SOC_HP_CPU_HAS_MULTIPLE_CORES 
This commit adds a the SOC_HP_CPU_HAS_MULTIPLE_CORES convenience macro to
soc_caps.h. This is a convenience boolean cap to represent whether or not the
target has multiple cores, and is intended to be used when writing docs for
multiple targets.
 2023-12-07 17:53:18 +08:00
morris
61bd19b446 Merge branch 'bugfix/fix_adc_cali_error_after_light_sleep_wake_on_h2_v5.2' into 'release/v5.2' 
adc: fix calibration error when waking up from light sleep on H2 and enable test (v5.2)

See merge request espressif/esp-idf!27602
 2023-12-07 14:29:55 +08:00
Mahavir Jain
37bf8dff6b Merge branch 'fix/esp32p4-memory-layout_v5.2' into 'release/v5.2' 
fix(heap): Update the heap memory layout on esp32p4 target (backport v5.2)

See merge request espressif/esp-idf!27097
 2023-12-07 11:52:14 +08:00
Jiang Jiang Jian
968b15d380 Merge branch 'fix/rng_register_prefix_discrepency_newer_targets_v5.2' into 'release/v5.2' 
Fix: RNG register prefix discrepancy for ESP32C6 and ESP32H2 (v5.2)

See merge request espressif/esp-idf!27683
 2023-12-07 10:46:15 +08:00
wanlei
572a66b62e fix(spi): correct some signals and dummy bits docs 2023-12-06 16:05:36 +08:00
TD-er
a4bfa19ebd fix(spi): Correct REG_SPI_BASE(i) macro for all targets 
The existing formula can never match these registers.

Closes https://github.com/espressif/esp-idf/pull/12559
Closes https://github.com/espressif/esp-idf/pull/12562
 2023-12-06 14:44:26 +08:00
Guillaume Souchere
66759438a9 fix(heap): Update the heap memory layout on esp32p4 target 
- fix the value of SOC_ROM_STACK_START in soc.h
- Update the memory usage of ROM bootloader appendix in bootloader.ld
- Update the soc_memory_regions table to minimize the number of regions
  created after the startup stack is added back as a heap.
 2023-12-06 04:48:00 +00:00
Darian Leung
e9c617fa19 refactor(soc): SOC_USB_PERIPH_NUM option 
This commit refactors SOC_USB_PERIPH_NUM as follows:

- Renamed to SOC_USB_OTG_PERIPH_NUM to avoid confusion with USB Serial JTAG
- Updated to unsigned integer "1U"
- Updated some build rules to depend on SOC_USB_OTG_SUPPORTED instead
 2023-12-05 16:44:46 +01:00
harshal.patil
a168fde297
fix(soc/esp32h2): Fix llperi_rng_data field discrepancy 2023-12-05 21:08:33 +05:30
harshal.patil
8558aa4414
fix(soc/esp32c6): Fix llperi_rng_data field discrepancy 2023-12-05 21:08:32 +05:30
gaoxu
44f266693a fix(adc): restore cali registers after light sleep wake up on H2 and enable test 2023-12-04 12:03:49 +08:00
Song Ruo Jing
55ed548cc6 fix(console): enable to select UART1 port for console output 
This feature was only enabled for esp32, esp32s2, esp32s3 previously.
Now, enabling this feature for all targets.
 2023-11-30 11:26:09 +08:00
Mahavir Jain
d3b4acf7a0 fix(esp32h2): program use_hardware_k efuse bit for ECDSA key purpose 
In ESP32-H2, the ECDSA peripheral by default uses the TRNG (hardware)
generated k value but it can be overridden to software supplied k.
This can happen through by overriding the `ECDSA_SOFTWARE_SET_K` bit
in the configuration register. Even though the HAL API is not exposed
for this but still it could be achieved by direct register
programming. And for this scenario, if sufficiently random k is not
supplied by the software then it could posses a security risk.

In this change, we are unconditionally programming the efuse
`ESP_EFUSE_ECDSA_FORCE_USE_HARDWARE_K` bit during startup security
checks itself. Additionally, same is ensured in the `esp_efuse_write_key`
API as well. This always enforces the hardware k mode in the ECDSA
peripheral and ensures strongest possible security.
 2023-11-17 07:13:53 +00:00
wuzhenghui
600986cf49
fix(riscv): supports 1 byte and larger than 64byte range watchpoint setting 2023-11-16 20:23:57 +08:00
wuzhenghui
4379d26f65
change(soc): rename SOC_CPU_WATCHPOINT_SIZE to SOC_CPU_WATCHPOINT_MAX_REGION_SIZE 2023-11-16 20:23:57 +08:00
muhaidong
9583c45947 fix(wifi): fix deinit init wifi scan fail issue 2023-11-14 19:29:03 +08:00
gaoxu
7f3221aa09 feat(adc_cali): Add ADC calibration support for ESP32H2 2023-11-06 10:57:36 +08:00
Jin Cheng
b9ed6f722b feat(bt/bluedroid): Added mode to use BlueDroid host only without Bluetooth Controller 2023-11-02 11:10:24 +08:00
morris
80997d5860 fix(i2c): read write FIFO memory by volatile 2023-10-30 10:34:43 +08:00
Konstantin Kondrashov
a304cc230e Merge branch 'feature/esp32h2_adds_adc_calib_efuses' into 'master' 
feat(efuse): Adds efuse ADC calibration data for ESP32H2

See merge request espressif/esp-idf!26305
 2023-10-25 15:58:24 +08:00
C.S.M
fec9a11f4a Merge branch 'feature/i2c_slave_new_driver' into 'master' 
feat(i2c_slave): Add new APIs for I2C-slave, and add multi-board tests with I2C-master

Closes IDF-8111

See merge request espressif/esp-idf!25403
 2023-10-25 01:22:05 +08:00
Cao Sen Miao
8d639492f2 feat(i2c_slave): Add new implementation and API for I2C slave 2023-10-24 18:44:49 +08:00
Xiao Xufeng
88954841b1 doc(spi_flash): hide unsupported optional features 2023-10-24 10:38:11 +08:00
Omar Chebib
a8b1475fe7 feat(riscv): implement coprocessors save area and FPU support 
This commit mainly targets the ESP32-P4. It adds supports for coprocessors on
RISC-V based targets. The coprocessor save area, describing the used coprocessors
is stored at the end of the stack of each task (highest address) whereas each
coprocessor save area is allocated at the beginning of the task (lowest address).
The context of each coprocessor is saved lazily, by the task that want to use it.
 2023-10-23 11:10:28 +08:00
wuzhenghui
6a436286dc feat(esp_hw_support): add api to gpio driver to support output internal clock on GPIO 2023-10-20 14:35:26 +08:00
Armando
2d3736fa11 change(sdmmc): update the volatile location of the sdmmc_struct.h 2023-10-18 11:57:55 +00:00
Armando
70314b56d5 feat(sdmmc): supported sd2.0 on esp32p4 2023-10-18 11:57:55 +00:00
Wan Lei
9f413d5d8d Merge branch 'feature/esp32p4_hp_ledc_support' into 'master' 
feat(ledc): support ledc on esp32p4

Closes IDF-6510

See merge request espressif/esp-idf!25356
 2023-10-18 15:27:54 +08:00
Mahavir Jain
2407813a67 Merge branch 'feature/update_esp32c6-h2_apm_api' into 'master' 
apm: updated APM HAL/LL APIs.

See merge request espressif/esp-idf!26368
 2023-10-18 12:26:38 +08:00
Sachin Billore
c106f5caf6 apm: updated APM HAL/LL APIs. 2023-10-17 18:20:36 +05:30
Armando (Dou Yiwen)
056558e870 Merge branch 'feat/added_flash_operation_range_macros' into 'master' 
soc: added flash operation range macros in ext_mem_defs.h

Closes IDF-7918

See merge request espressif/esp-idf!26488
 2023-10-17 18:19:35 +08:00
wanlei
57614bbad2 feat(ledc): support ledc on esp32p4 2023-10-17 16:40:04 +08:00
Mahavir Jain
c4e4629049 Merge branch 'feature/add_key_manager_hal_layer' into 'master' 
Add LL & HAL for Key Manager and HUK

Closes IDF-7985 and IDF-7901

See merge request espressif/esp-idf!25167
 2023-10-17 12:39:02 +08:00
Armando
17063b51e0 feat(soc): added flash operation range macros in ext_mem_defs.h 2023-10-16 17:19:04 +08:00
Michael (XIAO Xufeng)
2308292ca3 Merge branch 'bugfix/revert_pvt' into 'master' 
Revert "feat(volt): chip auto adjust volt for esp32c6 & esp32h2"

See merge request espressif/esp-idf!26425
 2023-10-16 12:53:07 +08:00
Aditya Patwardhan
ade65add54 feat(hal): Added HAL and LL layer for Key Manager 2023-10-16 09:26:37 +05:30
Mahavir Jain
1501aef1b3 Merge branch 'feature/enable_secure_boot_esp32p4' into 'master' 
feat(secure_boot): add secure boot support for esp32p4

Closes IDF-7544 and IDF-7745

See merge request espressif/esp-idf!26335
 2023-10-16 11:07:14 +08:00
Erhan Kurubas
681647f1eb Merge branch 'fix_esp32s3_irq_names' into 'master' 
fix(interrupts): reorder esp32s3 irq names to align with the respective irq numbers

See merge request espressif/esp-idf!26442
 2023-10-14 04:20:27 +08:00
Song Ruo Jing
d73bf72885 Merge branch 'feature/gpio_dump_io_info' into 'master' 
feat(gpio): add a dump API to dump IO configurations

Closes IDFGH-10987

See merge request espressif/esp-idf!26158
 2023-10-13 22:35:59 +08:00