mirror of
https://github.com/espressif/esp-idf.git
synced 2024-10-05 20:47:46 -04:00
change(sdmmc): update the volatile location of the sdmmc_struct.h
This commit is contained in:
Armando
Armando (Dou Yiwen)
parent
70314b56d5
commit
2d3736fa11
@ -76,8 +76,8 @@ _Static_assert(sizeof(sdmmc_hw_cmd_t) == 4, "invalid size of sdmmc_cmd_t structu
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#endif
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typedef volatile struct sdmmc_dev_s {
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union {
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typedef struct sdmmc_dev_t {
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volatile union {
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struct {
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uint32_t controller_reset: 1;
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uint32_t fifo_reset: 1;
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@ -101,9 +101,9 @@ typedef volatile struct sdmmc_dev_s {
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uint32_t val;
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} ctrl;
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uint32_t pwren; ///< 1: enable power to card, 0: disable power to card
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volatile uint32_t pwren; ///< 1: enable power to card, 0: disable power to card
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union {
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volatile union {
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struct {
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uint32_t div0: 8; ///< 0: bypass, 1-255: divide clock by (2*div0).
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uint32_t div1: 8; ///< 0: bypass, 1-255: divide clock by (2*div0).
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@ -113,7 +113,7 @@ typedef volatile struct sdmmc_dev_s {
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uint32_t val;
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} clkdiv;
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union {
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volatile union {
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struct {
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uint32_t card0: 2; ///< 0-3: select clock divider for card 0 among div0-div3
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uint32_t card1: 2; ///< 0-3: select clock divider for card 1 among div0-div3
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@ -122,7 +122,7 @@ typedef volatile struct sdmmc_dev_s {
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uint32_t val;
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} clksrc;
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union {
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volatile union {
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struct {
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uint32_t cclk_enable: 16; ///< 1: enable clock to card, 0: disable clock
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uint32_t cclk_low_power: 16; ///< 1: enable clock gating when card is idle, 0: disable clock gating
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@ -130,7 +130,7 @@ typedef volatile struct sdmmc_dev_s {
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uint32_t val;
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} clkena;
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union {
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volatile union {
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struct {
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uint32_t response: 8; ///< response timeout, in card output clock cycles
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uint32_t data: 24; ///< data read timeout, in card output clock cycles
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@ -138,7 +138,7 @@ typedef volatile struct sdmmc_dev_s {
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uint32_t val;
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} tmout;
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union {
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volatile union {
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struct {
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uint32_t card_width: 16; ///< one bit for each card: 0: 1-bit mode, 1: 4-bit mode
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uint32_t card_width_8: 16; ///< one bit for each card: 0: not 8-bit mode (corresponding card_width bit is used), 1: 8-bit mode (card_width bit is ignored)
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@ -146,14 +146,14 @@ typedef volatile struct sdmmc_dev_s {
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uint32_t val;
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} ctype;
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struct {
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volatile struct {
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uint32_t blksiz: 16; ///< block size, default 0x200
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uint32_t reserved: 16;
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};
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uint32_t bytcnt; ///< number of bytes to be transferred
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volatile uint32_t bytcnt; ///< number of bytes to be transferred
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union {
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volatile union {
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struct {
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uint32_t cd: 1; ///< Card detect interrupt enable
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uint32_t re: 1; ///< Response error interrupt enable
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@ -176,13 +176,13 @@ typedef volatile struct sdmmc_dev_s {
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uint32_t val;
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} intmask;
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uint32_t cmdarg; ///< Command argument to be passed to card
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volatile uint32_t cmdarg; ///< Command argument to be passed to card
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sdmmc_hw_cmd_t cmd;
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volatile sdmmc_hw_cmd_t cmd;
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uint32_t resp[4]; ///< Response from card
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volatile uint32_t resp[4]; ///< Response from card
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union {
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volatile union {
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struct {
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uint32_t cd: 1; ///< Card detect interrupt masked status
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uint32_t re: 1; ///< Response error interrupt masked status
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@ -205,7 +205,7 @@ typedef volatile struct sdmmc_dev_s {
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uint32_t val;
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} mintsts;
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union {
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volatile union {
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struct {
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uint32_t cd: 1; ///< Card detect raw interrupt status
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uint32_t re: 1; ///< Response error raw interrupt status
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@ -228,7 +228,7 @@ typedef volatile struct sdmmc_dev_s {
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uint32_t val;
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} rintsts; ///< interrupts can be cleared by writing this register
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union {
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volatile union {
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struct {
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uint32_t fifo_rx_watermark: 1; ///< FIFO reached receive watermark level
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uint32_t fifo_tx_watermark: 1; ///< FIFO reached transmit watermark level
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@ -246,7 +246,7 @@ typedef volatile struct sdmmc_dev_s {
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uint32_t val;
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} status;
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union {
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volatile union {
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struct {
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uint32_t tx_watermark: 12; ///< FIFO TX watermark level
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uint32_t reserved1: 4;
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@ -257,7 +257,7 @@ typedef volatile struct sdmmc_dev_s {
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uint32_t val;
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} fifoth;
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union {
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volatile union {
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struct {
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uint32_t cards: 2; ///< bit N reads 0 if card N is present
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uint32_t reserved: 30;
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@ -265,7 +265,7 @@ typedef volatile struct sdmmc_dev_s {
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uint32_t val;
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} cdetect;
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union {
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volatile union {
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struct {
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uint32_t cards: 2; ///< bit N reads 1 if card N is write protected
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uint32_t reserved: 30;
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@ -273,21 +273,21 @@ typedef volatile struct sdmmc_dev_s {
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uint32_t val;
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} wrtprt;
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uint32_t gpio; ///< unused
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uint32_t tcbcnt; ///< transferred (to card) byte count
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uint32_t tbbcnt; ///< transferred from host to FIFO byte count
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volatile uint32_t gpio; ///< unused
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volatile uint32_t tcbcnt; ///< transferred (to card) byte count
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volatile uint32_t tbbcnt; ///< transferred from host to FIFO byte count
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union {
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volatile union {
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struct {
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uint32_t debounce_count: 24; ///< number of host cycles used by debounce filter, typical time should be 5-25ms
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uint32_t reserved: 8;
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};
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} debnce;
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uint32_t usrid; ///< user ID
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uint32_t verid; ///< IP block version
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volatile uint32_t usrid; ///< user ID
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volatile uint32_t verid; ///< IP block version
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union {
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volatile union {
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struct {
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/** card_type_reg : RO; bitpos: [0]; default: 1;
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* Hardware support SDIO and MMC.
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@ -332,14 +332,14 @@ typedef volatile struct sdmmc_dev_s {
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uint32_t val;
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} hcon;
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union {
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volatile union {
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struct {
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uint32_t voltage: 16; ///< voltage control for slots; no-op on ESP32.
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uint32_t ddr: 16; ///< bit N enables DDR mode for card N
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};
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} uhs; ///< UHS related settings
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union {
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volatile union {
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struct {
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uint32_t cards: 2; ///< bit N resets card N, active low
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uint32_t reserved: 30;
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@ -348,7 +348,7 @@ typedef volatile struct sdmmc_dev_s {
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uint32_t reserved_7c;
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union {
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volatile union {
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struct {
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uint32_t sw_reset: 1; ///< set to reset DMA controller
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uint32_t fb: 1; ///< set if AHB master performs fixed burst transfers
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@ -360,10 +360,10 @@ typedef volatile struct sdmmc_dev_s {
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uint32_t val;
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} bmod;
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uint32_t pldmnd; ///< set any bit to resume IDMAC FSM from suspended state
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sdmmc_desc_t* dbaddr; ///< descriptor list base
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volatile uint32_t pldmnd; ///< set any bit to resume IDMAC FSM from suspended state
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volatile sdmmc_desc_t* dbaddr; ///< descriptor list base
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union {
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volatile union {
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struct {
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uint32_t ti: 1; ///< transmit interrupt status
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uint32_t ri: 1; ///< receive interrupt status
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@ -381,7 +381,7 @@ typedef volatile struct sdmmc_dev_s {
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uint32_t val;
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} idsts;
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union {
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volatile union {
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struct {
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uint32_t ti: 1; ///< transmit interrupt enable
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uint32_t ri: 1; ///< receive interrupt enable
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@ -397,13 +397,13 @@ typedef volatile struct sdmmc_dev_s {
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uint32_t val;
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} idinten;
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uint32_t dscaddr; ///< current host descriptor address
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uint32_t dscaddrl; ///< unused
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uint32_t dscaddru; ///< unused
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uint32_t bufaddrl; ///< unused
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uint32_t bufaddru; ///< unused
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uint32_t reserved_a8[22];
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union {
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volatile uint32_t dscaddr; ///< current host descriptor address
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volatile uint32_t dscaddrl; ///< unused
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volatile uint32_t dscaddru; ///< unused
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volatile uint32_t bufaddrl; ///< unused
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volatile uint32_t bufaddru; ///< unused
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volatile uint32_t reserved_a8[22];
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volatile union {
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struct {
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uint32_t read_thr_en : 1; ///< initiate transfer only if FIFO has more space than the read threshold
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uint32_t busy_clr_int_en : 1; ///< enable generation of busy clear interrupts
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@ -414,12 +414,12 @@ typedef volatile struct sdmmc_dev_s {
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};
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uint32_t val;
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} cardthrctl;
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uint32_t back_end_power;
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uint32_t uhs_reg_ext;
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uint32_t emmc_ddr_reg;
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uint32_t enable_shift;
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uint32_t reserved_114[443];
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union {
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volatile uint32_t back_end_power;
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volatile uint32_t uhs_reg_ext;
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volatile uint32_t emmc_ddr_reg;
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volatile uint32_t enable_shift;
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volatile uint32_t reserved_114[443];
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volatile union {
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struct {
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uint32_t phase_dout: 3; ///< phase of data output clock (0x0: 0, 0x1: 90, 0x4: 180, 0x6: 270)
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uint32_t phase_din: 3; ///< phase of data input clock
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@ -74,8 +74,8 @@ _Static_assert(sizeof(sdmmc_hw_cmd_t) == 4, "invalid size of sdmmc_cmd_t structu
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#endif
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typedef volatile struct sdmmc_dev_s {
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union {
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typedef struct sdmmc_dev_t {
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volatile union {
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struct {
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uint32_t controller_reset: 1;
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uint32_t fifo_reset: 1;
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@ -99,9 +99,9 @@ typedef volatile struct sdmmc_dev_s {
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uint32_t val;
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} ctrl;
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uint32_t pwren; ///< 1: enable power to card, 0: disable power to card
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volatile uint32_t pwren; ///< 1: enable power to card, 0: disable power to card
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union {
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volatile union {
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struct {
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uint32_t div0: 8; ///< 0: bypass, 1-255: divide clock by (2*div0).
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uint32_t div1: 8; ///< 0: bypass, 1-255: divide clock by (2*div0).
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@ -111,7 +111,7 @@ typedef volatile struct sdmmc_dev_s {
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uint32_t val;
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} clkdiv;
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union {
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volatile union {
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struct {
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uint32_t card0: 2; ///< 0-3: select clock divider for card 0 among div0-div3
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uint32_t card1: 2; ///< 0-3: select clock divider for card 1 among div0-div3
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@ -120,7 +120,7 @@ typedef volatile struct sdmmc_dev_s {
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uint32_t val;
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} clksrc;
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union {
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volatile union {
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struct {
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uint32_t cclk_enable: 16; ///< 1: enable clock to card, 0: disable clock
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uint32_t cclk_low_power: 16; ///< 1: enable clock gating when card is idle, 0: disable clock gating
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@ -128,7 +128,7 @@ typedef volatile struct sdmmc_dev_s {
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uint32_t val;
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} clkena;
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union {
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volatile union {
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struct {
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uint32_t response: 8; ///< response timeout, in card output clock cycles
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uint32_t data: 24; ///< data read timeout, in card output clock cycles
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@ -136,7 +136,7 @@ typedef volatile struct sdmmc_dev_s {
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uint32_t val;
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} tmout;
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union {
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volatile union {
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struct {
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uint32_t card_width: 16; ///< one bit for each card: 0: 1-bit mode, 1: 4-bit mode
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uint32_t card_width_8: 16; ///< one bit for each card: 0: not 8-bit mode (corresponding card_width bit is used), 1: 8-bit mode (card_width bit is ignored)
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@ -144,14 +144,14 @@ typedef volatile struct sdmmc_dev_s {
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uint32_t val;
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} ctype;
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struct {
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volatile struct {
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uint32_t blksiz: 16; ///< block size, default 0x200
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uint32_t reserved: 16;
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};
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uint32_t bytcnt; ///< number of bytes to be transferred
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volatile uint32_t bytcnt; ///< number of bytes to be transferred
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union {
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volatile union {
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struct {
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uint32_t cd: 1; ///< Card detect interrupt enable
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uint32_t re: 1; ///< Response error interrupt enable
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@ -174,13 +174,13 @@ typedef volatile struct sdmmc_dev_s {
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uint32_t val;
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} intmask;
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uint32_t cmdarg; ///< Command argument to be passed to card
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volatile uint32_t cmdarg; ///< Command argument to be passed to card
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sdmmc_hw_cmd_t cmd;
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volatile sdmmc_hw_cmd_t cmd;
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uint32_t resp[4]; ///< Response from card
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volatile uint32_t resp[4]; ///< Response from card
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union {
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volatile union {
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struct {
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uint32_t cd: 1; ///< Card detect interrupt masked status
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uint32_t re: 1; ///< Response error interrupt masked status
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@ -203,7 +203,7 @@ typedef volatile struct sdmmc_dev_s {
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uint32_t val;
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} mintsts;
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union {
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volatile union {
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struct {
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uint32_t cd: 1; ///< Card detect raw interrupt status
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uint32_t re: 1; ///< Response error raw interrupt status
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@ -226,7 +226,7 @@ typedef volatile struct sdmmc_dev_s {
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uint32_t val;
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} rintsts; ///< interrupts can be cleared by writing this register
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union {
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volatile union {
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struct {
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uint32_t fifo_rx_watermark: 1; ///< FIFO reached receive watermark level
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uint32_t fifo_tx_watermark: 1; ///< FIFO reached transmit watermark level
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@ -244,7 +244,7 @@ typedef volatile struct sdmmc_dev_s {
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uint32_t val;
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} status;
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union {
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volatile union {
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struct {
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uint32_t tx_watermark: 12; ///< FIFO TX watermark level
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uint32_t reserved1: 4;
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@ -255,7 +255,7 @@ typedef volatile struct sdmmc_dev_s {
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uint32_t val;
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} fifoth;
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union {
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volatile union {
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struct {
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uint32_t cards: 2; ///< bit N reads 0 if card N is present
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uint32_t reserved: 30;
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@ -263,7 +263,7 @@ typedef volatile struct sdmmc_dev_s {
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uint32_t val;
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} cdetect;
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union {
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volatile union {
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struct {
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uint32_t cards: 2; ///< bit N reads 1 if card N is write protected
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uint32_t reserved: 30;
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@ -271,21 +271,21 @@ typedef volatile struct sdmmc_dev_s {
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uint32_t val;
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} wrtprt;
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uint32_t gpio; ///< unused
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uint32_t tcbcnt; ///< transferred (to card) byte count
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uint32_t tbbcnt; ///< transferred from host to FIFO byte count
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volatile uint32_t gpio; ///< unused
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volatile uint32_t tcbcnt; ///< transferred (to card) byte count
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volatile uint32_t tbbcnt; ///< transferred from host to FIFO byte count
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union {
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volatile union {
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struct {
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uint32_t debounce_count: 24; ///< number of host cycles used by debounce filter, typical time should be 5-25ms
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uint32_t reserved: 8;
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};
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} debnce;
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uint32_t usrid; ///< user ID
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uint32_t verid; ///< IP block version
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volatile uint32_t usrid; ///< user ID
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volatile uint32_t verid; ///< IP block version
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union {
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volatile union {
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struct {
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/** card_type_reg : RO; bitpos: [0]; default: 1;
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* Hardware support SDIO and MMC.
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@ -330,14 +330,14 @@ typedef volatile struct sdmmc_dev_s {
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uint32_t val;
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} hcon;
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union {
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volatile union {
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struct {
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uint32_t voltage: 16; ///< voltage control for slots; no-op on ESP32.
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uint32_t ddr: 16; ///< bit N enables DDR mode for card N
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};
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} uhs; ///< UHS related settings
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union {
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volatile union {
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struct {
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uint32_t cards: 2; ///< bit N resets card N, active low
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uint32_t reserved: 30;
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@ -346,7 +346,7 @@ typedef volatile struct sdmmc_dev_s {
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uint32_t reserved_7c;
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union {
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volatile union {
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struct {
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uint32_t sw_reset: 1; ///< set to reset DMA controller
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uint32_t fb: 1; ///< set if AHB master performs fixed burst transfers
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@ -358,10 +358,10 @@ typedef volatile struct sdmmc_dev_s {
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uint32_t val;
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} bmod;
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uint32_t pldmnd; ///< set any bit to resume IDMAC FSM from suspended state
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sdmmc_desc_t* dbaddr; ///< descriptor list base
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volatile uint32_t pldmnd; ///< set any bit to resume IDMAC FSM from suspended state
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volatile sdmmc_desc_t* dbaddr; ///< descriptor list base
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||||
union {
|
||||
volatile union {
|
||||
struct {
|
||||
uint32_t ti: 1; ///< transmit interrupt status
|
||||
uint32_t ri: 1; ///< receive interrupt status
|
||||
@ -379,7 +379,7 @@ typedef volatile struct sdmmc_dev_s {
|
||||
uint32_t val;
|
||||
} idsts;
|
||||
|
||||
union {
|
||||
volatile union {
|
||||
struct {
|
||||
uint32_t ti: 1; ///< transmit interrupt enable
|
||||
uint32_t ri: 1; ///< receive interrupt enable
|
||||
@ -395,13 +395,13 @@ typedef volatile struct sdmmc_dev_s {
|
||||
uint32_t val;
|
||||
} idinten;
|
||||
|
||||
uint32_t dscaddr; ///< current host descriptor address
|
||||
uint32_t dscaddrl; ///< unused
|
||||
uint32_t dscaddru; ///< unused
|
||||
uint32_t bufaddrl; ///< unused
|
||||
uint32_t bufaddru; ///< unused
|
||||
uint32_t reserved_a8[22];
|
||||
union {
|
||||
volatile uint32_t dscaddr; ///< current host descriptor address
|
||||
volatile uint32_t dscaddrl; ///< unused
|
||||
volatile uint32_t dscaddru; ///< unused
|
||||
volatile uint32_t bufaddrl; ///< unused
|
||||
volatile uint32_t bufaddru; ///< unused
|
||||
volatile uint32_t reserved_a8[22];
|
||||
volatile union {
|
||||
struct {
|
||||
uint32_t read_thr_en : 1; ///< initiate transfer only if FIFO has more space than the read threshold
|
||||
uint32_t busy_clr_int_en : 1; ///< enable generation of busy clear interrupts
|
||||
@ -411,12 +411,12 @@ typedef volatile struct sdmmc_dev_s {
|
||||
};
|
||||
uint32_t val;
|
||||
} cardthrctl;
|
||||
uint32_t back_end_power;
|
||||
uint32_t uhs_reg_ext;
|
||||
uint32_t emmc_ddr_reg;
|
||||
uint32_t enable_shift;
|
||||
volatile uint32_t back_end_power;
|
||||
volatile uint32_t uhs_reg_ext;
|
||||
volatile uint32_t emmc_ddr_reg;
|
||||
volatile uint32_t enable_shift;
|
||||
uint32_t reserved_114[443];
|
||||
union {
|
||||
volatile union {
|
||||
struct {
|
||||
uint32_t phase_dout: 3; ///< phase of data output clock (0x0: 0, 0x1: 90, 0x4: 180, 0x6: 270)
|
||||
uint32_t phase_din: 3; ///< phase of data input clock
|
||||
|
||||
Loading…
Reference in New Issue
Block a user