Commit Graph

29 Commits

Author SHA1 Message Date
Angus Gratton
d6f4d99d93 core system: Fix warnings in compilation when assertions are disabled
Adds a CI config for hello world that sets this, to catch future regressions
2021-03-03 10:26:57 +11:00
Renz Bagaporo
0e0914476c esp_common: move freertos hooks 2021-02-24 12:16:37 +08:00
Renz Bagaporo
deaad431f4 esp_common: move task, int wdt 2021-02-24 12:16:37 +08:00
Sachin Parekh
e6ccb812b2 esp_pm: Label each column of lock dump 2021-02-11 18:44:51 +05:30
Angus Gratton
3532f52f60 Merge branch 'bugfix/ldgen_ignore_nonexistent_archives_and_obj' into 'master'
ldgen: check mappings

Closes IDF-1624

See merge request espressif/esp-idf!8557
2021-01-21 15:59:35 +08:00
Li Shuai
f168ac3b39 light sleep: add cpu power down support for esp32c3 2021-01-19 14:51:50 +08:00
Li Shuai
ac7d1bec76 light sleep: overhead time accuracy optimization for esp32c3 2021-01-19 14:50:58 +08:00
Li Shuai
355dd10257 light sleep: dfs support for esp32c3 2021-01-19 14:50:58 +08:00
Renz Bagaporo
d1c800fbbb components: fix ldgen check errors 2021-01-19 11:17:18 +08:00
ninh
659d805411 esp_wifi: light sleep optimization 2021-01-18 15:31:03 +08:00
ninh
27aa6c289f components/pm: Add slp gpio configure workaround 2021-01-15 15:34:45 +08:00
KonstantinKondrashov
dada7cd035 global: Uses CCOUNT API instead of XTHAL macro 2021-01-12 16:24:23 +08:00
ninh
e908a32381 put pm_slp_iram_opt and pm_rtos_iram_opt related attributes in esp_pm/linker.lf 2021-01-06 03:40:28 +00:00
Marius Vikhammer
68608f804c esp32c3: Misc fixes needed to build & run 2020-12-31 15:20:05 +11:00
Liu Ning
57aa65eeed components/pm: Add sleep related code iram opt chioce 2020-12-23 14:45:36 +08:00
Armando
05a4a8d864 uart: seperate sclk and baudrate setting 2020-11-24 19:12:52 +08:00
Armando
fb8b905539 uart: add uart support on esp32s3 2020-11-24 19:12:51 +08:00
Angus Gratton
420aef1ffe Updates for riscv support
* Target components pull in xtensa component directly
* Use CPU HAL where applicable
* Remove unnecessary xtensa headers
* Compilation changes necessary to support non-xtensa gcc types (ie int32_t/uint32_t is no
  longer signed/unsigned int).

Changes come from internal branch commit a6723fc
2020-11-13 07:49:11 +11:00
Angus Gratton
66fb5a29bb Whitespace: Automated whitespace fixes (large commit)
Apply the pre-commit hook whitespace fixes to all files in the repo.

(Line endings, blank lines at end of file, trailing whitespace)
2020-11-11 07:36:35 +00:00
Ivan Grokhotkov
b6b1d1b49a Merge branch 'bugfix/pm_dump_format' into 'master'
esp_pm: fix formatting issues in esp_pm_dump_locks

See merge request espressif/esp-idf!10842
2020-10-20 22:21:03 +08:00
Ivan Grokhotkov
b98032aae4 Merge branch 'bugfix/pm_uart_garbage' into 'master'
esp_pm: fix garbage on UART when CONFIG_PM_ENABLE=y

See merge request espressif/esp-idf!10843
2020-10-20 22:18:00 +08:00
Konstantin Kondrashov
9386cafbc3 time: Fix gettimeofday for ESP32-S3 2020-10-20 14:09:32 +08:00
Ivan Grokhotkov
30754918ee esp_pm: fix formatting issues in esp_pm_dump_locks
- line was truncated because 64 characters were not sufficient
- length passed to snprintf should be full buffer length, not -1
- make the width of lock name field fixed
- fix alignment of lock type column
2020-10-19 18:54:34 +02:00
Ivan Grokhotkov
50ef2f97d6 esp_pm: fix garbage on UART when CONFIG_PM_ENABLE=y
`uart_ll_get_txfifo_len` returns the number of bytes available in the
TX FIFO; The condition we need is "FIFO empty", not "FIFO has free
space". `uart_ll_is_tx_idle` does that, and also ensures that the last
character popped from the TX FIFO has been fully transmitted.
2020-10-14 19:43:53 +02:00
Renz Bagaporo
04c67e83f3 esp_pm: temporarily disable failing test 2020-09-29 18:35:47 +08:00
Renz Bagaporo
17b2d7864e esp32s3: move s3 pm to esp_pm 2020-09-25 05:24:10 +00:00
Renz Bagaporo
fb749440fd esp_pm: create pm init function 2020-09-25 05:24:10 +00:00
Renz Bagaporo
f33f49331f ci: update configs to include/exclude esp_pm in unit test 2020-09-25 05:24:10 +00:00
Renz Bagaporo
6462f9bfe1 esp32, esp32s2: create esp_pm component 2020-09-25 05:24:10 +00:00