mirror of
https://github.com/espressif/esp-idf.git
synced 2024-10-05 20:47:46 -04:00
esp32s3: move s3 pm to esp_pm
This commit is contained in:
Renz Bagaporo
bot
parent
fb749440fd
commit
17b2d7864e
@ -19,8 +19,6 @@ else()
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"hw_random.c"
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"intr_alloc.c"
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"memprot.c"
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"pm_esp32s3.c"
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"pm_trace.c"
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"spiram.c"
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"spiram_psram.c"
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"system_api_esp32s3.c")
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@ -1,643 +0,0 @@
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// Copyright 2016-2020 Espressif Systems (Shanghai) PTE LTD
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//
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// Licensed under the Apache License, Version 2.0 (the "License");
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// you may not use this file except in compliance with the License.
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// You may obtain a copy of the License at
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//
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// http://www.apache.org/licenses/LICENSE-2.0
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//
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// Unless required by applicable law or agreed to in writing, software
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// distributed under the License is distributed on an "AS IS" BASIS,
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// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
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// See the License for the specific language governing permissions and
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// limitations under the License.
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#include <stdlib.h>
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#include <stdbool.h>
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#include <string.h>
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#include <sys/param.h>
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#include "esp_attr.h"
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#include "esp_err.h"
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#include "esp_pm.h"
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#include "esp_log.h"
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#include "esp32s3/clk.h"
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#include "esp_private/crosscore_int.h"
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#include "soc/rtc.h"
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#include "freertos/FreeRTOS.h"
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#include "freertos/task.h"
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#include "freertos/xtensa_timer.h"
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#include "xtensa/core-macros.h"
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#include "esp_private/pm_impl.h"
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#include "esp_private/pm_trace.h"
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#include "esp_private/esp_timer_private.h"
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#include "esp32s3/pm.h"
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#include "esp_sleep.h"
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/* CCOMPARE update timeout, in CPU cycles. Any value above ~600 cycles will work
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* for the purpose of detecting a deadlock.
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*/
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#define CCOMPARE_UPDATE_TIMEOUT 1000000
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/* When changing CCOMPARE, don't allow changes if the difference is less
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* than this. This is to prevent setting CCOMPARE below CCOUNT.
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*/
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#define CCOMPARE_MIN_CYCLES_IN_FUTURE 1000
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/* When light sleep is used, wake this number of microseconds earlier than
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* the next tick.
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*/
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#define LIGHT_SLEEP_EARLY_WAKEUP_US 100
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/* Minimal divider at which REF_CLK_FREQ can be obtained */
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#define REF_CLK_DIV_MIN 2
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#ifdef CONFIG_PM_PROFILING
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#define WITH_PROFILING
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#endif
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static portMUX_TYPE s_switch_lock = portMUX_INITIALIZER_UNLOCKED;
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/* The following state variables are protected using s_switch_lock: */
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/* Current sleep mode; When switching, contains old mode until switch is complete */
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static pm_mode_t s_mode = PM_MODE_CPU_MAX;
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/* True when switch is in progress */
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static volatile bool s_is_switching;
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/* When switch is in progress, this is the mode we are switching into */
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static pm_mode_t s_new_mode = PM_MODE_CPU_MAX;
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/* Number of times each mode was locked */
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static size_t s_mode_lock_counts[PM_MODE_COUNT];
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/* Bit mask of locked modes. BIT(i) is set iff s_mode_lock_counts[i] > 0. */
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static uint32_t s_mode_mask;
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/* Divider and multiplier used to adjust (ccompare - ccount) duration.
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* Only set to non-zero values when switch is in progress.
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*/
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static uint32_t s_ccount_div;
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static uint32_t s_ccount_mul;
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#if CONFIG_FREERTOS_USE_TICKLESS_IDLE
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#define PERIPH_SKIP_LIGHT_SLEEP_NO 1
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/* Indicates if light sleep shoule be skipped by peripherals. */
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static skip_light_sleep_cb_t s_periph_skip_light_sleep_cb[PERIPH_SKIP_LIGHT_SLEEP_NO];
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/* Indicates if light sleep entry was skipped in vApplicationSleep for given CPU.
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* This in turn gets used in IDLE hook to decide if `waiti` needs
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* to be invoked or not.
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*/
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static bool s_skipped_light_sleep[portNUM_PROCESSORS];
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#if portNUM_PROCESSORS == 2
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/* When light sleep is finished on one CPU, it is possible that the other CPU
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* will enter light sleep again very soon, before interrupts on the first CPU
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* get a chance to run. To avoid such situation, set a flag for the other CPU to
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* skip light sleep attempt.
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*/
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static bool s_skip_light_sleep[portNUM_PROCESSORS];
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#endif // portNUM_PROCESSORS == 2
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#endif // CONFIG_FREERTOS_USE_TICKLESS_IDLE
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/* Indicates to the ISR hook that CCOMPARE needs to be updated on the given CPU.
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* Used in conjunction with cross-core interrupt to update CCOMPARE on the other CPU.
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*/
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static volatile bool s_need_update_ccompare[portNUM_PROCESSORS];
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/* A flag indicating that Idle hook has run on a given CPU;
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* Next interrupt on the same CPU will take s_rtos_lock_handle.
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*/
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static bool s_core_idle[portNUM_PROCESSORS];
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/* When no RTOS tasks are active, these locks are released to allow going into
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* a lower power mode. Used by ISR hook and idle hook.
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*/
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static esp_pm_lock_handle_t s_rtos_lock_handle[portNUM_PROCESSORS];
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/* Lookup table of CPU frequency configs to be used in each mode.
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* Initialized by esp_pm_impl_init and modified by esp_pm_configure.
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*/
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rtc_cpu_freq_config_t s_cpu_freq_by_mode[PM_MODE_COUNT];
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/* Whether automatic light sleep is enabled */
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static bool s_light_sleep_en = false;
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/* When configuration is changed, current frequency may not match the
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* newly configured frequency for the current mode. This is an indicator
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* to the mode switch code to get the actual current frequency instead of
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* relying on the current mode.
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*/
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static bool s_config_changed = false;
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#ifdef WITH_PROFILING
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/* Time, in microseconds, spent so far in each mode */
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static pm_time_t s_time_in_mode[PM_MODE_COUNT];
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/* Timestamp, in microseconds, when the mode switch last happened */
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static pm_time_t s_last_mode_change_time;
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/* User-readable mode names, used by esp_pm_impl_dump_stats */
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static const char *s_mode_names[] = {
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"SLEEP",
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"APB_MIN",
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"APB_MAX",
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"CPU_MAX"
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};
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#endif // WITH_PROFILING
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static const char *TAG = "pm_esp32s3";
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static void update_ccompare(void);
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static void do_switch(pm_mode_t new_mode);
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static void leave_idle(void);
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static void on_freq_update(uint32_t old_ticks_per_us, uint32_t ticks_per_us);
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pm_mode_t esp_pm_impl_get_mode(esp_pm_lock_type_t type, int arg)
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{
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(void) arg;
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if (type == ESP_PM_CPU_FREQ_MAX) {
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return PM_MODE_CPU_MAX;
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} else if (type == ESP_PM_APB_FREQ_MAX) {
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return PM_MODE_APB_MAX;
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} else if (type == ESP_PM_NO_LIGHT_SLEEP) {
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return PM_MODE_APB_MIN;
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} else {
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// unsupported mode
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abort();
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}
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}
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esp_err_t esp_pm_configure(const void *vconfig)
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{
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#ifndef CONFIG_PM_ENABLE
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return ESP_ERR_NOT_SUPPORTED;
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#endif
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const esp_pm_config_esp32s3_t *config = (const esp_pm_config_esp32s3_t *) vconfig;
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#ifndef CONFIG_FREERTOS_USE_TICKLESS_IDLE
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if (config->light_sleep_enable) {
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return ESP_ERR_NOT_SUPPORTED;
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}
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#endif
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int min_freq_mhz = config->min_freq_mhz;
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int max_freq_mhz = config->max_freq_mhz;
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if (min_freq_mhz > max_freq_mhz) {
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return ESP_ERR_INVALID_ARG;
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}
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rtc_cpu_freq_config_t freq_config;
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if (!rtc_clk_cpu_freq_mhz_to_config(min_freq_mhz, &freq_config)) {
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ESP_LOGW(TAG, "invalid min_freq_mhz value (%d)", min_freq_mhz);
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return ESP_ERR_INVALID_ARG;
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}
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int xtal_freq_mhz = (int) rtc_clk_xtal_freq_get();
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if (min_freq_mhz < xtal_freq_mhz && min_freq_mhz * MHZ / REF_CLK_FREQ < REF_CLK_DIV_MIN) {
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ESP_LOGW(TAG, "min_freq_mhz should be >= %d", REF_CLK_FREQ * REF_CLK_DIV_MIN / MHZ);
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return ESP_ERR_INVALID_ARG;
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}
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if (!rtc_clk_cpu_freq_mhz_to_config(max_freq_mhz, &freq_config)) {
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ESP_LOGW(TAG, "invalid max_freq_mhz value (%d)", max_freq_mhz);
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return ESP_ERR_INVALID_ARG;
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}
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int apb_max_freq = MIN(max_freq_mhz, 80); /* CPU frequency in APB_MAX mode */
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apb_max_freq = MAX(apb_max_freq, min_freq_mhz);
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ESP_LOGI(TAG, "Frequency switching config: "
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"CPU_MAX: %d, APB_MAX: %d, APB_MIN: %d, Light sleep: %s",
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max_freq_mhz,
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apb_max_freq,
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min_freq_mhz,
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config->light_sleep_enable ? "ENABLED" : "DISABLED");
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portENTER_CRITICAL(&s_switch_lock);
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bool res;
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res = rtc_clk_cpu_freq_mhz_to_config(max_freq_mhz, &s_cpu_freq_by_mode[PM_MODE_CPU_MAX]);
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assert(res);
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res = rtc_clk_cpu_freq_mhz_to_config(apb_max_freq, &s_cpu_freq_by_mode[PM_MODE_APB_MAX]);
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assert(res);
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res = rtc_clk_cpu_freq_mhz_to_config(min_freq_mhz, &s_cpu_freq_by_mode[PM_MODE_APB_MIN]);
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assert(res);
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s_cpu_freq_by_mode[PM_MODE_LIGHT_SLEEP] = s_cpu_freq_by_mode[PM_MODE_APB_MIN];
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s_light_sleep_en = config->light_sleep_enable;
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s_config_changed = true;
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portEXIT_CRITICAL(&s_switch_lock);
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return ESP_OK;
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}
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static pm_mode_t IRAM_ATTR get_lowest_allowed_mode(void)
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{
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/* TODO: optimize using ffs/clz */
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if (s_mode_mask >= BIT(PM_MODE_CPU_MAX)) {
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return PM_MODE_CPU_MAX;
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} else if (s_mode_mask >= BIT(PM_MODE_APB_MAX)) {
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return PM_MODE_APB_MAX;
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} else if (s_mode_mask >= BIT(PM_MODE_APB_MIN) || !s_light_sleep_en) {
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return PM_MODE_APB_MIN;
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} else {
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return PM_MODE_LIGHT_SLEEP;
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}
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}
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void IRAM_ATTR esp_pm_impl_switch_mode(pm_mode_t mode,
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pm_mode_switch_t lock_or_unlock, pm_time_t now)
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{
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bool need_switch = false;
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uint32_t mode_mask = BIT(mode);
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portENTER_CRITICAL_SAFE(&s_switch_lock);
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uint32_t count;
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if (lock_or_unlock == MODE_LOCK) {
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count = ++s_mode_lock_counts[mode];
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} else {
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count = s_mode_lock_counts[mode]--;
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}
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if (count == 1) {
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if (lock_or_unlock == MODE_LOCK) {
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s_mode_mask |= mode_mask;
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} else {
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s_mode_mask &= ~mode_mask;
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}
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need_switch = true;
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}
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pm_mode_t new_mode = s_mode;
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if (need_switch) {
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new_mode = get_lowest_allowed_mode();
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#ifdef WITH_PROFILING
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if (s_last_mode_change_time != 0) {
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pm_time_t diff = now - s_last_mode_change_time;
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s_time_in_mode[s_mode] += diff;
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}
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s_last_mode_change_time = now;
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#endif // WITH_PROFILING
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}
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portEXIT_CRITICAL_SAFE(&s_switch_lock);
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if (need_switch && new_mode != s_mode) {
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do_switch(new_mode);
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}
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}
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/**
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* @brief Update clock dividers in esp_timer and FreeRTOS, and adjust CCOMPARE
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* values on both CPUs.
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* @param old_ticks_per_us old CPU frequency
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* @param ticks_per_us new CPU frequency
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*/
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static void IRAM_ATTR on_freq_update(uint32_t old_ticks_per_us, uint32_t ticks_per_us)
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{
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uint32_t old_apb_ticks_per_us = MIN(old_ticks_per_us, 80);
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uint32_t apb_ticks_per_us = MIN(ticks_per_us, 80);
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/* Update APB frequency value used by the timer */
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if (old_apb_ticks_per_us != apb_ticks_per_us) {
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esp_timer_private_update_apb_freq(apb_ticks_per_us);
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}
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/* Calculate new tick divisor */
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_xt_tick_divisor = ticks_per_us * MHZ / XT_TICK_PER_SEC;
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int core_id = xPortGetCoreID();
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if (s_rtos_lock_handle[core_id] != NULL) {
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ESP_PM_TRACE_ENTER(CCOMPARE_UPDATE, core_id);
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/* ccount_div and ccount_mul are used in esp_pm_impl_update_ccompare
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* to calculate new CCOMPARE value.
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*/
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s_ccount_div = old_ticks_per_us;
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s_ccount_mul = ticks_per_us;
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/* Update CCOMPARE value on this CPU */
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update_ccompare();
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#if portNUM_PROCESSORS == 2
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/* Send interrupt to the other CPU to update CCOMPARE value */
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int other_core_id = (core_id == 0) ? 1 : 0;
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s_need_update_ccompare[other_core_id] = true;
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esp_crosscore_int_send_freq_switch(other_core_id);
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int timeout = 0;
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while (s_need_update_ccompare[other_core_id]) {
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if (++timeout == CCOMPARE_UPDATE_TIMEOUT) {
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assert(false && "failed to update CCOMPARE, possible deadlock");
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}
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}
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#endif // portNUM_PROCESSORS == 2
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s_ccount_mul = 0;
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s_ccount_div = 0;
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ESP_PM_TRACE_EXIT(CCOMPARE_UPDATE, core_id);
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}
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}
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/**
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* Perform the switch to new power mode.
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* Currently only changes the CPU frequency and adjusts clock dividers.
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* No light sleep yet.
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* @param new_mode mode to switch to
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*/
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static void IRAM_ATTR do_switch(pm_mode_t new_mode)
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{
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const int core_id = xPortGetCoreID();
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do {
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portENTER_CRITICAL_ISR(&s_switch_lock);
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if (!s_is_switching) {
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break;
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}
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if (s_new_mode <= new_mode) {
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portEXIT_CRITICAL_ISR(&s_switch_lock);
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return;
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}
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if (s_need_update_ccompare[core_id]) {
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s_need_update_ccompare[core_id] = false;
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}
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portEXIT_CRITICAL_ISR(&s_switch_lock);
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} while (true);
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s_new_mode = new_mode;
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s_is_switching = true;
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bool config_changed = s_config_changed;
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s_config_changed = false;
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portEXIT_CRITICAL_ISR(&s_switch_lock);
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rtc_cpu_freq_config_t new_config = s_cpu_freq_by_mode[new_mode];
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rtc_cpu_freq_config_t old_config;
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if (!config_changed) {
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old_config = s_cpu_freq_by_mode[s_mode];
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} else {
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rtc_clk_cpu_freq_get_config(&old_config);
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}
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if (new_config.freq_mhz != old_config.freq_mhz) {
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uint32_t old_ticks_per_us = old_config.freq_mhz;
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uint32_t new_ticks_per_us = new_config.freq_mhz;
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bool switch_down = new_ticks_per_us < old_ticks_per_us;
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ESP_PM_TRACE_ENTER(FREQ_SWITCH, core_id);
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if (switch_down) {
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on_freq_update(old_ticks_per_us, new_ticks_per_us);
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}
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rtc_clk_cpu_freq_set_config_fast(&new_config);
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if (!switch_down) {
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on_freq_update(old_ticks_per_us, new_ticks_per_us);
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}
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ESP_PM_TRACE_EXIT(FREQ_SWITCH, core_id);
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}
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portENTER_CRITICAL_ISR(&s_switch_lock);
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s_mode = new_mode;
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s_is_switching = false;
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portEXIT_CRITICAL_ISR(&s_switch_lock);
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}
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/**
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* @brief Calculate new CCOMPARE value based on s_ccount_{mul,div}
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*
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* Adjusts CCOMPARE value so that the interrupt happens at the same time as it
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* would happen without the frequency change.
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* Assumes that the new_frequency = old_frequency * s_ccount_mul / s_ccount_div.
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*/
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static void IRAM_ATTR update_ccompare(void)
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{
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uint32_t ccount = XTHAL_GET_CCOUNT();
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uint32_t ccompare = XTHAL_GET_CCOMPARE(XT_TIMER_INDEX);
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||||
if ((ccompare - CCOMPARE_MIN_CYCLES_IN_FUTURE) - ccount < UINT32_MAX / 2) {
|
||||
uint32_t diff = ccompare - ccount;
|
||||
uint32_t diff_scaled = (diff * s_ccount_mul + s_ccount_div - 1) / s_ccount_div;
|
||||
if (diff_scaled < _xt_tick_divisor) {
|
||||
uint32_t new_ccompare = ccount + diff_scaled;
|
||||
XTHAL_SET_CCOMPARE(XT_TIMER_INDEX, new_ccompare);
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
static void IRAM_ATTR leave_idle(void)
|
||||
{
|
||||
int core_id = xPortGetCoreID();
|
||||
if (s_core_idle[core_id]) {
|
||||
// TODO: possible optimization: raise frequency here first
|
||||
esp_pm_lock_acquire(s_rtos_lock_handle[core_id]);
|
||||
s_core_idle[core_id] = false;
|
||||
}
|
||||
}
|
||||
|
||||
void esp_pm_impl_idle_hook(void)
|
||||
{
|
||||
int core_id = xPortGetCoreID();
|
||||
uint32_t state = portENTER_CRITICAL_NESTED();
|
||||
if (!s_core_idle[core_id]) {
|
||||
esp_pm_lock_release(s_rtos_lock_handle[core_id]);
|
||||
s_core_idle[core_id] = true;
|
||||
}
|
||||
portEXIT_CRITICAL_NESTED(state);
|
||||
ESP_PM_TRACE_ENTER(IDLE, core_id);
|
||||
}
|
||||
|
||||
void IRAM_ATTR esp_pm_impl_isr_hook(void)
|
||||
{
|
||||
int core_id = xPortGetCoreID();
|
||||
ESP_PM_TRACE_ENTER(ISR_HOOK, core_id);
|
||||
/* Prevent higher level interrupts (than the one this function was called from)
|
||||
* from happening in this section, since they will also call into esp_pm_impl_isr_hook.
|
||||
*/
|
||||
uint32_t state = portENTER_CRITICAL_NESTED();
|
||||
#if portNUM_PROCESSORS == 2
|
||||
if (s_need_update_ccompare[core_id]) {
|
||||
update_ccompare();
|
||||
s_need_update_ccompare[core_id] = false;
|
||||
} else {
|
||||
leave_idle();
|
||||
}
|
||||
#else
|
||||
leave_idle();
|
||||
#endif // portNUM_PROCESSORS == 2
|
||||
portEXIT_CRITICAL_NESTED(state);
|
||||
ESP_PM_TRACE_EXIT(ISR_HOOK, core_id);
|
||||
}
|
||||
|
||||
void esp_pm_impl_waiti(void)
|
||||
{
|
||||
#if CONFIG_FREERTOS_USE_TICKLESS_IDLE
|
||||
int core_id = xPortGetCoreID();
|
||||
if (s_skipped_light_sleep[core_id]) {
|
||||
asm("waiti 0");
|
||||
/* Interrupt took the CPU out of waiti and s_rtos_lock_handle[core_id]
|
||||
* is now taken. However since we are back to idle task, we can release
|
||||
* the lock so that vApplicationSleep can attempt to enter light sleep.
|
||||
*/
|
||||
esp_pm_impl_idle_hook();
|
||||
s_skipped_light_sleep[core_id] = false;
|
||||
}
|
||||
#else
|
||||
asm("waiti 0");
|
||||
#endif // CONFIG_FREERTOS_USE_TICKLESS_IDLE
|
||||
}
|
||||
|
||||
#if CONFIG_FREERTOS_USE_TICKLESS_IDLE
|
||||
|
||||
esp_err_t esp_pm_register_skip_light_sleep_callback(skip_light_sleep_cb_t cb)
|
||||
{
|
||||
for (int i = 0; i < PERIPH_SKIP_LIGHT_SLEEP_NO; i++) {
|
||||
if (s_periph_skip_light_sleep_cb[i] == cb) {
|
||||
return ESP_OK;
|
||||
} else if (s_periph_skip_light_sleep_cb[i] == NULL) {
|
||||
s_periph_skip_light_sleep_cb[i] = cb;
|
||||
return ESP_OK;
|
||||
}
|
||||
}
|
||||
return ESP_ERR_NO_MEM;
|
||||
}
|
||||
|
||||
esp_err_t esp_pm_unregister_skip_light_sleep_callback(skip_light_sleep_cb_t cb)
|
||||
{
|
||||
for (int i = 0; i < PERIPH_SKIP_LIGHT_SLEEP_NO; i++) {
|
||||
if (s_periph_skip_light_sleep_cb[i] == cb) {
|
||||
s_periph_skip_light_sleep_cb[i] = NULL;
|
||||
return ESP_OK;
|
||||
}
|
||||
}
|
||||
return ESP_ERR_INVALID_STATE;
|
||||
}
|
||||
|
||||
static inline bool IRAM_ATTR periph_should_skip_light_sleep(void)
|
||||
{
|
||||
for (int i = 0; i < PERIPH_SKIP_LIGHT_SLEEP_NO; i++) {
|
||||
if (s_periph_skip_light_sleep_cb[i]) {
|
||||
if (s_periph_skip_light_sleep_cb[i]() == true) {
|
||||
return true;
|
||||
}
|
||||
}
|
||||
}
|
||||
return false;
|
||||
}
|
||||
static inline bool IRAM_ATTR should_skip_light_sleep(int core_id)
|
||||
{
|
||||
#if portNUM_PROCESSORS == 2
|
||||
if (s_skip_light_sleep[core_id]) {
|
||||
s_skip_light_sleep[core_id] = false;
|
||||
s_skipped_light_sleep[core_id] = true;
|
||||
return true;
|
||||
}
|
||||
#endif // portNUM_PROCESSORS == 2
|
||||
if (s_mode != PM_MODE_LIGHT_SLEEP || s_is_switching || periph_should_skip_light_sleep()) {
|
||||
s_skipped_light_sleep[core_id] = true;
|
||||
} else {
|
||||
s_skipped_light_sleep[core_id] = false;
|
||||
}
|
||||
return s_skipped_light_sleep[core_id];
|
||||
}
|
||||
|
||||
static inline void IRAM_ATTR other_core_should_skip_light_sleep(int core_id)
|
||||
{
|
||||
#if portNUM_PROCESSORS == 2
|
||||
s_skip_light_sleep[!core_id] = true;
|
||||
#endif
|
||||
}
|
||||
|
||||
void IRAM_ATTR vApplicationSleep( TickType_t xExpectedIdleTime )
|
||||
{
|
||||
portENTER_CRITICAL(&s_switch_lock);
|
||||
int core_id = xPortGetCoreID();
|
||||
if (!should_skip_light_sleep(core_id)) {
|
||||
/* Calculate how much we can sleep */
|
||||
int64_t next_esp_timer_alarm = esp_timer_get_next_alarm();
|
||||
int64_t now = esp_timer_get_time();
|
||||
int64_t time_until_next_alarm = next_esp_timer_alarm - now;
|
||||
int64_t wakeup_delay_us = portTICK_PERIOD_MS * 1000LL * xExpectedIdleTime;
|
||||
int64_t sleep_time_us = MIN(wakeup_delay_us, time_until_next_alarm);
|
||||
if (sleep_time_us >= configEXPECTED_IDLE_TIME_BEFORE_SLEEP * portTICK_PERIOD_MS * 1000LL) {
|
||||
esp_sleep_enable_timer_wakeup(sleep_time_us - LIGHT_SLEEP_EARLY_WAKEUP_US);
|
||||
#ifdef CONFIG_PM_TRACE
|
||||
/* to force tracing GPIOs to keep state */
|
||||
esp_sleep_pd_config(ESP_PD_DOMAIN_RTC_PERIPH, ESP_PD_OPTION_ON);
|
||||
#endif
|
||||
/* Enter sleep */
|
||||
ESP_PM_TRACE_ENTER(SLEEP, core_id);
|
||||
int64_t sleep_start = esp_timer_get_time();
|
||||
esp_light_sleep_start();
|
||||
int64_t slept_us = esp_timer_get_time() - sleep_start;
|
||||
ESP_PM_TRACE_EXIT(SLEEP, core_id);
|
||||
|
||||
uint32_t slept_ticks = slept_us / (portTICK_PERIOD_MS * 1000LL);
|
||||
if (slept_ticks > 0) {
|
||||
/* Adjust RTOS tick count based on the amount of time spent in sleep */
|
||||
vTaskStepTick(slept_ticks);
|
||||
|
||||
/* Trigger tick interrupt, since sleep time was longer
|
||||
* than portTICK_PERIOD_MS. Note that setting INTSET does not
|
||||
* work for timer interrupt, and changing CCOMPARE would clear
|
||||
* the interrupt flag.
|
||||
*/
|
||||
XTHAL_SET_CCOUNT(XTHAL_GET_CCOMPARE(XT_TIMER_INDEX) - 16);
|
||||
while (!(XTHAL_GET_INTERRUPT() & BIT(XT_TIMER_INTNUM))) {
|
||||
;
|
||||
}
|
||||
}
|
||||
other_core_should_skip_light_sleep(core_id);
|
||||
}
|
||||
}
|
||||
portEXIT_CRITICAL(&s_switch_lock);
|
||||
}
|
||||
#endif //CONFIG_FREERTOS_USE_TICKLESS_IDLE
|
||||
|
||||
#ifdef WITH_PROFILING
|
||||
void esp_pm_impl_dump_stats(FILE *out)
|
||||
{
|
||||
pm_time_t time_in_mode[PM_MODE_COUNT];
|
||||
|
||||
portENTER_CRITICAL_ISR(&s_switch_lock);
|
||||
memcpy(time_in_mode, s_time_in_mode, sizeof(time_in_mode));
|
||||
pm_time_t last_mode_change_time = s_last_mode_change_time;
|
||||
pm_mode_t cur_mode = s_mode;
|
||||
pm_time_t now = pm_get_time();
|
||||
portEXIT_CRITICAL_ISR(&s_switch_lock);
|
||||
|
||||
time_in_mode[cur_mode] += now - last_mode_change_time;
|
||||
|
||||
fprintf(out, "Mode stats:\n");
|
||||
for (int i = 0; i < PM_MODE_COUNT; ++i) {
|
||||
if (i == PM_MODE_LIGHT_SLEEP && !s_light_sleep_en) {
|
||||
/* don't display light sleep mode if it's not enabled */
|
||||
continue;
|
||||
}
|
||||
fprintf(out, "%8s %3dM %12lld %2d%%\n",
|
||||
s_mode_names[i],
|
||||
s_cpu_freq_by_mode[i].freq_mhz,
|
||||
time_in_mode[i],
|
||||
(int) (time_in_mode[i] * 100 / now));
|
||||
}
|
||||
}
|
||||
#endif // WITH_PROFILING
|
||||
|
||||
void esp_pm_impl_init(void)
|
||||
{
|
||||
#ifdef CONFIG_PM_TRACE
|
||||
esp_pm_trace_init();
|
||||
#endif
|
||||
ESP_ERROR_CHECK(esp_pm_lock_create(ESP_PM_CPU_FREQ_MAX, 0, "rtos0",
|
||||
&s_rtos_lock_handle[0]));
|
||||
ESP_ERROR_CHECK(esp_pm_lock_acquire(s_rtos_lock_handle[0]));
|
||||
#if portNUM_PROCESSORS == 2
|
||||
ESP_ERROR_CHECK(esp_pm_lock_create(ESP_PM_CPU_FREQ_MAX, 0, "rtos1",
|
||||
&s_rtos_lock_handle[1]));
|
||||
ESP_ERROR_CHECK(esp_pm_lock_acquire(s_rtos_lock_handle[1]));
|
||||
#endif // portNUM_PROCESSORS == 2
|
||||
|
||||
/* Configure all modes to use the default CPU frequency.
|
||||
* This will be modified later by a call to esp_pm_configure.
|
||||
*/
|
||||
rtc_cpu_freq_config_t default_config;
|
||||
if (!rtc_clk_cpu_freq_mhz_to_config(CONFIG_ESP32S3_DEFAULT_CPU_FREQ_MHZ, &default_config)) {
|
||||
assert(false && "unsupported frequency");
|
||||
}
|
||||
for (size_t i = 0; i < PM_MODE_COUNT; ++i) {
|
||||
s_cpu_freq_by_mode[i] = default_config;
|
||||
}
|
||||
}
|
||||
@ -1,51 +0,0 @@
|
||||
// Copyright 2016-2020 Espressif Systems (Shanghai) PTE LTD
|
||||
//
|
||||
// Licensed under the Apache License, Version 2.0 (the "License");
|
||||
// you may not use this file except in compliance with the License.
|
||||
// You may obtain a copy of the License at
|
||||
//
|
||||
// http://www.apache.org/licenses/LICENSE-2.0
|
||||
//
|
||||
// Unless required by applicable law or agreed to in writing, software
|
||||
// distributed under the License is distributed on an "AS IS" BASIS,
|
||||
// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
|
||||
// See the License for the specific language governing permissions and
|
||||
// limitations under the License.
|
||||
|
||||
#include "esp_private/pm_trace.h"
|
||||
#include "driver/gpio.h"
|
||||
#include "soc/gpio_reg.h"
|
||||
|
||||
/* GPIOs to use for tracing of esp_pm events.
|
||||
* Two entries in the array for each type, one for each CPU.
|
||||
* Feel free to change when debugging.
|
||||
*/
|
||||
static const int DRAM_ATTR s_trace_io[] = {
|
||||
BIT(4), BIT(5), // ESP_PM_TRACE_IDLE
|
||||
BIT(16), BIT(17), // ESP_PM_TRACE_TICK
|
||||
BIT(18), BIT(18), // ESP_PM_TRACE_FREQ_SWITCH
|
||||
BIT(19), BIT(19), // ESP_PM_TRACE_CCOMPARE_UPDATE
|
||||
BIT(25), BIT(26), // ESP_PM_TRACE_ISR_HOOK
|
||||
BIT(27), BIT(27), // ESP_PM_TRACE_SLEEP
|
||||
};
|
||||
|
||||
void esp_pm_trace_init(void)
|
||||
{
|
||||
for (size_t i = 0; i < sizeof(s_trace_io) / sizeof(s_trace_io[0]); ++i) {
|
||||
int io = __builtin_ffs(s_trace_io[i]);
|
||||
if (io == 0) {
|
||||
continue;
|
||||
}
|
||||
gpio_set_direction(io - 1, GPIO_MODE_OUTPUT);
|
||||
}
|
||||
}
|
||||
|
||||
void IRAM_ATTR esp_pm_trace_enter(esp_pm_trace_event_t event, int core_id)
|
||||
{
|
||||
REG_WRITE(GPIO_OUT_W1TS_REG, s_trace_io[2 * event + core_id]);
|
||||
}
|
||||
|
||||
void IRAM_ATTR esp_pm_trace_exit(esp_pm_trace_event_t event, int core_id)
|
||||
{
|
||||
REG_WRITE(GPIO_OUT_W1TC_REG, s_trace_io[2 * event + core_id]);
|
||||
}
|
||||
@ -42,12 +42,16 @@
|
||||
|
||||
#include "sdkconfig.h"
|
||||
|
||||
// [refactor-todo] opportunity for further refactor
|
||||
#if CONFIG_IDF_TARGET_ESP32
|
||||
#include "esp32/clk.h"
|
||||
#include "esp32/pm.h"
|
||||
#elif CONFIG_IDF_TARGET_ESP32S2
|
||||
#include "esp32s2/clk.h"
|
||||
#include "esp32s2/pm.h"
|
||||
#elif CONFIG_IDF_TARGET_ESP32S3
|
||||
#include "esp32s3/clk.h"
|
||||
#include "esp32s3/pm.h"
|
||||
#endif
|
||||
|
||||
#define MHZ (1000000)
|
||||
@ -75,6 +79,10 @@
|
||||
/* Minimal divider at which REF_CLK_FREQ can be obtained */
|
||||
#define REF_CLK_DIV_MIN 2
|
||||
#define DEFAULT_CPU_FREQ CONFIG_ESP32S2_DEFAULT_CPU_FREQ_MHZ
|
||||
#elif CONFIG_IDF_TARGET_ESP32S3
|
||||
/* Minimal divider at which REF_CLK_FREQ can be obtained */
|
||||
#define REF_CLK_DIV_MIN 2
|
||||
#define DEFAULT_CPU_FREQ CONFIG_ESP32S3_DEFAULT_CPU_FREQ_MHZ
|
||||
#endif
|
||||
|
||||
#ifdef CONFIG_PM_PROFILING
|
||||
@ -102,7 +110,7 @@ static uint32_t s_ccount_mul;
|
||||
|
||||
#if CONFIG_FREERTOS_USE_TICKLESS_IDLE
|
||||
|
||||
#if CONFIG_IDF_TARGET_ESP32S2
|
||||
#if CONFIG_IDF_TARGET_ESP32S2 || CONFIG_IDF_TARGET_ESP32S3
|
||||
#define PERIPH_SKIP_LIGHT_SLEEP_NO 1
|
||||
|
||||
/* Indicates if light sleep shoule be skipped by peripherals. */
|
||||
@ -201,6 +209,8 @@ esp_err_t esp_pm_configure(const void* vconfig)
|
||||
const esp_pm_config_esp32_t* config = (const esp_pm_config_esp32_t*) vconfig;
|
||||
#elif CONFIG_IDF_TARGET_ESP32S2
|
||||
const esp_pm_config_esp32s2_t* config = (const esp_pm_config_esp32s2_t*) vconfig;
|
||||
#elif CONFIG_IDF_TARGET_ESP32S3
|
||||
const esp_pm_config_esp32s3_t* config = (const esp_pm_config_esp32s3_t*) vconfig;
|
||||
#endif
|
||||
|
||||
#ifndef CONFIG_FREERTOS_USE_TICKLESS_IDLE
|
||||
@ -246,7 +256,7 @@ esp_err_t esp_pm_configure(const void* vconfig)
|
||||
*/
|
||||
apb_max_freq = 80;
|
||||
}
|
||||
#elif CONFIG_IDF_TARGET_ESP32S2
|
||||
#elif CONFIG_IDF_TARGET_ESP32S2 || CONFIG_IDF_TARGET_ESP32S3
|
||||
int apb_max_freq = MIN(max_freq_mhz, 80); /* CPU frequency in APB_MAX mode */
|
||||
#endif
|
||||
|
||||
@ -526,7 +536,7 @@ void esp_pm_impl_waiti(void)
|
||||
|
||||
#if CONFIG_FREERTOS_USE_TICKLESS_IDLE
|
||||
|
||||
#if CONFIG_IDF_TARGET_ESP32S2
|
||||
#if CONFIG_IDF_TARGET_ESP32S2 || CONFIG_IDF_TARGET_ESP32S3
|
||||
esp_err_t esp_pm_register_skip_light_sleep_callback(skip_light_sleep_cb_t cb)
|
||||
{
|
||||
for (int i = 0; i < PERIPH_SKIP_LIGHT_SLEEP_NO; i++) {
|
||||
@ -575,7 +585,7 @@ static inline bool IRAM_ATTR should_skip_light_sleep(int core_id)
|
||||
#endif // portNUM_PROCESSORS == 2
|
||||
#if CONFIG_IDF_TARGET_ESP32
|
||||
if (s_mode != PM_MODE_LIGHT_SLEEP || s_is_switching) {
|
||||
#elif CONFIG_IDF_TARGET_ESP32S2
|
||||
#elif CONFIG_IDF_TARGET_ESP32S2 || CONFIG_IDF_TARGET_ESP32S3
|
||||
if (s_mode != PM_MODE_LIGHT_SLEEP || s_is_switching || periph_should_skip_light_sleep()) {
|
||||
#endif
|
||||
s_skipped_light_sleep[core_id] = true;
|
||||
@ -706,6 +716,8 @@ void esp_pm_impl_init(void)
|
||||
esp_pm_config_esp32_t cfg = {
|
||||
#elif CONFIG_IDF_TARGET_ESP32S2
|
||||
esp_pm_config_esp32s2_t cfg = {
|
||||
#elif CONFIG_IDF_TARGET_ESP32S3
|
||||
esp_pm_config_esp32s3_t cfg = {
|
||||
#endif
|
||||
.max_freq_mhz = DEFAULT_CPU_FREQ,
|
||||
.min_freq_mhz = xtal_freq,
|
||||
@ -713,4 +725,4 @@ void esp_pm_impl_init(void)
|
||||
|
||||
esp_pm_configure(&cfg);
|
||||
#endif //CONFIG_PM_DFS_INIT_AUTO
|
||||
}
|
||||
}
|
||||
|
||||
@ -23,6 +23,9 @@
|
||||
#elif CONFIG_IDF_TARGET_ESP32S2
|
||||
#include "esp32s2/clk.h"
|
||||
#include "esp32s2/ulp.h"
|
||||
#elif CONFIG_IDF_TARGET_ESP32S3
|
||||
#include "esp32s3/clk.h"
|
||||
#include "esp32s3/ulp.h"
|
||||
#endif
|
||||
|
||||
TEST_CASE("Can dump power management lock stats", "[pm]")
|
||||
@ -39,6 +42,8 @@ static void switch_freq(int mhz)
|
||||
esp_pm_config_esp32_t pm_config = {
|
||||
#elif CONFIG_IDF_TARGET_ESP32S2
|
||||
esp_pm_config_esp32s2_t pm_config = {
|
||||
#elif CONFIG_IDF_TARGET_ESP32S3
|
||||
esp_pm_config_esp32s3_t pm_config = {
|
||||
#endif
|
||||
.max_freq_mhz = mhz,
|
||||
.min_freq_mhz = MIN(mhz, xtal_freq),
|
||||
@ -81,6 +86,8 @@ static void light_sleep_enable(void)
|
||||
esp_pm_config_esp32_t pm_config = {
|
||||
#elif CONFIG_IDF_TARGET_ESP32S2
|
||||
esp_pm_config_esp32s2_t pm_config = {
|
||||
#elif CONFIG_IDF_TARGET_ESP32S3
|
||||
esp_pm_config_esp32s3_t pm_config = {
|
||||
#endif
|
||||
.max_freq_mhz = cur_freq_mhz,
|
||||
.min_freq_mhz = xtal_freq,
|
||||
@ -97,6 +104,8 @@ static void light_sleep_disable(void)
|
||||
esp_pm_config_esp32_t pm_config = {
|
||||
#elif CONFIG_IDF_TARGET_ESP32S2
|
||||
esp_pm_config_esp32s2_t pm_config = {
|
||||
#elif CONFIG_IDF_TARGET_ESP32S3
|
||||
esp_pm_config_esp32s3_t pm_config = {
|
||||
#endif
|
||||
.max_freq_mhz = cur_freq_mhz,
|
||||
.min_freq_mhz = cur_freq_mhz,
|
||||
@ -151,6 +160,8 @@ TEST_CASE("Can wake up from automatic light sleep by GPIO", "[pm]")
|
||||
assert(CONFIG_ESP32_ULP_COPROC_RESERVE_MEM >= 16 && "this test needs ESP32_ULP_COPROC_RESERVE_MEM option set in menuconfig");
|
||||
#elif CONFIG_IDF_TARGET_ESP32S2
|
||||
assert(CONFIG_ESP32S2_ULP_COPROC_RESERVE_MEM >= 16 && "this test needs ESP32_ULP_COPROC_RESERVE_MEM option set in menuconfig");
|
||||
#elif CONFIG_IDF_TARGET_ESP32S3
|
||||
assert(CONFIG_ESP32S3_ULP_COPROC_RESERVE_MEM >= 16 && "this test needs ESP32_ULP_COPROC_RESERVE_MEM option set in menuconfig");
|
||||
#endif
|
||||
|
||||
/* Set up GPIO used to wake up RTC */
|
||||
|
||||
Loading…
Reference in New Issue
Block a user