ESP_CACHE_MSYNC_FLAG_DIR_C2M: From cache to memory
ESP_CACHE_MSYNC_FLAG_DIR_M2C: From memory to cache
By default, if no direction flag is set, it will fallback C2M direction.
For M2C direction, now this API will do an invalidation.
- MMU configuration related kconfig options will be in soc, or
esp_hw_support
- Cache configuration related kconfig options will be in soc, or
esp_hw_support
- mmap driver and msync driver kconfig options will be still in esp_mm.
As there's no kconfig options for them yet, removed kconfig files
Prior to this commit, we don't consider the offset of the irom vaddr
start.
If the offset + size is bigger than the MMU page size, for example:
MMU page size: 0x10000
irom vaddr: 0x4200_0800, so offset = 0x800
irom size: 0xF900
offset + size = 0x10100
Under this condition, the 0x4200_0000 ~ 0x4202_0000, two MMU pages are
used.
With this commit, when reserving the irom and drom, we take the offset
into consideration as well.
