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ci: remove redundent ci configs for chip support and network components

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CI would build psram config test apps even for target with no psram.
This commit is contained in:
Marius Vikhammer 2023-04-25 14:40:53 +08:00
parent 8be8a1cd22
commit bca026455c
15 changed files with 59 additions and 51 deletions
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1
components/esp_eth/test_apps/sdkconfig.ci.single_core_ip101
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@ -1,5 +1,4 @@
CONFIG_IDF_TARGET="esp32"
CONFIG_MEMMAP_SMP=n
CONFIG_FREERTOS_UNICORE=y
CONFIG_ESP32_IRAM_AS_8BIT_ACCESSIBLE_MEMORY=y
CONFIG_ESP32_RTCDATA_IN_FAST_MEM=y

55
components/esp_mm/test_apps/mm/pytest_mmap.py
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@ -20,32 +20,28 @@ def test_mmap(dut: Dut) -> None:
# mmu tests with psram enabled
@pytest.mark.esp32
@pytest.mark.esp32s2
@pytest.mark.esp32s3
PSRAM_RELEASE_CONFIGS = [
pytest.param('psram_release_esp32', marks=[pytest.mark.esp32]),
pytest.param('psram_release_esp32s2', marks=[pytest.mark.esp32s2]),
pytest.param('psram_release_esp32s3', marks=[pytest.mark.esp32s3]),
]
@pytest.mark.generic
@pytest.mark.parametrize(
'config',
[
'psram_release',
],
indirect=True,
)
@pytest.mark.parametrize('config', PSRAM_RELEASE_CONFIGS, indirect=True)
def test_mmap_psram(dut: Dut) -> None:
dut.run_all_single_board_cases(group='mmu')
# mmu tests with xip_psram
@pytest.mark.esp32s2
@pytest.mark.esp32s3
XIP_CONFIGS = [
pytest.param('xip_psram_esp32s2', marks=[pytest.mark.esp32s2]),
pytest.param('xip_psram_esp32s3', marks=[pytest.mark.esp32s3]),
]
@pytest.mark.generic
@pytest.mark.parametrize(
'config',
[
'xip_psram'
],
indirect=True,
)
@pytest.mark.parametrize('config', XIP_CONFIGS, indirect=True)
def test_mmap_xip_psram(dut: Dut) -> None:
dut.run_all_single_board_cases(group='mmu')
@ -65,31 +61,14 @@ def test_cache(dut: Dut) -> None:
# cache tests with psram enabled
@pytest.mark.esp32
@pytest.mark.esp32s2
@pytest.mark.esp32s3
@pytest.mark.generic
@pytest.mark.parametrize(
'config',
[
'psram_release',
],
indirect=True,
)
@pytest.mark.parametrize('config', PSRAM_RELEASE_CONFIGS, indirect=True)
def test_cache_psram(dut: Dut) -> None:
dut.run_all_single_board_cases(group='cache')
# cache tests with xip_psram
@pytest.mark.esp32s2
@pytest.mark.esp32s3
@pytest.mark.generic
@pytest.mark.parametrize(
'config',
[
'xip_psram'
],
indirect=True,
)
@pytest.mark.parametrize('config', XIP_CONFIGS, indirect=True)
def test_cache_xip_psram(dut: Dut) -> None:
dut.run_all_single_board_cases(group='cache')

1
components/esp_mm/test_apps/mm/sdkconfig.ci.psram_release → components/esp_mm/test_apps/mm/sdkconfig.ci.psram_release_esp32
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@ -1,3 +1,4 @@
CONFIG_IDF_TARGET="esp32"
CONFIG_COMPILER_OPTIMIZATION_SIZE=y
CONFIG_BOOTLOADER_COMPILER_OPTIMIZATION_SIZE=y
CONFIG_COMPILER_OPTIMIZATION_ASSERTIONS_SILENT=y

6
components/esp_mm/test_apps/mm/sdkconfig.ci.psram_release_esp32s2 Normal file
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@ -0,0 +1,6 @@
CONFIG_IDF_TARGET="esp32s2"
CONFIG_COMPILER_OPTIMIZATION_SIZE=y
CONFIG_BOOTLOADER_COMPILER_OPTIMIZATION_SIZE=y
CONFIG_COMPILER_OPTIMIZATION_ASSERTIONS_SILENT=y
CONFIG_SPIRAM=y

6
components/esp_mm/test_apps/mm/sdkconfig.ci.psram_release_esp32s3 Normal file
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@ -0,0 +1,6 @@
CONFIG_IDF_TARGET="esp32s3"
CONFIG_COMPILER_OPTIMIZATION_SIZE=y
CONFIG_BOOTLOADER_COMPILER_OPTIMIZATION_SIZE=y
CONFIG_COMPILER_OPTIMIZATION_ASSERTIONS_SILENT=y
CONFIG_SPIRAM=y

1
components/esp_mm/test_apps/mm/sdkconfig.ci.xip_psram → components/esp_mm/test_apps/mm/sdkconfig.ci.xip_psram_esp32s2
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@ -1,3 +1,4 @@
CONFIG_IDF_TARGET="esp32s2"
CONFIG_COMPILER_OPTIMIZATION_SIZE=y
CONFIG_BOOTLOADER_COMPILER_OPTIMIZATION_SIZE=y
CONFIG_COMPILER_OPTIMIZATION_ASSERTIONS_SILENT=y

8
components/esp_mm/test_apps/mm/sdkconfig.ci.xip_psram_esp32s3 Normal file
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@ -0,0 +1,8 @@
CONFIG_IDF_TARGET="esp32s3"
CONFIG_COMPILER_OPTIMIZATION_SIZE=y
CONFIG_BOOTLOADER_COMPILER_OPTIMIZATION_SIZE=y
CONFIG_COMPILER_OPTIMIZATION_ASSERTIONS_SILENT=y
CONFIG_SPIRAM=y
CONFIG_SPIRAM_FETCH_INSTRUCTIONS=y
CONFIG_SPIRAM_RODATA=y

1
components/spi_flash/test_apps/flash_encryption/sdkconfig.ci.release_f4r8
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@ -1,3 +1,4 @@
CONFIG_IDF_TARGET="esp32s3"
CONFIG_ESP_TASK_WDT_EN=n
CONFIG_FREERTOS_USE_TICKLESS_IDLE=y
CONFIG_COMPILER_OPTIMIZATION_SIZE=y

1
components/spi_flash/test_apps/flash_encryption/sdkconfig.ci.release_f8r8
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@ -1,3 +1,4 @@
CONFIG_IDF_TARGET="esp32s3"
CONFIG_ESP_TASK_WDT_EN=n
CONFIG_FREERTOS_USE_TICKLESS_IDLE=y
CONFIG_COMPILER_OPTIMIZATION_SIZE=y

16
components/spi_flash/test_apps/flash_mmap/pytest_flash_mmap.py
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@ -35,16 +35,14 @@ def test_flash_mmap_rom_impl(dut: Dut) -> None:
dut.run_all_single_board_cases(timeout=30)
@pytest.mark.esp32s2
@pytest.mark.esp32s3
XIP_CONFIGS = [
pytest.param('xip_psram_esp32s2', marks=[pytest.mark.esp32s2]),
pytest.param('xip_psram_esp32s3', marks=[pytest.mark.esp32s3]),
]
@pytest.mark.generic
@pytest.mark.parametrize(
'config',
[
'xip_psram',
],
indirect=True,
)
@pytest.mark.parametrize('config', XIP_CONFIGS, indirect=True)
def test_flash_mmap_xip_psram(dut: Dut) -> None:
dut.run_all_single_board_cases(timeout=30)

1
components/spi_flash/test_apps/flash_mmap/sdkconfig.ci.xip_psram → components/spi_flash/test_apps/flash_mmap/sdkconfig.ci.xip_psram_esp32s2
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@ -1,2 +1,3 @@
CONFIG_IDF_TARGET="esp32s2"
CONFIG_SPIRAM_FETCH_INSTRUCTIONS=y
CONFIG_SPIRAM_RODATA=y

3
components/spi_flash/test_apps/flash_mmap/sdkconfig.ci.xip_psram_esp32s3 Normal file
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@ -0,0 +1,3 @@
CONFIG_IDF_TARGET="esp32s3"
CONFIG_SPIRAM_FETCH_INSTRUCTIONS=y
CONFIG_SPIRAM_RODATA=y

8
components/tcp_transport/test_apps/pytest_tcp_transport_ut.py
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@ -4,9 +4,13 @@
import pytest
from pytest_embedded import Dut
CONFIGS = [
pytest.param('default', marks=[pytest.mark.esp32, pytest.mark.esp32c3]),
pytest.param('psram_esp32', marks=[pytest.mark.esp32]),
]
@pytest.mark.esp32
@pytest.mark.esp32c3
@pytest.mark.generic
@pytest.mark.parametrize('config', CONFIGS, indirect=True)
def test_tcp_transport_client(dut: Dut) -> None:
dut.expect_unity_test_output()

1
components/tcp_transport/test_apps/sdkconfig.ci.psram → components/tcp_transport/test_apps/sdkconfig.ci.psram_esp32
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@ -1,3 +1,4 @@
CONFIG_IDF_TARGET="esp32"
CONFIG_UNITY_ENABLE_FIXTURE=y
CONFIG_SPIRAM=y
CONFIG_ESP_INT_WDT_TIMEOUT_MS=800

1
examples/peripherals/usb/device/tusb_msc/sdkconfig.defaults
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@ -1,7 +1,6 @@
# This file was generated using idf.py save-defconfig. It can be edited manually.
# Espressif IoT Development Framework (ESP-IDF) Project Minimal Configuration
#
CONFIG_TINYUSB=y
CONFIG_TINYUSB_MSC_ENABLED=y
CONFIG_PARTITION_TABLE_CUSTOM=y