alex/esp-idf
alex/esp-idf
1
0
Fork 0
mirror of https://github.com/espressif/esp-idf.git synced 2024-10-05 20:47:46 -04:00
Code Issues Actions 2 Packages Projects Releases Wiki Activity

change(cache): remove similar aim test

Browse Source
This commit is contained in:
Armando 2023-07-17 14:48:29 +08:00 committed by Armando (Dou Yiwen)
parent 75cec2d58a
commit 88c64f609b
1 changed files with 0 additions and 76 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

76
components/esp_mm/test_apps/mm/main/test_cache_msync.c
View File

@ -44,82 +44,6 @@ const static char *TAG = "CACHE_TEST";
#define RECORD_TIME_END(p_time) do{__t2 = esp_cpu_get_cycle_count(); p_time = (__t2 - __t1);} while(0)
#define GET_US_BY_CCOUNT(t) ((double)(t)/CONFIG_ESP_DEFAULT_CPU_FREQ_MHZ)
static const uint8_t s_test_buf[TEST_NUM] = TEST_BUF;
static DRAM_ATTR bool diff_res;
static DRAM_ATTR uint32_t s_check_times = 0;
static void NOINLINE_ATTR IRAM_ATTR s_test_rodata_cb(void *arg)
{
bool sync_flag = *(bool *)arg;
if (sync_flag) {
uint8_t cmp_buf[TEST_NUM] = TEST_BUF;
for (int i = 0; i < TEST_NUM; i++) {
if (cmp_buf[i] != s_test_buf[i]) {
diff_res |= true;
}
}
s_check_times++;
}
}
/**
* This test tests if the esp_cache_msync() suspending CPU->Cache access is short enough
* 1. Register an IRAM callback, but access rodata inside the callback
* 2. esp_cache_msync() will suspend the CPU access to the cache
* 3. Therefore the rodata access in `s_test_rodata_cb()` should be blocked, most of the times
* 4. Note if the callback frequency is less, there might be few successful rodata access, as code execution needs time
*/
TEST_CASE("test cache msync short enough when suspending an ISR", "[cache]")
{
uint32_t sync_time = 0;
uint32_t sync_time_us = 20;
RECORD_TIME_PREPARE();
//Do msync first, as the first writeback / invalidate takes long time, next msyncs will be shorter and they keep unchanged almost
RECORD_TIME_START();
TEST_ESP_OK(esp_cache_msync((void *)TEST_SYNC_START, TEST_SYNC_SIZE, ESP_CACHE_MSYNC_FLAG_DIR_C2M | ESP_CACHE_MSYNC_FLAG_INVALIDATE));
RECORD_TIME_END(sync_time);
sync_time_us = GET_US_BY_CCOUNT(sync_time);
printf("first sync_time_us: %"PRId32"\n", sync_time_us);
RECORD_TIME_START();
TEST_ESP_OK(esp_cache_msync((void *)TEST_SYNC_START, TEST_SYNC_SIZE, ESP_CACHE_MSYNC_FLAG_DIR_C2M | ESP_CACHE_MSYNC_FLAG_INVALIDATE));
RECORD_TIME_END(sync_time);
sync_time_us = GET_US_BY_CCOUNT(sync_time);
printf("sync_time_us: %"PRId32"\n", sync_time_us);
bool sync_flag = false;
esp_timer_handle_t timer;
const esp_timer_create_args_t oneshot_timer_args = {
.callback = &s_test_rodata_cb,
.arg = &sync_flag,
.dispatch_method = ESP_TIMER_ISR,
.name = "test_ro_suspend"
};
TEST_ESP_OK(esp_timer_create(&oneshot_timer_args, &timer));
uint32_t period = sync_time_us / 2;
TEST_ESP_OK(esp_timer_start_periodic(timer, period));
RECORD_TIME_START();
sync_flag = true;
TEST_ESP_OK(esp_cache_msync((void *)TEST_SYNC_START, TEST_SYNC_SIZE, ESP_CACHE_MSYNC_FLAG_DIR_C2M | ESP_CACHE_MSYNC_FLAG_INVALIDATE | ESP_CACHE_MSYNC_FLAG_UNALIGNED));
sync_flag = false;
RECORD_TIME_END(sync_time);
TEST_ESP_OK(esp_timer_stop(timer));
printf("s_check_times: %"PRId32"\n", s_check_times);
sync_time_us = GET_US_BY_CCOUNT(sync_time);
printf("sync time: %"PRId32" us\n", sync_time_us);
TEST_ASSERT((s_check_times < (sync_time_us / period)));
TEST_ASSERT(diff_res == false);
ESP_LOGI(TAG, "Finish");
TEST_ESP_OK(esp_timer_delete(timer));
}
static void s_test_with_msync_cb(void *arg)
{