Commit Graph

129 Commits

Author SHA1 Message Date
Omar Chebib
78a94dbb6c freertos: Fix delay between interrupt request and trigger on RISC-V
NOP instructions have been added in order to prevent the code
from executing code it shouldn't execute. This is due to a delay
between the moment an interrupt is requested and the moment it
is fired. It only happens on RISC-V SoC.
2021-02-25 06:57:59 +00:00
Marius Vikhammer
eec2419390 system: enable shared stack watchpoint
Enable shared stack watchpoint for overflow detection

Enable unit tests:
 * "test printf using shared buffer stack" for C3
 * "Test vTaskDelayUntil" for S2
 * "UART can do poll()" for C3
2021-02-18 15:38:30 +08:00
Ivan Grokhotkov
1402941402 test/freertos: add RISC-V support in thread local storage test 2021-01-24 12:38:15 +00:00
Marius Vikhammer
9c8e4fd4c5 C3: build and run unit tests
Enable building and running of unit tests in CI for C3 as well as fix
related compile errors

Also enables building of C3 test apps
2021-01-11 11:34:37 +08:00
Ivan Grokhotkov
7f3b16a99d freertos: always enable static allocation
to use it for newlib locks
2020-12-29 16:18:04 +01:00
Angus Gratton
87e13baaf1 freertos: Add RISC-V port
Changes come from internal branch commit a6723fc
2020-11-13 07:49:11 +11:00
Angus Gratton
66fb5a29bb Whitespace: Automated whitespace fixes (large commit)
Apply the pre-commit hook whitespace fixes to all files in the repo.

(Line endings, blank lines at end of file, trailing whitespace)
2020-11-11 07:36:35 +00:00
Angus Gratton
8a70b1cdc9 ci freertos: Add test configs for some of the optional FreeRTOS 10 configurations
Also unit tests for the legacy hook functions.
2020-10-21 14:04:01 +11:00
Felipe Neves
dfa2d547a7 freertos: pin timer task in core 0 plus fixed in SMP race conditions
freertos: replace the freertos regular malloc to the specific malloc from xtensa port for tcb and stack allocations

freertos: avoid the cpu1 to unwind pended ticks when xTaskResumeAll is called insed of an ISR

freertos: protected the xPortGetCoreID functions with missing critical sections

tests: re-eanble the ignored tests that was failling before race-condition fixes
2020-10-14 16:11:49 +11:00
Felipe Neves
3057b76a7e tests: re-add all disabled tests and all disabled configurations 2020-10-14 16:11:49 +11:00
Felipe Neves
d8ed9be1d4 freertos/timer: fix the static timer creation
Removes the not used spinlock field inside timer object which was causing assertion fail
2020-10-13 23:52:03 +00:00
Felipe Neves
a3c90bf59a freertos: merged freertos 10 kernel files into IDF
freertos/port: update the port files and split into xtensa and riscv ports

freertos: separated cpu files from rest of the kernel sources

freertos/port_xtensa: separated private include files into a folder

freertos/tasks: added task create pinned to core function do not break current IDF API

freertos/tasks: mimiced task create pinned function into tasks.c to do not break the IDF API.

freertos: freertos component now compiling

freertos: freertos component now building

freertos: moved critical sections outside from FR kernel section to portable section

portmacro_xtensa: add void indentifier on functions that take no arguments

freertos: fix critical sections implementation to match with their function prototype

freertos: add cmake changes of freertos into make

freertos: remove portDONT_DISCARD attribute from switch context function, it was breaking the docs building.

freertos: fix conflicitng types of vApplicationSleep function

license: update the license of freertos

freertos: Doxygen comments refactored to render them correctly on docs

freertos: added new functions of freertos into the documentation

freertos: added message buffers and stream buffers to documentation

sysview: update freertos system view to the compatible with version 10

freertos: fixed event group  documentation rendering

freertos:  update static task structure to match the actual tcb size

freertos: removed backported test functions

freertos/smp: brought SMP code to  FreeRTOS 10 port

freertos/portmacro: added missing crosscore interrupt for yielding tasks

freertos: replaced soft-critical sections with hard-critical sections used by SMP

freertos: placed muxes inside of kernel objects

freertos: replaced original FR critical sections with SMP enabled spinlocks critical sections

freertos: moved xtensa port files to a separated folder

freertos: added multiple instance of global variables required to SMP

freertos: added SMP modifications on specific tasks module functions

freertos: added TLS deletion function to task module

freertos/tls: initialize TLS deletion callback to avoid crashing when calling task delete

freertos: modified vTaskDelete to do not erase current task that runs on other core

freertos: reverted taskhandle and timerhandle as void* type

freertos: fixed de-referencing void pointer to get run time counter

freertos: fix system view trace enter macro arguments

freertos: Replaced soft critical sections with spinlocks on event_groups

freertos: fixed tick function to avoid calling tick hooks twice

freertos: Nofity give checking per CPU if schedule is suspended

freertos: added mpu release on TCB deletion

freertos: Added SMP changes when deleting a TCB on idle task

freertos/license: update freertos license in COPYRIGHT.rst

freertos: unicore configurations can use task create pinned to core, it will be always pinned to core 0

freertos/portmacro: added cpu_hal_get_core_id() function instead of inline assembly

freertos/xtensa:  update xtensa specific files used in master branch

newlib/locks: revert the preemption checking in lock acquisition and release

ref_clock: fix initial state of ref_clock interrupt handler

freertos: added missing critical sections and yielding checkings

freertos: remove magic numbers in vTaskDelete

freertos: added missing critical section in prvIsQueueEmpty
2020-10-13 23:52:03 +00:00
Ivan Grokhotkov
8bc19ba893 Merge branch 'feature/free_components_iram' into 'master'
freertos: free IRAM space moving task functions into flash memory

See merge request espressif/esp-idf!5648
2020-09-15 23:14:31 +08:00
Alex Lisitsyn
eaa892bebf freertos: optionally place selected freertos functions into flash memory instead of IRAM
correct generation.py script to be silent when file: function is not in the object list (just ignore placement)
correct linker.lf to place task functions into flash if CONFIG_FREERTOS_TASK_FUNCTIONS_INTO_FLASH is active otherwise into IRAM
update kconfig option to place functions into IRAM
update linker file after tests
fix spi_device_polling_end crash when xTaskGetTickCount() in flash
disable "yield from lower priority task, other CPU" test case when placing rtos functions into flash
upadate ut app config freertos_flash
combine spi_flash driver and freertos ut configs into one file
remove TEST_EXCLUDE_COMPONENTS
ci: fix ut job
remove functions that are called from ISR funcs
add port module functions to place into Flash
place snapshot funcs into Flash when ESP_PANIC_HANDLER_IRAM is not set
ci: add job with tags UT_T1_GPIO,ESP32_IDF
2020-09-15 23:14:31 +08:00
Felipe Neves
c471cce26c freertos/tests: added isr latency test with no parameter and parameter based yield from ISR 2020-09-14 16:12:38 +00:00
Felipe Neves
36b2737bb1 freertos/xtensa: make vportYIELD_FROM_ISR compatible with version that both takes argument or not 2020-09-14 16:12:38 +00:00
Ivan Grokhotkov
b6467257b9 Merge branch 'feature/cmock_component' into 'master'
cmock as component replacing unity

See merge request espressif/esp-idf!9859
2020-09-10 16:06:20 +08:00
Ivan Grokhotkov
04b95f3567 freertos: don't clobber a4 while spilling register windows
Commit 891eb3b0 was fixing an issue with PS and EPC1 not being
preserved after the window spill procedure. It did so by saving PS in
a2 and EPC1 in a4. However the a4 register may be a live register of
another window in the call stack, and if it is overwritten and then
spilled to the stack, then the corresponding register value will end
up being corrupted. In practice the problem would show up as an
IllegalInstruction exception, when trying to return from a function
when a0 value was 0x40020.
Fix by using a0 register instead of a4 as scratch. Also fix a comment
about xthal_save_extra_nw, as this function in fact doesn't clobber
a4 or a5 because XCHAL_NCP_NUM_ATMPS is defined as 1.

Closes https://github.com/espressif/esp-idf/issues/5758
2020-09-02 15:40:41 +02:00
Jakob Hasse
20c068ef3b cmock: added cmock as component
* changing dependencies from unity->cmock
* added component.mk and Makefile.projbuild
* ignore test dir in gen_esp_err_to_name.py
* added some brief introduction of CMock in IDF
2020-09-02 16:38:37 +08:00
morris
2917651478 esp_rom: extract common ets apis into esp_rom_sys.h 2020-07-27 15:27:01 +08:00
Ivan Grokhotkov
8e6d450a8c Revert "Merge branch 'feature/gdb_stub_task_state' into 'master'"
This reverts commit c41a0c1907, reversing
changes made to 5c1d317766.
2020-07-09 17:16:47 +02:00
Darian Leung
11d96b39d0 esp_ipc: Move to new component
This commit moves esp_ipc into a separate component.
2020-05-18 16:51:45 +08:00
Angus Gratton
c41a0c1907 Merge branch 'feature/gdb_stub_task_state' into 'master'
feature/gdb_stub: make task state available on info thread command when in gdb stub.

Closes IDF-720

See merge request espressif/esp-idf!8371
2020-04-29 13:21:31 +08:00
Felipe Neves
140c5e0677 freertos: added task state field inside of TaskSnapshot_t to capture it. 2020-04-27 14:41:55 +00:00
Felipe Neves
5847e0afd2 freertos/test: fix overflow on accumulator used on scheduling time test 2020-04-27 14:20:13 +00:00
morris
91e62f4e37 timer_group: update hal api && fix intr_enable
timer group interrupt enable is controled by level_int_ena instead of int_ena

Closes https://github.com/espressif/esp-idf/issues/5103
2020-04-23 19:29:15 +08:00
Renz Bagaporo
3d0967a58a test: declare requirements and include dirs private 2020-03-23 10:58:50 +08:00
Sachin Parekh
301dacfb33 Exception handlers for LoadStoreError and LoadStoreAlignmentError
Configurable option to use IRAM as byte accessible memory (in single core mode) using
load-store (non-word aligned and non-word size IRAM access specific) exception handlers.
This allows to use IRAM for use-cases where certain performance penalty
(upto 170 cpu cycles per load or store operation) is acceptable. Additional configuration
option has been provided to redirect mbedTLS specific in-out content length buffers to
IRAM (in single core mode), allows to save 20KB per TLS connection.
2020-02-26 20:21:59 +08:00
Angus Gratton
86034ad049 Merge branch 'feature/freertos_fpu_isr' into 'master'
feature/fpu: Enable usage of FPU inside of a ISR

Closes IDF-100

See merge request espressif/esp-idf!7348
2020-01-30 13:38:37 +08:00
Felipe Neves
429712c6eb freertos: moved all xtensa specific files into a separated folder 2020-01-27 16:05:30 -03:00
Felipe Neves
5cbb3f05c0 freertos: Added experimental, optional FPU usage on level 1 ISR 2020-01-27 10:55:03 -03:00
Felipe Neves
670ea56df2 freertos: added fpu in isr test case 2020-01-27 10:55:03 -03:00
Ivan Grokhotkov
cbb84e8f5e esp32s2: fix THREADPTR calculation, re-enable FreeRTOS TLS tests
1. Clarify THREADPTR calculation in FreeRTOS code, explaining where
the constant 0x10 offset comes from.

2. On the ESP32-S2, .flash.rodata section had different default
alignment (8 bytes instead of 16), which resulted in different offset
of the TLS sections. Unfortunately I haven’t found a way to query
section alignment from C code, or to use a constant value to define
section alignment in the linker script. The linker scripts are
modified to force a fixed 16 byte alignment for .flash.rodata on the
ESP32 and ESP32-S2beta. Note that the base address of .flash.rodata
was already 16 byte aligned, so this has not changed the actual
memory layout of the application.

Full explanation of the calculation below.

Assume we have the TLS template section base address
(tls_section_vma), the address of a TLS variable in the template
(address), and the final relocation value (offset). The linker
calculates:
offset = address - tls_section_vma + align_up(TCB_SIZE, alignment).

At run time, the TLS section gets copied from _thread_local_start
(in .rodata) to task_thread_local_start. Let’s assume that an address
of a variable in the runtime TLS section is runtime_address.
Access to this address will happen by calculating THREADPTR + offset.
So, by a series of substitutions:

THREADPTR + offset = runtime_address THREADPTR = runtime_address - offset
THREADPTR = runtime_address - (address - tls_section_vma + align_up(TCB_SIZE, alignment)) THREADPTR = (runtime_address - address) + tls_section_vma - align_up(TCB_SIZE, alignment)

The difference between runtime_address and address is same as the
difference between task_thread_local_start and _thread_local_start.
And tls_section_vma is the address of .rodata section, i.e.
_rodata_start. So we arrive to

THREADPTR = task_thread_local_start - _thread_local_start + _rodata_start - align_up(TCB_SIZE, alignment).

The idea with TCB_SIZE being added to the THREADPTR when computing
the relocation was to let the OS save TCB pointer in the TREADPTR
register. The location of the run-time TLS section was assumed to be
immediately after the TCB, aligned to whatever the section alignment
was. However in our case the problem is that the run-time TLS section
is stored not next to the TCB, but at the top of the stack. Plus,
even if it was stored next to the TCB, the size of a FreeRTOS TCB is
not equal to 8 bytes (TCB_SIZE hardcoded in the linker). So we have
to calculate THREADPTR in a slightly obscure way, to compensate for
these differences.

Closes IDF-1239
2020-01-23 11:29:22 +01:00
morris
e30cd361a8 global: rename esp32s2beta to esp32s2 2020-01-22 12:14:38 +08:00
Felipe Neves
2c612ec1dc components/freertos: using the optimized task selection on esp32s2beta
components/freertos: cleaned up multicore option scheduler.

components/freertos:  more cleanup and test optimization to present realistic results

components/freertos: remove unused macros of optimized task selection when multicore is used
2020-01-14 09:58:14 -03:00
Felipe Neves
77bf1ff1c0 freertos/tests: added test to evaluate scheduling time
freertos/Kconfig: fix trailing space on optimized scheduler option

freertos/tests: moved test context variables inside of test task.

The public variables used on scheduling time test now were packed into a structure allocated on  test case task stack and passed to tasks as arguments saving RAM comsumption.
2020-01-14 09:58:14 -03:00
michael
4220752aed ut: Move tests back from "esp32" subfolder
DISABLED_FOR_TARGETS macros are used

Partly revert "ci: disable unavailable tests for esp32s2beta"

This partly reverts commit 76a3a5fb48.

Partly revert "ci: disable UTs for esp32s2beta without runners"

This partly reverts commit eb158e9a22.

Partly revert "fix unit test and examples for s2beta"

This partly reverts commit 9baa7826be.

Partly revert "efuse: Add support for esp32s2beta"

This partly reverts commit db84ba868c.
2020-01-06 17:13:53 +08:00
Mahavir Jain
2e73c2818b freertos: re-enable mutext test for esp32s2beta 2019-12-16 11:55:32 +05:30
Mahavir Jain
8e28226935 Disable few test cases for ESP32S2BETA
These test cases will be fixed in subsequent MR
2019-12-09 16:30:55 +05:30
Mahavir Jain
a737fd4865 Fix issue with timer usage in FreeRTOS tests 2019-12-09 13:33:45 +05:30
Felipe Neves
57522059aa freertos/tests: fixed wrong header file on isr latency test 2019-12-04 10:41:00 -03:00
Felipe Neves
0ea6453b1c freertos: changed isr time test case variables to static 2019-12-04 10:41:00 -03:00
Felipe Neves
55cbc213f3 components/freertos: create the test task with highest priority to ensure peer-to-peer ISR to task sync 2019-12-04 10:40:27 -03:00
Felipe Neves
64a50f0423 components/freertos: fixed isr test failling when run multiple times 2019-12-04 10:40:27 -03:00
Felipe Neves
bcdc35be59 components/freertos: refactor of isr_latency tests to perform full measurement 2019-12-04 10:39:22 -03:00
Felipe Neves
c14fc39b0a components/freertos: fixed typos and licence placement on external code 2019-12-04 10:39:22 -03:00
Felipe Neves
64f918bd70 freertos/xtensa_context: added conditional compiling option around isr cycle measurement
It is possible to enable and disable the isr time measurement on context save and
it related test via menuconfig by the new option: FREERTOS_ISR_STATS
2019-12-04 10:39:22 -03:00
Felipe Neves
346b12e29a freertos/test: added spill register timer measurement test 2019-12-04 10:39:22 -03:00
chenjianqiang
9f9da9ec96 feat(timer): refator timer group driver
1. add hal and low-level layer for timer group
2. add callback functions to handle interrupt
3. add timer deinit function
4. add timer spinlock take function
2019-11-21 14:14:19 +08:00
Michael (XIAO Xufeng)
9baa7826be fix unit test and examples for s2beta 2019-09-04 10:53:25 +10:00