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test/freertos: add RISC-V support in thread local storage test

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This commit is contained in:
Ivan Grokhotkov 2020-12-24 01:55:10 +01:00 committed by bot
parent b2aaebaf85
commit 1402941402
1 changed files with 30 additions and 22 deletions
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52
components/freertos/test/test_thread_local.c
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@ -3,6 +3,7 @@
*/
#include <string.h>
#include <stdlib.h>
#include <esp_types.h>
#include "freertos/FreeRTOS.h"
@ -11,7 +12,12 @@
#include "test_utils.h"
#include "sdkconfig.h"
#if !TEMPORARY_DISABLED_FOR_TARGETS(ESP32C3)
#if defined(__XTENSA__)
#define GET_THREADPTR(tp_dest) do { asm volatile ("rur.threadptr %0":"=r"(tp_dest)); } while(0)
#elif defined (__riscv)
#define GET_THREADPTR(tp_dest) do { register uint32_t _tp asm("tp"); tp_dest = _tp; } while(0)
#endif
static __thread int tl_test_var1;
static __thread uint8_t tl_test_var2 = 55;
@ -27,17 +33,19 @@ static __thread struct test_tls_var {
static void task_test_tls(void *arg)
{
bool *running = (bool *)arg;
uint32_t tp = (uint32_t)-1;
uint32_t tp = (uint32_t) -1;
int test_var1_old = 0;
uint8_t test_var2_old = 0;
uint16_t test_var3_old = 0;
int f32_old = 0;
uint8_t f8_old = 0;
uint16_t f16_old = 0;
srand((int) xTaskGetCurrentTaskHandle());
int step = (rand() % 10) + 1;
asm volatile ("rur.threadptr %0":"=r"(tp));
GET_THREADPTR(tp);
for (int i = 0; i < 5; i++) {
printf("Task[%x]: var = 0x%x 0x%x\n", tp, tl_test_var1, tl_test_var2);
printf("Task[%x]: var = 0x%x 0x%x step=%d\n", tp, tl_test_var1, tl_test_var2, step);
if (i == 0) {
TEST_ASSERT_EQUAL(0, tl_test_var1);
TEST_ASSERT_EQUAL(55, tl_test_var2);
@ -52,33 +60,34 @@ static void task_test_tls(void *arg)
TEST_ASSERT_EQUAL(0, tl_test_struct_var.farr[k]);
}
} else {
TEST_ASSERT_EQUAL(test_var1_old+1, tl_test_var1);
TEST_ASSERT_EQUAL(test_var2_old+1, tl_test_var2);
TEST_ASSERT_EQUAL(test_var3_old+1, tl_test_var3);
TEST_ASSERT_EQUAL(test_var1_old + step, tl_test_var1);
TEST_ASSERT_EQUAL(test_var2_old + step, tl_test_var2);
TEST_ASSERT_EQUAL(test_var3_old + step, tl_test_var3);
for (int k = 0; k < sizeof(tl_test_arr_var); k++) {
TEST_ASSERT_EQUAL(i-1, tl_test_arr_var[k]);
TEST_ASSERT_EQUAL((i - 1) * step, tl_test_arr_var[k]);
}
TEST_ASSERT_EQUAL(f32_old+1, tl_test_struct_var.f32);
TEST_ASSERT_EQUAL(f8_old+1, tl_test_struct_var.f8);
TEST_ASSERT_EQUAL(f16_old+1, tl_test_struct_var.f16);
TEST_ASSERT_EQUAL(f32_old + step, tl_test_struct_var.f32);
TEST_ASSERT_EQUAL(f8_old + step, tl_test_struct_var.f8);
TEST_ASSERT_EQUAL(f16_old + step, tl_test_struct_var.f16);
for (int k = 0; k < sizeof(tl_test_struct_var.farr); k++) {
TEST_ASSERT_EQUAL(i-1, tl_test_struct_var.farr[k]);
TEST_ASSERT_EQUAL((i - 1) * step, tl_test_struct_var.farr[k]);
}
}
test_var1_old = tl_test_var1;
test_var2_old = tl_test_var2;
test_var3_old = tl_test_var3;
f32_old = tl_test_struct_var.f32;
f8_old = tl_test_struct_var.f8;
f16_old = tl_test_struct_var.f16;
tl_test_var1++;
tl_test_var2++;
tl_test_var3++;
memset(tl_test_arr_var, i, sizeof(tl_test_arr_var));
tl_test_struct_var.f32++;
tl_test_struct_var.f8++;
tl_test_struct_var.f16++;
memset(tl_test_struct_var.farr, i, sizeof(tl_test_struct_var.farr));
tl_test_var1 += step;
tl_test_var2 += step;
tl_test_var3 += step;
memset(tl_test_arr_var, i * step, sizeof(tl_test_arr_var));
tl_test_struct_var.f32 += step;
tl_test_struct_var.f8 += step;
tl_test_struct_var.f16 += step;
memset(tl_test_struct_var.farr, i * step, sizeof(tl_test_struct_var.farr));
vTaskDelay(10);
}
@ -103,10 +112,9 @@ TEST_CASE("TLS test", "[freertos]")
xTaskCreatePinnedToCore((TaskFunction_t)&task_test_tls, "task_test_tls", stack_size, &running[0],
UNITY_FREERTOS_PRIORITY, NULL, 0);
xTaskCreateStaticPinnedToCore((TaskFunction_t)&task_test_tls, "task_test_tls", stack_size, &running[1],
UNITY_FREERTOS_PRIORITY, s_stack, &s_task, other_core);
UNITY_FREERTOS_PRIORITY, s_stack, &s_task, other_core);
while (running[0] || running[1]) {
vTaskDelay(10);
}
vTaskDelay(10); /* Make sure idle task can clean up s_task, before it goes out of scope */
}
#endif // #if !TEMPORARY_DISABLED_FOR_TARGETS(ESP32C3)