alex/esp-idf
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21,138 Commits 20 Branches 148 Tags 384 MiB
7905f0d3f8
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156 Commits

Author SHA1 Message Date
Jiang Jiang Jian
7905f0d3f8 Merge branch 'feature/adds_efuses_to_table_v4.4' into 'release/v4.4' 
efuse: Adds ERR_RST_ENABLE efuse for C3 (v4.4)

See merge request espressif/esp-idf!18419
 2022-06-09 10:53:16 +08:00
Michael (XIAO Xufeng)
f86be6141b Merge branch 'bugfix/i2c_timeout_issue_v4.4' into 'release/v4.4' 
I2C: patch for solving watchdog timeout issue(backport v4.4)

See merge request espressif/esp-idf!18130
 2022-06-08 14:12:37 +08:00
KonstantinKondrashov
1979c68e82 efuse: Adds ERR_RST_ENABLE efuse for C3 and S3 
Closes https://github.com/espressif/esp-idf/issues/8357
 2022-06-07 22:06:45 +08:00
Michael (XIAO Xufeng)
f46bd50884 pm: putting dbias and pd_cur code into same function 2022-06-05 02:33:51 +08:00
Michael (XIAO Xufeng)
254870c3c4 rtc: fixed 8MD256 can't be used as RTC slow src on ESP32 
Sync configuration from other chips

Closes: https://github.com/espressif/esp-idf/issues/8007, https://github.com/espressif/esp-idf/pull/8089
 2022-06-05 02:33:50 +08:00
Jiang Jiang Jian
fc30369909 Merge branch 'bugfix/update_efuse_name_v4.4' into 'release/v4.4' 
efuse: update efuse name (backport v4.4)

See merge request espressif/esp-idf!18195
 2022-05-30 11:15:16 +08:00
Wu Zheng Hui
2e4784611d efuse: update efuse name (backport v4.4) 2022-05-30 11:15:16 +08:00
morris
0340c2f2bc Merge branch 'bugfix/keep_rtc8m_in_lightsleep_v4.4' into 'release/v4.4' 
pm: fixed RTC8M domain power down issue when used as RTC source (v4.4)

See merge request espressif/esp-idf!18075
 2022-05-30 09:54:39 +08:00
chaijie
d222adbeeb solve memory error bug when in lightsleep mode 2022-05-18 17:43:13 +08:00
Cao Sen Miao
04f7c342f0 I2C: patch for solving watchdog timeout issue 2022-05-17 16:36:40 +08:00
Michael (XIAO Xufeng)
17b9cc6b4a pm: fixed RTC8M domain power issues 
introduced in e44ead5356

1. The int8M power domain config by default is PD. While LEDC is using
RTC8M as clock source, this power domain will be kept on.

But when 8MD256 is used as RTC clock source, the power domain should
also be kept on.

On ESP32, there was protection for it, but broken by commit
e44ead5356. Currently the power domain
will be forced on when LEDC is using RTC8M as clock source &&
!int8m_pd_en (user enable ESP_PDP_DOMAIN_RTC8M in lightsleep). Otherwise
the power domain will be powered off, regardless of RTC clock source.

In other words, int8M domain will be forced off (even when 8MD256
used as RTC clock source) if LEDC not using RTC8M as clock source, user
doesn't enable ESP_PDP_DOMAIN_RTC8M, or in deep sleep.

On later chips, there's no such protection, so 8MD256 could't be used as
RTC clock source in sleep modes.

This commit adds protection of 8MD256 clock to other chips. Fixes the
incorrect protection logic overriding on ESP32. Now the power domain
will be determiend by the logic below (order by priority):

    1. When RTC clock source uses 8MD256, power up
    2. When LEDC uses RTC8M clock source, power up
    3. In deepsleep, power down
    4. Otherwise determined by user config of ESP_PDP_DOMAIN_RTC8M,
       power down by default. (This is preferred to have highest
       priority, but it's kept as is because of current code structure.)

2. Before, after the macro `RTC_SLEEP_CONFIG_DEFAULT` decides dbias, the
protection above may force the int8m PU. This may cause the inconsistent
of dbias and the int8m PU status.

This commit lifts the logic of pd int8m/xtal fpu logic to upper layer
(sleep_modes.c).

Related: https://github.com/espressif/esp-idf/issues/8007, https://github.com/espressif/esp-idf/pull/8089

temp
 2022-05-12 15:57:09 +08:00
Jiang Jiang Jian
f0e894e540 Merge branch 'bugfix/remove_c_series_chips_unsupported_efuse_field_backport_v4.4' into 'release/v4.4' 
efuse: free esp32c3/esp32h2 unused efuse field (backport v4.4)

See merge request espressif/esp-idf!17292
 2022-03-02 18:36:13 +08:00
morris
5f56bbd2d0 Merge branch 'bugfix/rtcio_increase_size_v4.4' into 'release/v4.4' 
sleep: fixed ext1 cannot wakeup via RTCIO >= 18 issue (v4.4)

See merge request espressif/esp-idf!17201
 2022-03-02 16:53:05 +08:00
songruojing
bdd7610e66 uart: fixed incorrect channel number on ESP32S2, S3 and C3 2022-03-02 02:42:06 +08:00
wuzhenghui
c6aa1cf732 remove esp32c3 unsupported efuse field 2022-02-28 17:26:28 +08:00
Michael (XIAO Xufeng)
21b80a969f soc: updated soc_caps about rtc_io and the format 2022-02-18 11:44:43 +08:00
Cao Sen Miao
a74e06560b USB_SERIAL_JTAG: Fix the issue that there is no rom log when restarting 2022-02-15 18:56:06 +08:00
Michael (XIAO Xufeng)
8b86834a72 Merge branch 'bugfix/gpio_pin_num_fix_v4.4' into 'release/v4.4' 
gpio: Fix some gpio pin num errors on esp32s2 and esp32c3 (backport v4.4)

See merge request espressif/esp-idf!16594
 2022-02-10 10:21:52 +00:00
Martin Vychodil
7d9652dccf System/Security: Memprot API unified (ESP32C3,ESP32S3) 
Unified Memory protection API for all PMS-aware chips

Closes JIRA IDF-3849
 2022-01-27 12:40:27 +08:00
KonstantinKondrashov
1638b36804 efuse: Fixes eFuse timesettings issue on esp32c3 2022-01-25 19:14:31 +08:00
songruojing
b25fb1111d gpio: Fix some gpio pin num errors on esp32s2 and esp32c3 2021-12-30 12:27:14 +08:00
Armando
1ec46ad3b8 adc: support adc dma driver on all chips 2021-12-23 17:13:46 +08:00
Jiang Jiang Jian
f5ae8b0533 Merge branch 'feature/ledc_use_rtc8m_or_xtal_lightsleep' into 'master' 
support RTC8M and XTAL power domain in light sleep mode

Closes IDF-3419

See merge request espressif/esp-idf!15152
 2021-09-27 04:02:29 +00:00
morris
20ef511d0a Merge branch 'bugfix/fix_reg_name_charactor_err' into 'master' 
bugfix: fix reg name character error

See merge request espressif/esp-idf!14169
 2021-09-18 07:10:57 +00:00
Jiang Jiang Jian
3b48b7e663 Merge branch 'Fix/update_reset_reason' into 'master' 
update reset reason for c3/s3/h2

See merge request espressif/esp-idf!14747
 2021-09-18 07:03:50 +00:00
Wu Zheng Hui
85651b4791 efuse: remove DIS_RTC_RAM_BOOT efuse bit 2021-09-18 14:58:43 +08:00
Wu Zheng Hui
27241e8213 Merge branch 'bugfix/fix_efuse_err_address' into 'master' 
fix efuse err address in block0

See merge request espressif/esp-idf!14790
 2021-09-17 02:17:09 +00:00
Wu Zheng Hui
1080e4f6a2 rename APB_CTRL ro SYS_CON 
save
 2021-09-16 20:57:57 +08:00
wuzhenghui
352ffbb78d fix c3 efuse err address in block0 2021-09-16 20:08:59 +08:00
Li Shuai
b3e27403f3 esp_hw_support: keep external 40 MHz xtal related analog circuit power on during sleep 2021-09-16 14:46:21 +08:00
Li Shuai
58292a7d22 Power Management: add XTAL power domain to control whether external 40MHz xtal is powered down during sleep 2021-09-16 14:43:43 +08:00
Li Shuai
f5b39a7cde esp_hw_support: No voltage drop during light sleep to ensure stable output clock of rtc8m oscillator 2021-09-16 14:40:46 +08:00
wuzhenghui
b2c028085a fix reg name character error 2021-09-15 21:51:20 +08:00
Armando (Dou Yiwen)
13b63cd9d2 Merge branch 'feature/support_adc_calibration_s3' into 'master' 
adc: support adc calibration on s3

Closes IDF-1950, IDF-3730, and IDF-3036

See merge request espressif/esp-idf!15031
 2021-09-14 08:51:03 +00:00
morris
502e132e5d Merge branch 'feature/fast_gpio_c3' into 'master' 
fast gpio support on esp32-c3

Closes IDF-3783

See merge request espressif/esp-idf!14986
 2021-09-14 06:09:34 +00:00
Armando
c45c6f52f1 adc: support adc efuse-based calibration on esp32s3 2021-09-14 11:42:50 +08:00
Li Shuai
e44ead5356 Power Management: add RTC8M power domain to control whether internal 8m oscillator is powered down during sleep 2021-09-13 17:36:54 +08:00
morris
6cec256a34 fast_gpio: driver support on esp32c3 2021-09-06 19:39:09 +08:00
Sachin Parekh
fa2707f1f3 hmac: Added Downstream JTAG enable mode for esp32c3 and esp32s3 
If JTAG is disabled temporarily by burning SOFT_DIS_JTAG, it can be
re-enabled temporarily through esp_hmac_jtag_enable API
 2021-09-06 11:06:50 +05:30
Marius Vikhammer
bdf3a8ff29 Merge branch 'feature/xtwdt' into 'master' 
WDT: Add support for XTAL32K Watchdog timer

Closes IDF-2575

See merge request espressif/esp-idf!15000
 2021-09-02 02:44:47 +00:00
Marius Vikhammer
4869b3cd4a WDT: Add support for XTAL32K Watchdog timer 2021-09-02 09:09:00 +08:00
morris
2e0ffbd543 Merge branch 'bugfix/fix-driver-8_16bit-reg-access' into 'master' 
bugfix/driver: fix and cleanup soc/ll stuffs

Closes IDF-3722

See merge request espressif/esp-idf!14829
 2021-08-30 10:27:05 +00:00
Michael (XIAO Xufeng)
59cedcb748 soc: remove outdated description of interrupts on RISCV CPUs 2021-08-30 17:38:16 +08:00
SalimTerryLi
892f5e7df3
timer_group: fix wrongly generated reg header that introduced in 443845fd54 2021-08-30 13:51:25 +08:00
SalimTerryLi
874a720286
soc/ll: workaround compiler bug that generate 8/16 bits inst instead of 32 bits one 
update all struct headers to be more "standardized":

- bit fields are properly wrapped with struct
- bitwidth sum should be 32 within same struct, so that it's correctly padded with reserved bits
- bit field should be uint32_t
- typedef volatile struct xxx{} yyy;: xxx must exists. refer: https://github.com/espressif/esp-idf/pull/3199

added helper macros to force peripheral registers being accessed in 32 bitwidth

added a check script into ci
 2021-08-30 13:50:58 +08:00
SalimTerryLi
443845fd54
timer_group: update reg headers for c3&s2&h2 and fix direct 8/16bit reg access 2021-08-19 18:56:32 +08:00
wuzhenghui
f913a10a22 update reset reason for c3/s3/h2 2021-08-13 17:45:53 +08:00
Michael (XIAO Xufeng)
947980ecac Merge branch 'bugfix/uart_set_pin_use_iomux' into 'master' 
uart: uart_set_pin function will now use IOMUX whenever possible

Closes IDF-3183

See merge request espressif/esp-idf!14318
 2021-08-05 04:17:29 +00:00
Omar Chebib
779e7400b0 uart: uart_set_pin function will now use IOMUX whenever possible 
By using IOMUX instead of GPIO Matrix for UART, it is now possible
on ESP32 boards to use the UART as a wake up source even if it is
not used as a console.
For other boards where this issue was not present, using IOMUX has
the advantage to be faster than using GPIO matrix, so a highest
baudrate can be used
 2021-08-04 12:48:30 +08:00
laokaiyao
3c57a6ac36 driver/i2s: refactor ll and hal 2021-08-04 10:20:03 +08:00