Commit Graph

125 Commits

Author SHA1 Message Date
Song Ruo Jing
2c9aa4559c clk_tree: Add a general API to get the frequency of different clocks
Add basic clk_tree driver and hal implementation.
2023-01-17 11:30:24 +08:00
Armando (Dou Yiwen)
d1b8da74d8 Merge branch 'refactor/improve_adc_power_maintanance' into 'master'
adc: improve adc power maintanance

Closes IDF-6114 and IDF-6318

See merge request espressif/esp-idf!21151
2023-01-12 20:30:36 +08:00
jiangguangming
4b4491e736 rtc_time.c: simplify the rtc_time_get with LL function 2023-01-10 17:03:54 +08:00
Armando
5be3c21cfc adc: improve power logic 2023-01-09 17:10:04 +08:00
Armando
f9da48d94f rtc: add pwdet and sar adc power related low level func 2023-01-09 17:09:01 +08:00
morris
672ac58ad5 io_mux: can set different clock source 2022-12-29 14:46:16 +08:00
Song Ruo Jing
182e937c5a clk_tree: Add basic clock support for esp32c6
- Support SOC ROOT clock source switch
    - Support CPU frequency change
    - Support RTC SLOW clock source switch
    - Support RTC SLOW clock + RC FAST calibration

    Remove FPGA build for esp32c6
2022-12-13 19:18:34 +08:00
KonstantinKondrashov
741e89cbaa esp_hw_support: Removes efuse dependency 2022-11-25 19:27:33 +08:00
Aditya Patwardhan
f79d8f9c07 esp_hw_support: Merge esp_ds.c file for different targets into one 2022-11-24 16:03:30 +05:30
Aditya Patwardhan
6a75fe5912 esp_hw_support: Update build system support for mergin esp_ds.c files
into one
2022-11-24 16:03:23 +05:30
Aditya Patwardhan
efd05fdebb esp32c3/esp_ds.c: Fix RSA_LEN_MAX variable 2022-11-24 15:53:51 +05:30
KonstantinKondrashov
244cf14ea8 esp_hw_support: Adds APIs to define user own MAC addresses without generation from the base MAC address
Closes https://github.com/espressif/esp-idf/pull/7261
Closes https://github.com/espressif/esp-idf/issues/9531
2022-11-16 19:23:10 +08:00
KonstantinKondrashov
1f9260d790 all: Apply new version logic (major * 100 + minor) 2022-11-03 08:36:23 +00:00
Armando
260ee86c37 rtc: united sar peripheral control 2022-10-27 16:51:25 +08:00
Aditya Patwardhan
f9565fd31d soc/esp_ds.h: Unify esp_ds error codes for all targets 2022-10-27 11:09:25 +05:30
Aditya Patwardhan
c8a788ca24 esp_hw_support: Merge HMAC source files into one 2022-10-27 10:59:54 +05:30
wuzhenghui
6b96534c68 bugfix: esprv_intc_int_set_type() should not use bitmap parameter 2022-10-14 11:31:22 +08:00
cje
4dddb6d8e8 fix system not stable bug when dbias storing in efuse is bigger than 27 2022-09-30 19:24:51 +08:00
jingli
05a2fbe810 esp_hw_support/clk_cali: fix xtal32k error detect 2022-09-21 03:03:25 +00:00
songruojing
e8915e14e7 esp_hw_support: fix wrong register access to set/clear rtc fast mem low power mode on c3 and h2 2022-08-03 14:33:13 +08:00
Armando
5e6a16380a esp_adc: move adc common hw related code into esp_hw_support 2022-07-28 03:49:48 +00:00
morris
5e50ec1d66 systimer: add helper functions to convert between tick and us 2022-07-25 16:08:52 +08:00
Guillaume Souchere
0bac33ed41 esp_system: Remove deprecate section from esp_cpu.h
- Remove esp_cpu_in_ocd_mode() from esp_cpu.h. Users should call esp_cpu_dbgr_is_attached() instead.
- Remove esp_cpu_get_ccount() from esp_cpu.h. Users should call esp_cpu_get_cycle_count() instead.
- Remove esp_cpu_set_ccount() from esp_cpu.h. Users should call esp_cpu_set_cycle_count() instead.
- Other IDF components updated to call esp_cpu_dbgr_is_attached(), esp_cpu_get_cycle_count() and esp_cpu_set_cycle_count() as well.
2022-07-22 00:06:06 +08:00
Guillaume Souchere
6005cc9163 hal: Deprecate interrupt_controller_hal.h, cpu_hal.h and cpu_ll.h interfaces
This commit marks all functions in interrupt_controller_hal.h, cpu_ll.h and cpu_hal.h as deprecated.
Users should use functions from esp_cpu.h instead.
2022-07-22 00:06:06 +08:00
Martin Vychodil
0c87ae2a91 System/Security: Memprot API unified (ESP32S3)
Added missing features and improvements
2022-07-09 22:57:51 +02:00
KonstantinKondrashov
0f8ff5aa15 efuse: Adds major and minor versions and others 2022-07-05 14:38:27 +08:00
Omar Chebib
cd48baf979 Refactor: move regi2c_*.h header files from esp_hw_support to soc component
When creating G0 layer, some regi2c_*.h headers were moved out from
esp_hw_support (G1) to soc (G0). In order to be consistent with that change,
move all the remaining regi2c_*.h headers to soc too.
2022-06-30 09:40:44 +00:00
morris
7fd9a91034 dma: move from driver to hw_support 2022-06-28 14:17:12 +08:00
Omar Chebib
8fae0f0753 G0: Support Xtensa targets for G0-only compilation
G0-only example now supports Xtensa targets. This means that G0 layer
does not depend on G1+ layers anymore
2022-06-20 11:34:20 +00:00
Martin Vychodil
339fcbf14d System/Security: Memprot API unified (ESP32S3)
Unified Memory protection API for all PMS-aware chips - ESP32S3 port
2022-06-20 02:36:44 +00:00
Omar Chebib
752026a174 Merge branch 'refactor/remove_g0_dep_on_g1_riscv' into 'master'
G0: RISC-V targets have now an independent G0 layer

See merge request espressif/esp-idf!17926
2022-06-16 11:53:39 +08:00
Darian
e213e66ba3 Merge branch 'refactor/esp_hw_support_cpu' into 'master'
esp_hw_support: Add new esp_cpu.h abstraction

Closes IDF-4769

See merge request espressif/esp-idf!17091
2022-06-14 21:11:30 +08:00
Omar Chebib
2fd784c97a G0 RISC-V: Remove "private_include/regi2c_brownout.h" header as it has been moved and simplify "regi2c_ctrl.h" 2022-06-14 15:00:53 +08:00
Omar Chebib
5bcd9b2db8 G0: RISC-V targets have now an independent G0 layer
G0 doesn't depend on any G1+ layer for RISC-V based targets
2022-06-14 15:00:53 +08:00
Darian Leung
61eb7baa6b esp_hw_support: Add esp_cpu.h abstraction and API
This commit updates the esp_cpu.h API. The new API presents a new
abstraction of the CPU where CPU presents the following interfaces:

- CPU Control (to stall/unstall/reset the CPU)
- CPU Registers (to read registers commonly used in SW such as SP, PC)
- CPU Interrupts (to inquire/allocate/control the CPUs 32 interrupts)
- Memory Port (to configure the CPU's memory bus for memory protection)
- Debugging (to configure/control the CPU's debugging port)

Note: Also added FORCE_INLINE_ATTR to the DoxyFile in order to pass doc
        builds for esp_cpu.h
2022-06-14 14:30:58 +08:00
Darian Leung
556ec30457 esp_hw_support: Rename cpu_util.c to cpu.c 2022-06-14 14:30:57 +08:00
songruojing
03477a59db rtc_clk: Fix rtc8m calibration failure after cpu/core reset
1. make sure 8md256 clk is enabled before calibration
2. improve bootloader and application startup 8m, 8md256 enable logic
2022-06-13 17:47:51 +08:00
songruojing
c8752cee6a clk_tree: Refactor rtc_clk.c by adding HAL layer for clock subsystem 2022-06-13 17:47:50 +08:00
KonstantinKondrashov
ac4c7d99fe dport: Move DPORT workaround to G0 2022-05-31 13:44:18 +08:00
Anton Maklakov
afde2434e8 memprot: fix type casting to avoid suspesious address arithmetic 2022-05-30 14:48:12 +07:00
songruojing
729d70129a clk_tree: add initial docs for clock tree 2022-05-24 22:59:51 +08:00
songruojing
a5b09cf015 rtc_clk: Clean up some clock related enum and macro in soc/rtc.h, replace with new ones in
soc/clk_tree_defs.h
2022-05-24 22:59:41 +08:00
songruojing
436085de51 rtc_clk: fix potential "division by zero" in rtc_clk_cpu_freq_mhz_to_config (found by coverity scan) 2022-05-23 13:38:41 +08:00
songruojing
87b917c04a rtc_clk: Remove the ck8m fpu logic when setting rtc slow clock source, ck8m fpu in sleep logic is now completely handled in sleep_modes.c 2022-05-21 13:13:52 +00:00
Michael (XIAO Xufeng)
0adb814af3 Merge branch 'bugfix/fix_memory_miss_bug_esp32c3_esp32s3' into 'master'
ESP32C3/ESP32S3: Fix cpu crash bug  when wakeup from lightsleep for memory data miss

Closes IDF-162 and IDF-4923

See merge request espressif/esp-idf!17823
2022-05-18 12:05:08 +08:00
Michael (XIAO Xufeng)
adcdcbaa0e Merge branch 'feat/pm_dbias_refactoring' into 'master'
pm: refactoring dbias related code

See merge request espressif/esp-idf!17994
2022-05-17 14:42:16 +08:00
chaijie
cc0a5a4edb solve memory error bug when in lightsleep mode 2022-05-16 11:43:00 +08:00
Michael (XIAO Xufeng)
6f507d527c rtc: fixed 8MD256 can't be used as RTC slow src on ESP32
Sync configuration from other chips

Closes: https://github.com/espressif/esp-idf/issues/8007, https://github.com/espressif/esp-idf/pull/8089
2022-05-14 22:35:41 +08:00
Michael (XIAO Xufeng)
234628b3ea pm: putting dbias and pd_cur code into same function 2022-05-14 02:35:11 +08:00
Michael (XIAO Xufeng)
2905cbbe03 pm: fixed RTC8M domain power issues
introduced in e44ead5356

1. The int8M power domain config by default is PD. While LEDC is using
RTC8M as clock source, this power domain will be kept on.

But when 8MD256 is used as RTC clock source, the power domain should
also be kept on.

On ESP32, there was protection for it, but broken by commit
e44ead5356. Currently the power domain
will be forced on when LEDC is using RTC8M as clock source &&
!int8m_pd_en (user enable ESP_PDP_DOMAIN_RTC8M in lightsleep). Otherwise
the power domain will be powered off, regardless of RTC clock source.

In other words, int8M domain will be forced off (even when 8MD256
used as RTC clock source) if LEDC not using RTC8M as clock source, user
doesn't enable ESP_PDP_DOMAIN_RTC8M, or in deep sleep.

On later chips, there's no such protection, so 8MD256 could't be used as
RTC clock source in sleep modes.

This commit adds protection of 8MD256 clock to other chips. Fixes the
incorrect protection logic overriding on ESP32. Now the power domain
will be determiend by the logic below (order by priority):

    1. When RTC clock source uses 8MD256, power up
    2. When LEDC uses RTC8M clock source, power up
    3. In deepsleep, power down
    4. Otherwise determined by user config of ESP_PDP_DOMAIN_RTC8M,
       power down by default. (This is preferred to have highest
       priority, but it's kept as is because of current code structure.)

2. Before, after the macro `RTC_SLEEP_CONFIG_DEFAULT` decides dbias, the
protection above may force the int8m PU. This may cause the inconsistent
of dbias and the int8m PU status.

This commit lifts the logic of pd int8m/xtal fpu logic to upper layer
(sleep_modes.c).

Related: https://github.com/espressif/esp-idf/issues/8007, https://github.com/espressif/esp-idf/pull/8089

temp
2022-05-11 11:30:47 +08:00