7 Commits

Author	SHA1	Message	Date
Armando	8382b75cac	refactor(cache): improved cache test with set cache dirty first	2023-08-01 11:00:49 +00:00
Armando	88c64f609b	change(cache): remove similar aim test	2023-08-01 11:00:49 +00:00
Armando	75cec2d58a	feat(cache): added psram stack test	2023-08-01 11:00:49 +00:00
Armando	da8afe7c78	feat(cache): added direction selection to esp_cache_msync API ... ESP_CACHE_MSYNC_FLAG_DIR_C2M: From cache to memory ESP_CACHE_MSYNC_FLAG_DIR_M2C: From memory to cache By default, if no direction flag is set, it will fallback C2M direction. For M2C direction, now this API will do an invalidation.	2023-07-11 11:19:10 +08:00
morris	f0c07f82b5	fix(test): check call graph for hal component	2023-07-05 09:09:01 +08:00
Marius Vikhammer	bca026455c	ci: remove redundent ci configs for chip support and network components ... CI would build psram config test apps even for target with no psram.	2023-04-26 09:54:29 +08:00
Armando	fda9746bb8	esp_mm: cache_msync API	2023-02-28 10:42:22 +08:00